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Merge branch 'for-linus' of git://ftp.arm.linux.org.uk/~rmk/linux-arm

Browse source 
Pull more ARM updates from Russell King:
 "Some further changes for this merge window:
   - fix bug building with gcc 4.6.4 and EABI.
   - fix pgtbl macro with some LPAE configurations
   - fix initrd override - FDT was overriding the command line, and it
     should be the other way around.
   - fix byteswap of instructions in undefined instruction handler
   - add basic support for SolidRun Hummingboard and Cubox-i boards"

* 'for-linus' of git://ftp.arm.linux.org.uk/~rmk/linux-arm:
  ARM: fix building with gcc 4.6.4
  ARM: 7941/2: Fix incorrect FDT initrd parameter override
  ARM: 7947/1: Make pgtbl macro more robust
  ARM: 7946/1: asm: __und_usr_thumb need byteswap instructions in BE case
  ARM: 7930/1: Introduce atomic MMIO modify
  ARM: imx: initial SolidRun Cubox-i support
  ARM: imx: initial SolidRun HummingBoard support
This commit is contained in:
Linus Torvalds 2014-01-29 18:20:41 -08:00
commit e914e3f48d
14 changed files with 519 additions and 3 deletions
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2
arch/arm/Makefile
View file

@ -96,7 +96,7 @@ tune-$(CONFIG_CPU_V6K) =$(call cc-option,-mtune=arm1136j-s,-mtune=strongarm)
tune-y := $(tune-y)
ifeq ($(CONFIG_AEABI),y)
CFLAGS_ABI :=-mabi=aapcs-linux -mno-thumb-interwork
CFLAGS_ABI :=-mabi=aapcs-linux -mno-thumb-interwork -mfpu=vfp
else
CFLAGS_ABI :=$(call cc-option,-mapcs-32,-mabi=apcs-gnu) $(call cc-option,-mno-thumb-interwork,)
endif

3
arch/arm/boot/dts/Makefile
View file

@ -152,10 +152,13 @@ dtb-$(CONFIG_ARCH_MXC) += \
imx53-mba53.dtb \
imx53-qsb.dtb \
imx53-smd.dtb \
imx6dl-cubox-i.dtb \
imx6dl-hummingboard.dtb \
imx6dl-sabreauto.dtb \
imx6dl-sabresd.dtb \
imx6dl-wandboard.dtb \
imx6q-arm2.dtb \
imx6q-cubox-i.dtb \
imx6q-phytec-pbab01.dtb \
imx6q-sabreauto.dtb \
imx6q-sabrelite.dtb \

12
arch/arm/boot/dts/imx6dl-cubox-i.dts Normal file
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@ -0,0 +1,12 @@
/*
* Copyright (C) 2014 Russell King
*/
/dts-v1/;
#include "imx6dl.dtsi"
#include "imx6qdl-cubox-i.dtsi"
/ {
model = "SolidRun Cubox-i Solo/DualLite";
compatible = "solidrun,cubox-i/dl", "fsl,imx6dl";
};

167
arch/arm/boot/dts/imx6dl-hummingboard.dts Normal file
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@ -0,0 +1,167 @@
/*
* Copyright (C) 2013,2014 Russell King
*/
/dts-v1/;
#include "imx6dl.dtsi"
#include "imx6qdl-microsom.dtsi"
#include "imx6qdl-microsom-ar8035.dtsi"
/ {
model = "SolidRun HummingBoard DL/Solo";
compatible = "solidrun,hummingboard", "fsl,imx6dl";
ir_recv: ir-receiver {
compatible = "gpio-ir-receiver";
gpios = <&gpio1 2 1>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hummingboard_gpio1_2>;
};
regulators {
compatible = "simple-bus";
reg_3p3v: 3p3v {
compatible = "regulator-fixed";
regulator-name = "3P3V";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
reg_usbh1_vbus: usb-h1-vbus {
compatible = "regulator-fixed";
enable-active-high;
gpio = <&gpio1 0 0>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hummingboard_usbh1_vbus>;
regulator-name = "usb_h1_vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
};
reg_usbotg_vbus: usb-otg-vbus {
compatible = "regulator-fixed";
enable-active-high;
gpio = <&gpio3 22 0>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hummingboard_usbotg_vbus>;
regulator-name = "usb_otg_vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
};
};
codec: spdif-transmitter {
compatible = "linux,spdif-dit";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hummingboard_spdif>;
};
sound-spdif {
compatible = "fsl,imx-audio-spdif";
model = "imx-spdif";
/* IMX6 doesn't implement this yet */
spdif-controller = <&spdif>;
spdif-out;
};
};
&can1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hummingboard_flexcan1>;
status = "okay";
};
&i2c1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hummingboard_i2c1>;
/*
* Not fitted on Carrier-1 board... yet
status = "okay";
rtc: pcf8523@68 {
compatible = "nxp,pcf8523";
reg = <0x68>;
};
*/
};
&iomuxc {
hummingboard {
pinctrl_hummingboard_flexcan1: hummingboard-flexcan1 {
fsl,pins = <
MX6QDL_PAD_SD3_CLK__FLEXCAN1_RX 0x80000000
MX6QDL_PAD_SD3_CMD__FLEXCAN1_TX 0x80000000
>;
};
pinctrl_hummingboard_gpio1_2: hummingboard-gpio1_2 {
fsl,pins = <
MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x80000000
>;
};
pinctrl_hummingboard_i2c1: hummingboard-i2c1 {
fsl,pins = <
MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
>;
};
pinctrl_hummingboard_spdif: hummingboard-spdif {
fsl,pins = <MX6QDL_PAD_GPIO_17__SPDIF_OUT 0x1b0b0>;
};
pinctrl_hummingboard_usbh1_vbus: hummingboard-usbh1-vbus {
fsl,pins = <MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x1b0b0>;
};
pinctrl_hummingboard_usbotg_vbus: hummingboard-usbotg-vbus {
fsl,pins = <MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0>;
};
pinctrl_hummingboard_usdhc2_aux: hummingboard-usdhc2-aux {
fsl,pins = <
MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1f071
>;
};
pinctrl_hummingboard_usdhc2: hummingboard-usdhc2 {
fsl,pins = <
MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059
MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059
MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059
MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059
MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059
MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x13059
>;
};
};
};
&spdif {
status = "okay";
};
&usbh1 {
vbus-supply = <&reg_usbh1_vbus>;
status = "okay";
};
&usbotg {
vbus-supply = <&reg_usbotg_vbus>;
status = "okay";
};
&usdhc2 {
pinctrl-names = "default";
pinctrl-0 = <
&pinctrl_hummingboard_usdhc2_aux
&pinctrl_hummingboard_usdhc2
>;
vmmc-supply = <&reg_3p3v>;
cd-gpios = <&gpio1 4 0>;
status = "okay";
};

16
arch/arm/boot/dts/imx6q-cubox-i.dts Normal file
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@ -0,0 +1,16 @@
/*
* Copyright (C) 2014 Russell King
*/
/dts-v1/;
#include "imx6q.dtsi"
#include "imx6qdl-cubox-i.dtsi"
/ {
model = "SolidRun Cubox-i Dual/Quad";
compatible = "solidrun,cubox-i/q", "fsl,imx6q";
};
&sata {
status = "okay";
};

143
arch/arm/boot/dts/imx6qdl-cubox-i.dtsi Normal file
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@ -0,0 +1,143 @@
/*
* Copyright (C) 2014 Russell King
*/
#include "imx6qdl-microsom.dtsi"
#include "imx6qdl-microsom-ar8035.dtsi"
/ {
ir_recv: ir-receiver {
compatible = "gpio-ir-receiver";
gpios = <&gpio3 9 1>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_cubox_i_ir>;
};
regulators {
compatible = "simple-bus";
reg_3p3v: 3p3v {
compatible = "regulator-fixed";
regulator-name = "3P3V";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
reg_usbh1_vbus: usb-h1-vbus {
compatible = "regulator-fixed";
enable-active-high;
gpio = <&gpio1 0 0>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_cubox_i_usbh1_vbus>;
regulator-name = "usb_h1_vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
};
reg_usbotg_vbus: usb-otg-vbus {
compatible = "regulator-fixed";
enable-active-high;
gpio = <&gpio3 22 0>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_cubox_i_usbotg_vbus>;
regulator-name = "usb_otg_vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
};
};
codec: spdif-transmitter {
compatible = "linux,spdif-dit";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_cubox_i_spdif>;
};
sound-spdif {
compatible = "fsl,imx-audio-spdif";
model = "imx-spdif";
/* IMX6 doesn't implement this yet */
spdif-controller = <&spdif>;
spdif-out;
};
};
&i2c3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_cubox_i_i2c3>;
status = "okay";
rtc: pcf8523@68 {
compatible = "nxp,pcf8523";
reg = <0x68>;
};
};
&iomuxc {
cubox_i {
pinctrl_cubox_i_i2c3: cubox-i-i2c3 {
fsl,pins = <
MX6QDL_PAD_EIM_D17__I2C3_SCL 0x4001b8b1
MX6QDL_PAD_EIM_D18__I2C3_SDA 0x4001b8b1
>;
};
pinctrl_cubox_i_ir: cubox-i-ir {
fsl,pins = <
MX6QDL_PAD_EIM_DA9__GPIO3_IO09 0x80000000
>;
};
pinctrl_cubox_i_spdif: cubox-i-spdif {
fsl,pins = <MX6QDL_PAD_GPIO_17__SPDIF_OUT 0x1b0b0>;
};
pinctrl_cubox_i_usbh1_vbus: cubox-i-usbh1-vbus {
fsl,pins = <MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x4001b0b0>;
};
pinctrl_cubox_i_usbotg_vbus: cubox-i-usbotg-vbus {
fsl,pins = <MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x4001b0b0>;
};
pinctrl_cubox_i_usdhc2_aux: cubox-i-usdhc2-aux {
fsl,pins = <
MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1f071
MX6QDL_PAD_KEY_ROW1__SD2_VSELECT 0x1b071
>;
};
pinctrl_cubox_i_usdhc2: cubox-i-usdhc2 {
fsl,pins = <
MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059
MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059
MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059
MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059
MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059
MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x13059
>;
};
};
};
&spdif {
status = "okay";
};
&usbh1 {
vbus-supply = <&reg_usbh1_vbus>;
status = "okay";
};
&usbotg {
vbus-supply = <&reg_usbotg_vbus>;
status = "okay";
};
&usdhc2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_cubox_i_usdhc2_aux &pinctrl_cubox_i_usdhc2>;
vmmc-supply = <&reg_3p3v>;
cd-gpios = <&gpio1 4 0>;
status = "okay";
};

62
arch/arm/boot/dts/imx6qdl-microsom-ar8035.dtsi Normal file
View file

@ -0,0 +1,62 @@
/*
* Copyright (C) 2013,2014 Russell King
*
* This describes the hookup for an AR8035 to the iMX6 on the SolidRun
* MicroSOM.
*/
&fec {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_microsom_enet_ar8035>;
phy-mode = "rgmii";
phy-reset-duration = <2>;
phy-reset-gpios = <&gpio4 15 0>;
status = "okay";
};
&iomuxc {
enet {
pinctrl_microsom_enet_ar8035: microsom-enet-ar8035 {
fsl,pins = <
MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
/* AR8035 reset */
MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x130b0
/* AR8035 interrupt */
MX6QDL_PAD_DI0_PIN2__GPIO4_IO18 0x80000000
/* GPIO16 -> AR8035 25MHz */
MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0xc0000000
MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x80000000
MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
/* AR8035 CLK_25M --> ENET_REF_CLK (V22) */
MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x0a0b1
/* AR8035 pin strapping: IO voltage: pull up */
MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
/* AR8035 pin strapping: PHYADDR#0: pull down */
MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x130b0
/* AR8035 pin strapping: PHYADDR#1: pull down */
MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x130b0
/* AR8035 pin strapping: MODE#1: pull up */
MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
/* AR8035 pin strapping: MODE#3: pull up */
MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
/* AR8035 pin strapping: MODE#0: pull down */
MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x130b0
/*
* As the RMII pins are also connected to RGMII
* so that an AR8030 can be placed, set these
* to high-z with the same pulls as above.
* Use the GPIO settings to avoid changing the
* input select registers.
*/
MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x03000
MX6QDL_PAD_ENET_RXD0__GPIO1_IO27 0x03000
MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x03000
>;
};
};
};

33
arch/arm/boot/dts/imx6qdl-microsom.dtsi Normal file
View file

@ -0,0 +1,33 @@
/*
* Copyright (C) 2013,2014 Russell King
*/
&iomuxc {
microsom {
pinctrl_microsom_uart1: microsom-uart1 {
fsl,pins = <
MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1
MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1
>;
};
pinctrl_microsom_usbotg: microsom-usbotg {
/*
* Similar to pinctrl_usbotg_2, but we want it
* pulled down for a fixed host connection.
*/
fsl,pins = <MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x13059>;
};
};
};
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_microsom_uart1>;
status = "okay";
};
&usbotg {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_microsom_usbotg>;
};

6
arch/arm/include/asm/io.h
View file

@ -37,6 +37,12 @@
#define isa_page_to_bus page_to_phys
#define isa_bus_to_virt phys_to_virt
/*
* Atomic MMIO-wide IO modify
*/
extern void atomic_io_modify(void __iomem *reg, u32 mask, u32 set);
extern void atomic_io_modify_relaxed(void __iomem *reg, u32 mask, u32 set);
/*
* Generic IO read/write. These perform native-endian accesses. Note
* that some architectures will want to re-define __raw_{read,write}w.

2
arch/arm/kernel/entry-armv.S
View file

@ -451,9 +451,11 @@ __und_usr_thumb:
.arch armv6t2
#endif
2: ldrht r5, [r4]
ARM_BE8(rev16 r5, r5) @ little endian instruction
cmp r5, #0xe800 @ 32bit instruction if xx != 0
blo __und_usr_fault_16 @ 16bit undefined instruction
3: ldrht r0, [r2]
ARM_BE8(rev16 r0, r0) @ little endian instruction
add r2, r2, #2 @ r2 is PC + 2, make it PC + 4
str r2, [sp, #S_PC] @ it's a 2x16bit instr, update
orr r0, r0, r5, lsl #16

3
arch/arm/kernel/head.S
View file

@ -52,7 +52,8 @@
.equ swapper_pg_dir, KERNEL_RAM_VADDR - PG_DIR_SIZE
.macro pgtbl, rd, phys
add \rd, \phys, #TEXT_OFFSET - PG_DIR_SIZE
add \rd, \phys, #TEXT_OFFSET
sub \rd, \rd, #PG_DIR_SIZE
.endm
/*

35
arch/arm/kernel/io.c
View file

@ -1,6 +1,41 @@
#include <linux/export.h>
#include <linux/types.h>
#include <linux/io.h>
#include <linux/spinlock.h>
static DEFINE_RAW_SPINLOCK(__io_lock);
/*
* Generic atomic MMIO modify.
*
* Allows thread-safe access to registers shared by unrelated subsystems.
* The access is protected by a single MMIO-wide lock.
*/
void atomic_io_modify_relaxed(void __iomem *reg, u32 mask, u32 set)
{
unsigned long flags;
u32 value;
raw_spin_lock_irqsave(&__io_lock, flags);
value = readl_relaxed(reg) & ~mask;
value |= (set & mask);
writel_relaxed(value, reg);
raw_spin_unlock_irqrestore(&__io_lock, flags);
}
EXPORT_SYMBOL(atomic_io_modify_relaxed);
void atomic_io_modify(void __iomem *reg, u32 mask, u32 set)
{
unsigned long flags;
u32 value;
raw_spin_lock_irqsave(&__io_lock, flags);
value = readl_relaxed(reg) & ~mask;
value |= (set & mask);
writel(value, reg);
raw_spin_unlock_irqrestore(&__io_lock, flags);
}
EXPORT_SYMBOL(atomic_io_modify);
/*
* Copy data from IO memory space to "real" memory space.

35
arch/arm/mach-imx/mach-imx6q.c
View file

@ -133,6 +133,39 @@ static int ar8031_phy_fixup(struct phy_device *dev)
#define PHY_ID_AR8031 0x004dd074
static int ar8035_phy_fixup(struct phy_device *dev)
{
u16 val;
/* Ar803x phy SmartEEE feature cause link status generates glitch,
* which cause ethernet link down/up issue, so disable SmartEEE
*/
phy_write(dev, 0xd, 0x3);
phy_write(dev, 0xe, 0x805d);
phy_write(dev, 0xd, 0x4003);
val = phy_read(dev, 0xe);
phy_write(dev, 0xe, val & ~(1 << 8));
/*
* Enable 125MHz clock from CLK_25M on the AR8031. This
* is fed in to the IMX6 on the ENET_REF_CLK (V22) pad.
* Also, introduce a tx clock delay.
*
* This is the same as is the AR8031 fixup.
*/
ar8031_phy_fixup(dev);
/*check phy power*/
val = phy_read(dev, 0x0);
if (val & BMCR_PDOWN)
phy_write(dev, 0x0, val & ~BMCR_PDOWN);
return 0;
}
#define PHY_ID_AR8035 0x004dd072
static void __init imx6q_enet_phy_init(void)
{
if (IS_BUILTIN(CONFIG_PHYLIB)) {
@ -142,6 +175,8 @@ static void __init imx6q_enet_phy_init(void)
ksz9031rn_phy_fixup);
phy_register_fixup_for_uid(PHY_ID_AR8031, 0xffffffff,
ar8031_phy_fixup);
phy_register_fixup_for_uid(PHY_ID_AR8035, 0xffffffef,
ar8035_phy_fixup);
}
}

3
arch/arm/mm/init.c
View file

@ -290,10 +290,11 @@ void __init arm_memblock_init(struct meminfo *mi,
#endif
#ifdef CONFIG_BLK_DEV_INITRD
/* FDT scan will populate initrd_start */
if (initrd_start) {
if (initrd_start && !phys_initrd_size) {
phys_initrd_start = __virt_to_phys(initrd_start);
phys_initrd_size = initrd_end - initrd_start;
}
initrd_start = initrd_end = 0;
if (phys_initrd_size &&
!memblock_is_region_memory(phys_initrd_start, phys_initrd_size)) {
pr_err("INITRD: 0x%08llx+0x%08lx is not a memory region - disabling initrd\n",