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MIPS: CPS: Have asm/mips-cps.h include CM & CPC headers

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With Coherence Manager (CM) 3.5 information about the topology of the
system, which has previously only been available through & accessed from
the CM, is now also provided by the Cluster Power Controller (CPC). This
includes a new CPC_CONFIG register mirroring GCR_CONFIG, and similarly a
new CPC_Cx_CONFIG register mirroring GCR_Cx_CONFIG.

In preparation for adjusting functions such as mips_cm_numcores(), which
have previously only needed to access the CM, to also access the CPC
this patch modifies the way we use the various CPS headers. Rather than
having users include asm/mips-cm.h or asm/mips-cpc.h individually we
instead have users include asm/mips-cps.h which in turn includes
asm/mips-cm.h & asm/mips-cpc.h. This means that users will gain access
to both CM & CPC registers by including one header, and most importantly
it makes asm/mips-cps.h an ideal location for helper functions which
need to access the various components of the CPS.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/17015/
Patchwork: https://patchwork.linux-mips.org/patch/17217/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
Paul Burton 2017-08-12 19:49:41 -07:00 committed by Ralf Baechle
parent d595d423d0
commit e83f7e02af
20 changed files with 28 additions and 30 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

7
arch/mips/include/asm/mips-cm.h
View file

@ -8,14 +8,15 @@
* option) any later version.
*/
#ifndef __MIPS_ASM_MIPS_CPS_H__
# error Please include asm/mips-cps.h rather than asm/mips-cm.h
#endif
#ifndef __MIPS_ASM_MIPS_CM_H__
#define __MIPS_ASM_MIPS_CM_H__
#include <linux/bitops.h>
#include <linux/errno.h>
#include <linux/io.h>
#include <linux/types.h>
#include <asm/mips-cps.h>
/* The base address of the CM GCR block */
extern void __iomem *mips_gcr_base;

9
arch/mips/include/asm/mips-cpc.h
View file

@ -8,12 +8,15 @@
* option) any later version.
*/
#ifndef __MIPS_ASM_MIPS_CPS_H__
# error Please include asm/mips-cps.h rather than asm/mips-cpc.h
#endif
#ifndef __MIPS_ASM_MIPS_CPC_H__
#define __MIPS_ASM_MIPS_CPC_H__
#include <linux/io.h>
#include <linux/types.h>
#include <asm/mips-cps.h>
#include <linux/bitops.h>
#include <linux/errno.h>
/* The base address of the CPC registers */
extern void __iomem *mips_cpc_base;

3
arch/mips/include/asm/mips-cps.h
View file

@ -105,4 +105,7 @@ static inline void clear_##unit##_##name(uint##sz##_t val) \
CPS_ACCESSOR_W(unit, sz, name) \
CPS_ACCESSOR_M(unit, sz, name)
#include <asm/mips-cm.h>
#include <asm/mips-cpc.h>
#endif /* __MIPS_ASM_MIPS_CPS_H__ */

2
arch/mips/include/asm/smp-ops.h
View file

@ -13,7 +13,7 @@
#include <linux/errno.h>
#include <asm/mips-cm.h>
#include <asm/mips-cps.h>
#ifdef CONFIG_SMP

2
arch/mips/kernel/mips-cm.c
View file

@ -12,7 +12,7 @@
#include <linux/percpu.h>
#include <linux/spinlock.h>
#include <asm/mips-cm.h>
#include <asm/mips-cps.h>
#include <asm/mipsregs.h>
void __iomem *mips_gcr_base;

3
arch/mips/kernel/mips-cpc.c
View file

@ -12,8 +12,7 @@
#include <linux/percpu.h>
#include <linux/spinlock.h>
#include <asm/mips-cm.h>
#include <asm/mips-cpc.h>
#include <asm/mips-cps.h>
void __iomem *mips_cpc_base;

3
arch/mips/kernel/pm-cps.c
View file

@ -17,8 +17,7 @@
#include <asm/cacheflush.h>
#include <asm/cacheops.h>
#include <asm/idle.h>
#include <asm/mips-cm.h>
#include <asm/mips-cpc.h>
#include <asm/mips-cps.h>
#include <asm/mipsmtregs.h>
#include <asm/pm.h>
#include <asm/pm-cps.h>

3
arch/mips/kernel/smp-cps.c
View file

@ -19,8 +19,7 @@
#include <linux/types.h>
#include <asm/bcache.h>
#include <asm/mips-cm.h>
#include <asm/mips-cpc.h>
#include <asm/mips-cps.h>
#include <asm/mips_mt.h>
#include <asm/mipsregs.h>
#include <asm/pm-cps.h>

3
arch/mips/kernel/traps.c
View file

@ -50,9 +50,8 @@
#include <asm/fpu.h>
#include <asm/fpu_emulator.h>
#include <asm/idle.h>
#include <asm/mips-cm.h>
#include <asm/mips-cps.h>
#include <asm/mips-r2-to-r6-emul.h>
#include <asm/mips-cm.h>
#include <asm/mipsregs.h>
#include <asm/mipsmtregs.h>
#include <asm/module.h>

2
arch/mips/mm/c-r4k.c
View file

@ -37,7 +37,7 @@
#include <asm/cacheflush.h> /* for run_uncached() */
#include <asm/traps.h>
#include <asm/dma-coherence.h>
#include <asm/mips-cm.h>
#include <asm/mips-cps.h>
/*
* Bits describing what cache ops an SMP callback function may perform.

2
arch/mips/mm/sc-mips.c
View file

@ -14,7 +14,7 @@
#include <asm/pgtable.h>
#include <asm/mmu_context.h>
#include <asm/r4kcache.h>
#include <asm/mips-cm.h>
#include <asm/mips-cps.h>
/*
* MIPS32/MIPS64 L2 cache handling

2
arch/mips/mti-malta/malta-dtshim.c
View file

@ -18,7 +18,7 @@
#include <asm/fw/fw.h>
#include <asm/mips-boards/generic.h>
#include <asm/mips-boards/malta.h>
#include <asm/mips-cm.h>
#include <asm/mips-cps.h>
#include <asm/page.h>
#define ROCIT_REG_BASE 0x1f403000

3
arch/mips/mti-malta/malta-init.c
View file

@ -21,8 +21,7 @@
#include <asm/smp-ops.h>
#include <asm/traps.h>
#include <asm/fw/fw.h>
#include <asm/mips-cm.h>
#include <asm/mips-cpc.h>
#include <asm/mips-cps.h>
#include <asm/mips-boards/generic.h>
#include <asm/mips-boards/malta.h>

1
arch/mips/mti-malta/malta-int.c
View file

@ -29,7 +29,6 @@
#include <asm/i8259.h>
#include <asm/irq_cpu.h>
#include <asm/irq_regs.h>
#include <asm/mips-cm.h>
#include <asm/mips-boards/malta.h>
#include <asm/mips-boards/maltaint.h>
#include <asm/gt64120.h>

2
arch/mips/mti-malta/malta-setup.c
View file

@ -28,7 +28,7 @@
#include <asm/fw/fw.h>
#include <asm/mach-malta/malta-dtshim.h>
#include <asm/mips-cm.h>
#include <asm/mips-cps.h>
#include <asm/mips-boards/generic.h>
#include <asm/mips-boards/malta.h>
#include <asm/mips-boards/maltaint.h>

2
arch/mips/pci/pci-malta.c
View file

@ -27,7 +27,7 @@
#include <linux/init.h>
#include <asm/gt64120.h>
#include <asm/mips-cm.h>
#include <asm/mips-cps.h>
#include <asm/mips-boards/generic.h>
#include <asm/mips-boards/bonito64.h>
#include <asm/mips-boards/msc01_pci.h>

3
arch/mips/pistachio/init.c
View file

@ -19,8 +19,7 @@
#include <asm/dma-coherence.h>
#include <asm/fw/fw.h>
#include <asm/mips-boards/generic.h>
#include <asm/mips-cm.h>
#include <asm/mips-cpc.h>
#include <asm/mips-cps.h>
#include <asm/prom.h>
#include <asm/smp-ops.h>
#include <asm/traps.h>

3
arch/mips/ralink/mt7621.c
View file

@ -12,8 +12,7 @@
#include <asm/mipsregs.h>
#include <asm/smp-ops.h>
#include <asm/mips-cm.h>
#include <asm/mips-cpc.h>
#include <asm/mips-cps.h>
#include <asm/mach-ralink/ralink_regs.h>
#include <asm/mach-ralink/mt7621.h>

1
arch/mips/vdso/gettimeofday.c
View file

@ -16,7 +16,6 @@
#include <asm/clocksource.h>
#include <asm/io.h>
#include <asm/mips-cm.h>
#include <asm/unistd.h>
#include <asm/vdso.h>

2
drivers/irqchip/irq-mips-gic.c
View file

@ -17,7 +17,7 @@
#include <linux/sched.h>
#include <linux/smp.h>
#include <asm/mips-cm.h>
#include <asm/mips-cps.h>
#include <asm/setup.h>
#include <asm/traps.h>