pm3fb: copyarea and partial imageblit suppor
This patch adds accelerated copyarea and partially accelerated imageblit functions. There is also fixed one register address in the pm3fb.h file. Signed-off-by: Krzysztof Helt <krzysztof.h1@wp.pl> Signed-off-by: Antonino Daplas <adaplas@gmail.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
This commit is contained in:
Krzysztof Helt
Linus Torvalds
parent
0a0b53f660
commit
e7f76df964
2 changed files with 173 additions and 12 deletions
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@ -276,15 +276,22 @@ static void pm3fb_init_engine(struct fb_info *info)
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PM3_WAIT(par, 2);
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{
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unsigned long rm = 1;
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/* invert bits in bitmask */
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unsigned long rm = 1 | (3 << 7);
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switch (info->var.bits_per_pixel) {
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case 8:
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PM3_WRITE_REG(par, PM3PixelSize,
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PM3PixelSize_GLOBAL_8BIT);
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#ifdef __BIG_ENDIAN
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rm |= 3 << 15;
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#endif
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break;
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case 16:
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PM3_WRITE_REG(par, PM3PixelSize,
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PM3PixelSize_GLOBAL_16BIT);
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#ifdef __BIG_ENDIAN
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rm |= 2 << 15;
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#endif
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break;
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case 32:
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PM3_WRITE_REG(par, PM3PixelSize,
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@ -394,18 +401,18 @@ static void pm3fb_fillrect (struct fb_info *info,
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color |= color << 16;
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PM3_WAIT(par, 4);
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/* ROP Ox3 is GXcopy */
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PM3_WRITE_REG(par, PM3Config2D,
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PM3Config2D_UseConstantSource |
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PM3Config2D_ForegroundROPEnable |
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(PM3Config2D_ForegroundROP(0x3)) | /* Ox3 is GXcopy */
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PM3Config2D_FBWriteEnable);
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PM3Config2D_UseConstantSource |
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PM3Config2D_ForegroundROPEnable |
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(PM3Config2D_ForegroundROP(0x3)) |
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PM3Config2D_FBWriteEnable);
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PM3_WRITE_REG(par, PM3ForegroundColor, color);
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PM3_WRITE_REG(par, PM3RectanglePosition,
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(PM3RectanglePosition_XOffset(modded.dx)) |
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(PM3RectanglePosition_YOffset(modded.dy)));
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(PM3RectanglePosition_XOffset(modded.dx)) |
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(PM3RectanglePosition_YOffset(modded.dy)));
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PM3_WRITE_REG(par, PM3Render2D,
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PM3Render2D_XPositive |
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@ -415,6 +422,154 @@ static void pm3fb_fillrect (struct fb_info *info,
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(PM3Render2D_Width(modded.width)) |
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(PM3Render2D_Height(modded.height)));
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}
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static void pm3fb_copyarea(struct fb_info *info,
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const struct fb_copyarea *area)
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{
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struct pm3_par *par = info->par;
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struct fb_copyarea modded;
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u32 vxres, vyres;
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int x_align, o_x, o_y;
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if (info->state != FBINFO_STATE_RUNNING)
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return;
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if (info->flags & FBINFO_HWACCEL_DISABLED) {
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cfb_copyarea(info, area);
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return;
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}
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memcpy(&modded, area, sizeof(struct fb_copyarea));
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vxres = info->var.xres_virtual;
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vyres = info->var.yres_virtual;
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if(!modded.width || !modded.height ||
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modded.sx >= vxres || modded.sy >= vyres ||
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modded.dx >= vxres || modded.dy >= vyres)
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return;
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if(modded.sx + modded.width > vxres)
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modded.width = vxres - modded.sx;
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if(modded.dx + modded.width > vxres)
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modded.width = vxres - modded.dx;
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if(modded.sy + modded.height > vyres)
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modded.height = vyres - modded.sy;
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if(modded.dy + modded.height > vyres)
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modded.height = vyres - modded.dy;
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o_x = modded.sx - modded.dx; /*(sx > dx ) ? (sx - dx) : (dx - sx); */
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o_y = modded.sy - modded.dy; /*(sy > dy ) ? (sy - dy) : (dy - sy); */
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x_align = (modded.sx & 0x1f);
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PM3_WAIT(par, 6);
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PM3_WRITE_REG(par, PM3Config2D,
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PM3Config2D_UserScissorEnable |
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PM3Config2D_ForegroundROPEnable |
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PM3Config2D_Blocking |
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(PM3Config2D_ForegroundROP(0x3)) | /* Ox3 is GXcopy */
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PM3Config2D_FBWriteEnable);
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PM3_WRITE_REG(par, PM3ScissorMinXY,
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((modded.dy & 0x0fff) << 16) | (modded.dx & 0x0fff));
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PM3_WRITE_REG(par, PM3ScissorMaxXY,
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(((modded.dy + modded.height) & 0x0fff) << 16) |
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((modded.dx + modded.width) & 0x0fff));
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PM3_WRITE_REG(par, PM3FBSourceReadBufferOffset,
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PM3FBSourceReadBufferOffset_XOffset(o_x) |
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PM3FBSourceReadBufferOffset_YOffset(o_y));
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PM3_WRITE_REG(par, PM3RectanglePosition,
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(PM3RectanglePosition_XOffset(modded.dx - x_align)) |
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(PM3RectanglePosition_YOffset(modded.dy)));
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PM3_WRITE_REG(par, PM3Render2D,
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((modded.sx > modded.dx) ? PM3Render2D_XPositive : 0) |
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((modded.sy > modded.dy) ? PM3Render2D_YPositive : 0) |
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PM3Render2D_Operation_Normal |
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PM3Render2D_SpanOperation |
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PM3Render2D_FBSourceReadEnable |
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(PM3Render2D_Width(modded.width + x_align)) |
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(PM3Render2D_Height(modded.height)));
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}
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static void pm3fb_imageblit(struct fb_info *info, const struct fb_image *image)
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{
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struct pm3_par *par = info->par;
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u32 height = image->height;
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u32 fgx, bgx;
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const u32 *src = (const u32*)image->data;
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switch (info->fix.visual) {
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case FB_VISUAL_PSEUDOCOLOR:
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fgx = image->fg_color;
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bgx = image->bg_color;
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break;
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case FB_VISUAL_TRUECOLOR:
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default:
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fgx = par->palette[image->fg_color];
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bgx = par->palette[image->bg_color];
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break;
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}
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if (image->depth != 1 || (image->width & 0x1f)) {
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return cfb_imageblit(info, image);
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}
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if (info->var.bits_per_pixel == 8) {
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fgx |= fgx << 8;
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bgx |= bgx << 8;
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}
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if (info->var.bits_per_pixel <= 16) {
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fgx |= fgx << 16;
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bgx |= bgx << 16;
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}
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PM3_WAIT(par, 5);
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PM3_WRITE_REG(par, PM3ForegroundColor, fgx);
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PM3_WRITE_REG(par, PM3BackgroundColor, bgx);
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/* ROP Ox3 is GXcopy */
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PM3_WRITE_REG(par, PM3Config2D,
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PM3Config2D_UseConstantSource |
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PM3Config2D_ForegroundROPEnable |
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(PM3Config2D_ForegroundROP(0x3)) |
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PM3Config2D_OpaqueSpan |
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PM3Config2D_FBWriteEnable);
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PM3_WRITE_REG(par, PM3RectanglePosition,
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(PM3RectanglePosition_XOffset(image->dx)) |
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(PM3RectanglePosition_YOffset(image->dy)));
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PM3_WRITE_REG(par, PM3Render2D,
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PM3Render2D_XPositive |
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PM3Render2D_YPositive |
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PM3Render2D_Operation_SyncOnBitMask |
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PM3Render2D_SpanOperation |
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(PM3Render2D_Width(image->width)) |
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(PM3Render2D_Height(image->height)));
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while (height--) {
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u32 width = (image->width + 31) >> 5;
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while (width >= PM3_FIFO_SIZE) {
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int i = PM3_FIFO_SIZE - 1;
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PM3_WAIT(par, PM3_FIFO_SIZE);
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while (i--) {
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PM3_WRITE_REG(par, PM3BitMaskPattern, *src);
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src++;
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}
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width -= PM3_FIFO_SIZE - 1;
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}
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PM3_WAIT(par, width + 1);
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while (width--) {
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PM3_WRITE_REG(par, PM3BitMaskPattern, *src);
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src++;
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}
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}
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}
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/* end of acceleration functions */
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/* write the mode to registers */
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@ -907,8 +1062,8 @@ static struct fb_ops pm3fb_ops = {
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.fb_setcolreg = pm3fb_setcolreg,
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.fb_pan_display = pm3fb_pan_display,
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.fb_fillrect = pm3fb_fillrect,
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.fb_copyarea = cfb_copyarea,
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.fb_imageblit = cfb_imageblit,
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.fb_copyarea = pm3fb_copyarea,
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.fb_imageblit = pm3fb_imageblit,
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.fb_blank = pm3fb_blank,
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.fb_sync = pm3fb_sync,
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};
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@ -1080,7 +1235,10 @@ static int __devinit pm3fb_probe(struct pci_dev *dev,
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info->fix = pm3fb_fix;
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info->pseudo_palette = par->palette;
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info->flags = FBINFO_DEFAULT |
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FBINFO_HWACCEL_FILLRECT;/* | FBINFO_HWACCEL_YPAN;*/
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/* FBINFO_HWACCEL_YPAN |*/
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FBINFO_HWACCEL_COPYAREA |
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FBINFO_HWACCEL_IMAGEBLIT |
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FBINFO_HWACCEL_FILLRECT;
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/*
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* This should give a reasonable default video mode. The following is
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@ -849,7 +849,7 @@
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#define PM3Render_FBSourceRead_Enable (1<<27)
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#define PM3RasterizerMode 0x80a0
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#define PM3RasterizerModeAnd 0xaba0
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#define PM3RasterizerModeOr 0xabb8
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#define PM3RasterizerModeOr 0xaba8
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#define PM3RectangleHeight 0x94e0
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#define PM3Render 0x8038
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#define PM3RepeatLine 0x9328
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@ -1116,6 +1116,9 @@
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/* ***** pm3fb useful define and macro ***** */
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/* ***************************************** */
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/* fifo size in chip */
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#define PM3_FIFO_SIZE 120
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/* max size of options */
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#define PM3_OPTIONS_SIZE 256
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