ASoC: Davinci: McASP: add support new McASP IP Variant
The OMAP2+ variant of McASP is different from Davinci variant w.r.to some register offset. Changes - Add new MCASP_VERSION_3 to identify new variant. New DT compatible "ti,omap2-mcasp-audio" to identify version 3 controller. - The register offsets are handled depending on the version. Note: DMA parameters (dma fifo offset) are not updated and will be done later. Signed-off-by: Hebbar, Gururaja <gururaja.hebbar@ti.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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3 changed files with 75 additions and 13 deletions
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@ -4,6 +4,7 @@ Required properties:
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- compatible :
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"ti,dm646x-mcasp-audio" : for DM646x platforms
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"ti,da830-mcasp-audio" : for both DA830 & DA850 platforms
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"ti,omap2-mcasp-audio" : for OMAP2 platforms (TI81xx, AM33xx)
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- reg : Should contain McASP registers offset and length
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- interrupts : Interrupt number for McASP
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@ -87,6 +87,7 @@ struct snd_platform_data {
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enum {
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MCASP_VERSION_1 = 0, /* DM646x */
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MCASP_VERSION_2, /* DA8xx/OMAPL1x */
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MCASP_VERSION_3, /* TI81xx/AM33xx */
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};
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enum mcbsp_clk_input_pin {
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@ -111,6 +111,10 @@
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#define DAVINCI_MCASP_WFIFOSTS (0x1014)
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#define DAVINCI_MCASP_RFIFOCTL (0x1018)
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#define DAVINCI_MCASP_RFIFOSTS (0x101C)
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#define MCASP_VER3_WFIFOCTL (0x1000)
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#define MCASP_VER3_WFIFOSTS (0x1004)
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#define MCASP_VER3_RFIFOCTL (0x1008)
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#define MCASP_VER3_RFIFOSTS (0x100C)
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/*
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* DAVINCI_MCASP_PWREMUMGT_REG - Power Down and Emulation Management
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@ -384,18 +388,36 @@ static void davinci_mcasp_start(struct davinci_audio_dev *dev, int stream)
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{
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if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
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if (dev->txnumevt) { /* enable FIFO */
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mcasp_clr_bits(dev->base + DAVINCI_MCASP_WFIFOCTL,
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switch (dev->version) {
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case MCASP_VERSION_3:
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mcasp_clr_bits(dev->base + MCASP_VER3_WFIFOCTL,
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FIFO_ENABLE);
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mcasp_set_bits(dev->base + DAVINCI_MCASP_WFIFOCTL,
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mcasp_set_bits(dev->base + MCASP_VER3_WFIFOCTL,
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FIFO_ENABLE);
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break;
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default:
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mcasp_clr_bits(dev->base +
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DAVINCI_MCASP_WFIFOCTL, FIFO_ENABLE);
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mcasp_set_bits(dev->base +
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DAVINCI_MCASP_WFIFOCTL, FIFO_ENABLE);
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}
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}
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mcasp_start_tx(dev);
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} else {
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if (dev->rxnumevt) { /* enable FIFO */
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mcasp_clr_bits(dev->base + DAVINCI_MCASP_RFIFOCTL,
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switch (dev->version) {
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case MCASP_VERSION_3:
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mcasp_clr_bits(dev->base + MCASP_VER3_RFIFOCTL,
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FIFO_ENABLE);
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mcasp_set_bits(dev->base + DAVINCI_MCASP_RFIFOCTL,
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mcasp_set_bits(dev->base + MCASP_VER3_RFIFOCTL,
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FIFO_ENABLE);
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break;
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default:
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mcasp_clr_bits(dev->base +
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DAVINCI_MCASP_RFIFOCTL, FIFO_ENABLE);
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mcasp_set_bits(dev->base +
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DAVINCI_MCASP_RFIFOCTL, FIFO_ENABLE);
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}
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}
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mcasp_start_rx(dev);
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}
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@ -416,14 +438,31 @@ static void mcasp_stop_tx(struct davinci_audio_dev *dev)
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static void davinci_mcasp_stop(struct davinci_audio_dev *dev, int stream)
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{
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if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
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if (dev->txnumevt) /* disable FIFO */
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mcasp_clr_bits(dev->base + DAVINCI_MCASP_WFIFOCTL,
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if (dev->txnumevt) { /* disable FIFO */
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switch (dev->version) {
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case MCASP_VERSION_3:
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mcasp_clr_bits(dev->base + MCASP_VER3_WFIFOCTL,
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FIFO_ENABLE);
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break;
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default:
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mcasp_clr_bits(dev->base +
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DAVINCI_MCASP_WFIFOCTL, FIFO_ENABLE);
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}
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}
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mcasp_stop_tx(dev);
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} else {
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if (dev->rxnumevt) /* disable FIFO */
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mcasp_clr_bits(dev->base + DAVINCI_MCASP_RFIFOCTL,
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if (dev->rxnumevt) { /* disable FIFO */
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switch (dev->version) {
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case MCASP_VERSION_3:
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mcasp_clr_bits(dev->base + MCASP_VER3_RFIFOCTL,
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FIFO_ENABLE);
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break;
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default:
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mcasp_clr_bits(dev->base +
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DAVINCI_MCASP_RFIFOCTL, FIFO_ENABLE);
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}
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}
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mcasp_stop_rx(dev);
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}
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}
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@ -622,20 +661,37 @@ static void davinci_hw_common_param(struct davinci_audio_dev *dev, int stream)
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if (dev->txnumevt * tx_ser > 64)
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dev->txnumevt = 1;
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mcasp_mod_bits(dev->base + DAVINCI_MCASP_WFIFOCTL, tx_ser,
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switch (dev->version) {
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case MCASP_VERSION_3:
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mcasp_mod_bits(dev->base + MCASP_VER3_WFIFOCTL, tx_ser,
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NUMDMA_MASK);
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mcasp_mod_bits(dev->base + DAVINCI_MCASP_WFIFOCTL,
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mcasp_mod_bits(dev->base + MCASP_VER3_WFIFOCTL,
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((dev->txnumevt * tx_ser) << 8), NUMEVT_MASK);
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break;
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default:
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mcasp_mod_bits(dev->base + DAVINCI_MCASP_WFIFOCTL,
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tx_ser, NUMDMA_MASK);
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mcasp_mod_bits(dev->base + DAVINCI_MCASP_WFIFOCTL,
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((dev->txnumevt * tx_ser) << 8), NUMEVT_MASK);
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}
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}
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if (dev->rxnumevt && stream == SNDRV_PCM_STREAM_CAPTURE) {
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if (dev->rxnumevt * rx_ser > 64)
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dev->rxnumevt = 1;
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mcasp_mod_bits(dev->base + DAVINCI_MCASP_RFIFOCTL, rx_ser,
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switch (dev->version) {
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case MCASP_VERSION_3:
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mcasp_mod_bits(dev->base + MCASP_VER3_RFIFOCTL, rx_ser,
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NUMDMA_MASK);
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mcasp_mod_bits(dev->base + DAVINCI_MCASP_RFIFOCTL,
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mcasp_mod_bits(dev->base + MCASP_VER3_RFIFOCTL,
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((dev->rxnumevt * rx_ser) << 8), NUMEVT_MASK);
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break;
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default:
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mcasp_mod_bits(dev->base + DAVINCI_MCASP_RFIFOCTL,
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rx_ser, NUMDMA_MASK);
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mcasp_mod_bits(dev->base + DAVINCI_MCASP_RFIFOCTL,
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((dev->rxnumevt * rx_ser) << 8), NUMEVT_MASK);
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}
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}
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}
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@ -874,6 +930,10 @@ static const struct of_device_id mcasp_dt_ids[] = {
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.compatible = "ti,da830-mcasp-audio",
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.data = (void *)MCASP_VERSION_2,
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},
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{
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.compatible = "ti,omap2-mcasp-audio",
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.data = (void *)MCASP_VERSION_3,
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},
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{ /* sentinel */ }
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};
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MODULE_DEVICE_TABLE(of, mcasp_dt_ids);
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