mcp23s08 spi gpio expander support
Basic driver for 8-bit SPI based MCP23S08 GPIO expander, without support for IRQs or the shared chipselect mechanism. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Cc: Jean Delvare <khali@linux-fr.org> Cc: Eric Miao <eric.miao@marvell.com> Cc: Sam Ravnborg <sam@ravnborg.org> Cc: Haavard Skinnemoen <hskinnemoen@atmel.com> Cc: Philipp Zabel <philipp.zabel@gmail.com> Cc: Russell King <rmk@arm.linux.org.uk> Cc: Ben Gardner <bgardner@wabtec.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
This commit is contained in:
David Brownell
Linus Torvalds
parent
15fae37d9f
commit
e58b9e2762
4 changed files with 389 additions and 0 deletions
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@ -52,4 +52,11 @@ config GPIO_PCF857X
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comment "SPI GPIO expanders:"
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config GPIO_MCP23S08
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tristate "Microchip MCP23S08 I/O expander"
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depends on SPI_MASTER
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help
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SPI driver for Microchip MCP23S08 I/O expander. This provides
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a GPIO interface supporting inputs and outputs.
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endmenu
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@ -4,4 +4,5 @@ ccflags-$(CONFIG_DEBUG_GPIO) += -DDEBUG
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obj-$(CONFIG_HAVE_GPIO_LIB) += gpiolib.o
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obj-$(CONFIG_GPIO_MCP23S08) += mcp23s08.o
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obj-$(CONFIG_GPIO_PCF857X) += pcf857x.o
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357
drivers/gpio/mcp23s08.c
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357
drivers/gpio/mcp23s08.c
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@ -0,0 +1,357 @@
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/*
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* mcp23s08.c - SPI gpio expander driver
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*/
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#include <linux/kernel.h>
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#include <linux/device.h>
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#include <linux/workqueue.h>
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#include <linux/mutex.h>
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#include <linux/spi/spi.h>
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#include <linux/spi/mcp23s08.h>
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#include <asm/gpio.h>
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/* Registers are all 8 bits wide.
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*
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* The mcp23s17 has twice as many bits, and can be configured to work
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* with either 16 bit registers or with two adjacent 8 bit banks.
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*
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* Also, there are I2C versions of both chips.
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*/
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#define MCP_IODIR 0x00 /* init/reset: all ones */
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#define MCP_IPOL 0x01
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#define MCP_GPINTEN 0x02
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#define MCP_DEFVAL 0x03
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#define MCP_INTCON 0x04
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#define MCP_IOCON 0x05
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# define IOCON_SEQOP (1 << 5)
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# define IOCON_HAEN (1 << 3)
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# define IOCON_ODR (1 << 2)
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# define IOCON_INTPOL (1 << 1)
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#define MCP_GPPU 0x06
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#define MCP_INTF 0x07
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#define MCP_INTCAP 0x08
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#define MCP_GPIO 0x09
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#define MCP_OLAT 0x0a
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struct mcp23s08 {
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struct spi_device *spi;
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u8 addr;
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/* lock protects the cached values */
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struct mutex lock;
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u8 cache[11];
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struct gpio_chip chip;
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struct work_struct work;
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};
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static int mcp23s08_read(struct mcp23s08 *mcp, unsigned reg)
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{
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u8 tx[2], rx[1];
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int status;
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tx[0] = mcp->addr | 0x01;
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tx[1] = reg;
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status = spi_write_then_read(mcp->spi, tx, sizeof tx, rx, sizeof rx);
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return (status < 0) ? status : rx[0];
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}
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static int mcp23s08_write(struct mcp23s08 *mcp, unsigned reg, u8 val)
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{
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u8 tx[3];
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tx[0] = mcp->addr;
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tx[1] = reg;
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tx[2] = val;
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return spi_write_then_read(mcp->spi, tx, sizeof tx, NULL, 0);
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}
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static int
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mcp23s08_read_regs(struct mcp23s08 *mcp, unsigned reg, u8 *vals, unsigned n)
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{
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u8 tx[2];
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if ((n + reg) > sizeof mcp->cache)
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return -EINVAL;
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tx[0] = mcp->addr | 0x01;
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tx[1] = reg;
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return spi_write_then_read(mcp->spi, tx, sizeof tx, vals, n);
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}
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/*----------------------------------------------------------------------*/
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static int mcp23s08_direction_input(struct gpio_chip *chip, unsigned offset)
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{
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struct mcp23s08 *mcp = container_of(chip, struct mcp23s08, chip);
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int status;
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mutex_lock(&mcp->lock);
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mcp->cache[MCP_IODIR] |= (1 << offset);
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status = mcp23s08_write(mcp, MCP_IODIR, mcp->cache[MCP_IODIR]);
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mutex_unlock(&mcp->lock);
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return status;
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}
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static int mcp23s08_get(struct gpio_chip *chip, unsigned offset)
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{
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struct mcp23s08 *mcp = container_of(chip, struct mcp23s08, chip);
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int status;
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mutex_lock(&mcp->lock);
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/* REVISIT reading this clears any IRQ ... */
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status = mcp23s08_read(mcp, MCP_GPIO);
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if (status < 0)
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status = 0;
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else {
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mcp->cache[MCP_GPIO] = status;
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status = !!(status & (1 << offset));
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}
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mutex_unlock(&mcp->lock);
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return status;
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}
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static int __mcp23s08_set(struct mcp23s08 *mcp, unsigned mask, int value)
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{
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u8 olat = mcp->cache[MCP_OLAT];
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if (value)
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olat |= mask;
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else
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olat &= ~mask;
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mcp->cache[MCP_OLAT] = olat;
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return mcp23s08_write(mcp, MCP_OLAT, olat);
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}
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static void mcp23s08_set(struct gpio_chip *chip, unsigned offset, int value)
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{
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struct mcp23s08 *mcp = container_of(chip, struct mcp23s08, chip);
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u8 mask = 1 << offset;
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mutex_lock(&mcp->lock);
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__mcp23s08_set(mcp, mask, value);
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mutex_unlock(&mcp->lock);
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}
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static int
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mcp23s08_direction_output(struct gpio_chip *chip, unsigned offset, int value)
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{
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struct mcp23s08 *mcp = container_of(chip, struct mcp23s08, chip);
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u8 mask = 1 << offset;
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int status;
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mutex_lock(&mcp->lock);
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status = __mcp23s08_set(mcp, mask, value);
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if (status == 0) {
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mcp->cache[MCP_IODIR] &= ~mask;
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status = mcp23s08_write(mcp, MCP_IODIR, mcp->cache[MCP_IODIR]);
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}
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mutex_unlock(&mcp->lock);
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return status;
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}
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/*----------------------------------------------------------------------*/
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#ifdef CONFIG_DEBUG_FS
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#include <linux/seq_file.h>
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/*
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* This shows more info than the generic gpio dump code:
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* pullups, deglitching, open drain drive.
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*/
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static void mcp23s08_dbg_show(struct seq_file *s, struct gpio_chip *chip)
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{
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struct mcp23s08 *mcp;
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char bank;
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unsigned t;
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unsigned mask;
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mcp = container_of(chip, struct mcp23s08, chip);
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/* NOTE: we only handle one bank for now ... */
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bank = '0' + ((mcp->addr >> 1) & 0x3);
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mutex_lock(&mcp->lock);
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t = mcp23s08_read_regs(mcp, 0, mcp->cache, sizeof mcp->cache);
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if (t < 0) {
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seq_printf(s, " I/O ERROR %d\n", t);
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goto done;
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}
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for (t = 0, mask = 1; t < 8; t++, mask <<= 1) {
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const char *label;
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label = gpiochip_is_requested(chip, t);
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if (!label)
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continue;
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seq_printf(s, " gpio-%-3d P%c.%d (%-12s) %s %s %s",
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chip->base + t, bank, t, label,
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(mcp->cache[MCP_IODIR] & mask) ? "in " : "out",
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(mcp->cache[MCP_GPIO] & mask) ? "hi" : "lo",
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(mcp->cache[MCP_GPPU] & mask) ? " " : "up");
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/* NOTE: ignoring the irq-related registers */
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seq_printf(s, "\n");
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}
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done:
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mutex_unlock(&mcp->lock);
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}
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#else
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#define mcp23s08_dbg_show NULL
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#endif
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/*----------------------------------------------------------------------*/
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static int mcp23s08_probe(struct spi_device *spi)
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{
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struct mcp23s08 *mcp;
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struct mcp23s08_platform_data *pdata;
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int status;
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int do_update = 0;
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pdata = spi->dev.platform_data;
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if (!pdata || pdata->slave > 3 || !pdata->base)
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return -ENODEV;
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mcp = kzalloc(sizeof *mcp, GFP_KERNEL);
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if (!mcp)
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return -ENOMEM;
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mutex_init(&mcp->lock);
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mcp->spi = spi;
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mcp->addr = 0x40 | (pdata->slave << 1);
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mcp->chip.label = "mcp23s08",
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mcp->chip.direction_input = mcp23s08_direction_input;
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mcp->chip.get = mcp23s08_get;
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mcp->chip.direction_output = mcp23s08_direction_output;
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mcp->chip.set = mcp23s08_set;
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mcp->chip.dbg_show = mcp23s08_dbg_show;
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mcp->chip.base = pdata->base;
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mcp->chip.ngpio = 8;
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mcp->chip.can_sleep = 1;
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spi_set_drvdata(spi, mcp);
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/* verify MCP_IOCON.SEQOP = 0, so sequential reads work */
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status = mcp23s08_read(mcp, MCP_IOCON);
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if (status < 0)
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goto fail;
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if (status & IOCON_SEQOP) {
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status &= ~IOCON_SEQOP;
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status = mcp23s08_write(mcp, MCP_IOCON, (u8) status);
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if (status < 0)
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goto fail;
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}
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/* configure ~100K pullups */
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status = mcp23s08_write(mcp, MCP_GPPU, pdata->pullups);
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if (status < 0)
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goto fail;
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status = mcp23s08_read_regs(mcp, 0, mcp->cache, sizeof mcp->cache);
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if (status < 0)
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goto fail;
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/* disable inverter on input */
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if (mcp->cache[MCP_IPOL] != 0) {
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mcp->cache[MCP_IPOL] = 0;
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do_update = 1;
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}
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/* disable irqs */
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if (mcp->cache[MCP_GPINTEN] != 0) {
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mcp->cache[MCP_GPINTEN] = 0;
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do_update = 1;
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}
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if (do_update) {
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u8 tx[4];
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tx[0] = mcp->addr;
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tx[1] = MCP_IPOL;
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memcpy(&tx[2], &mcp->cache[MCP_IPOL], sizeof(tx) - 2);
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status = spi_write_then_read(mcp->spi, tx, sizeof tx, NULL, 0);
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/* FIXME check status... */
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}
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status = gpiochip_add(&mcp->chip);
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/* NOTE: these chips have a relatively sane IRQ framework, with
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* per-signal masking and level/edge triggering. It's not yet
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* handled here...
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*/
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if (pdata->setup) {
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status = pdata->setup(spi, mcp->chip.base,
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mcp->chip.ngpio, pdata->context);
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if (status < 0)
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dev_dbg(&spi->dev, "setup --> %d\n", status);
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}
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return 0;
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fail:
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kfree(mcp);
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return status;
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}
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static int mcp23s08_remove(struct spi_device *spi)
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{
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struct mcp23s08 *mcp = spi_get_drvdata(spi);
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struct mcp23s08_platform_data *pdata = spi->dev.platform_data;
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int status = 0;
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if (pdata->teardown) {
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status = pdata->teardown(spi,
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mcp->chip.base, mcp->chip.ngpio,
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pdata->context);
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if (status < 0) {
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dev_err(&spi->dev, "%s --> %d\n", "teardown", status);
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return status;
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}
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}
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status = gpiochip_remove(&mcp->chip);
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if (status == 0)
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kfree(mcp);
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else
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dev_err(&spi->dev, "%s --> %d\n", "remove", status);
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return status;
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}
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static struct spi_driver mcp23s08_driver = {
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.probe = mcp23s08_probe,
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.remove = mcp23s08_remove,
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.driver = {
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.name = "mcp23s08",
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.owner = THIS_MODULE,
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},
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};
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/*----------------------------------------------------------------------*/
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static int __init mcp23s08_init(void)
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{
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return spi_register_driver(&mcp23s08_driver);
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}
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module_init(mcp23s08_init);
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static void __exit mcp23s08_exit(void)
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{
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spi_unregister_driver(&mcp23s08_driver);
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}
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module_exit(mcp23s08_exit);
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MODULE_LICENSE("GPL");
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24
include/linux/spi/mcp23s08.h
Normal file
24
include/linux/spi/mcp23s08.h
Normal file
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@ -0,0 +1,24 @@
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/* FIXME driver should be able to handle all four slaves that
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* can be hooked up to each chipselect, as well as IRQs...
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*/
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struct mcp23s08_platform_data {
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/* four slaves can share one SPI chipselect */
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u8 slave;
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/* number assigned to the first GPIO */
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unsigned base;
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/* pins with pullups */
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u8 pullups;
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void *context; /* param to setup/teardown */
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int (*setup)(struct spi_device *spi,
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int gpio, unsigned ngpio,
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void *context);
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int (*teardown)(struct spi_device *spi,
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int gpio, unsigned ngpio,
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void *context);
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};
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