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i2c: i2c-qcom-geni: Change the high and low time for SCL

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This change is to meet the spec for i2c at 400KHz. Note that there
is a QUP FW change along with this and then only this will work.
FW change takes care of the duty cycle, clock on/off.

Associated FW change is good to have for this SW change.
FW change CR :  TBD separately by HW team.
CR fixed : 3017809.

Change-Id: I2446b736ef5f6cfa5310f4a30a717272d433a655
Signed-off-by: Mukesh Kumar Savaliya <msavaliy@codeaurora.org>
This commit is contained in:
Mukesh Kumar Savaliya 2021-09-23 16:48:27 +05:30
parent c96bcb72d0
commit e4c740102a
1 changed files with 2 additions and 2 deletions
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4
drivers/i2c/busses/i2c-qcom-geni.c
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@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (c) 2017-2020, The Linux Foundation. All rights reserved.
* Copyright (c) 2017-2021, The Linux Foundation. All rights reserved.
*/
#include <linux/clk.h>
@ -165,7 +165,7 @@ struct geni_i2c_clk_fld {
static struct geni_i2c_clk_fld geni_i2c_clk_map[] = {
{KHz(100), 7, 10, 11, 26},
{KHz(400), 2, 5, 12, 24},
{KHz(400), 2, 7, 10, 24},
{KHz(1000), 1, 3, 9, 18},
};