ARM: CPU hotplug: fix hard-coded control register constants
Use the definition we've provided in asm/system.h rather than numeric constants. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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e9882777d9
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e3d9c625f5
3 changed files with 12 additions and 12 deletions
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@ -31,10 +31,10 @@ static inline void cpu_enter_lowpower(void)
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" bic %0, %0, #0x20\n"
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" bic %0, %0, #0x20\n"
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" mcr p15, 0, %0, c1, c0, 1\n"
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" mcr p15, 0, %0, c1, c0, 1\n"
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" mrc p15, 0, %0, c1, c0, 0\n"
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" mrc p15, 0, %0, c1, c0, 0\n"
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" bic %0, %0, #0x04\n"
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" bic %0, %0, %2\n"
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" mcr p15, 0, %0, c1, c0, 0\n"
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" mcr p15, 0, %0, c1, c0, 0\n"
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: "=&r" (v)
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: "=&r" (v)
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: "r" (0)
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: "r" (0), "Ir" (CR_C)
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: "cc");
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: "cc");
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}
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}
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@ -43,13 +43,13 @@ static inline void cpu_leave_lowpower(void)
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unsigned int v;
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unsigned int v;
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asm volatile( "mrc p15, 0, %0, c1, c0, 0\n"
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asm volatile( "mrc p15, 0, %0, c1, c0, 0\n"
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" orr %0, %0, #0x04\n"
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" orr %0, %0, %1\n"
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" mcr p15, 0, %0, c1, c0, 0\n"
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" mcr p15, 0, %0, c1, c0, 0\n"
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" mrc p15, 0, %0, c1, c0, 1\n"
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" mrc p15, 0, %0, c1, c0, 1\n"
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" orr %0, %0, #0x20\n"
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" orr %0, %0, #0x20\n"
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" mcr p15, 0, %0, c1, c0, 1\n"
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" mcr p15, 0, %0, c1, c0, 1\n"
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: "=&r" (v)
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: "=&r" (v)
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:
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: "Ir" (CR_C)
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: "cc");
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: "cc");
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}
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}
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@ -30,13 +30,13 @@ static inline void cpu_enter_lowpower(void)
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* Turn off coherency
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* Turn off coherency
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*/
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*/
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" mrc p15, 0, %0, c1, c0, 1\n"
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" mrc p15, 0, %0, c1, c0, 1\n"
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" bic %0, %0, #0x20\n"
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" bic %0, %0, %2\n"
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" mcr p15, 0, %0, c1, c0, 1\n"
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" mcr p15, 0, %0, c1, c0, 1\n"
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" mrc p15, 0, %0, c1, c0, 0\n"
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" mrc p15, 0, %0, c1, c0, 0\n"
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" bic %0, %0, #0x04\n"
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" bic %0, %0, #0x04\n"
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" mcr p15, 0, %0, c1, c0, 0\n"
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" mcr p15, 0, %0, c1, c0, 0\n"
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: "=&r" (v)
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: "=&r" (v)
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: "r" (0)
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: "r" (0), "Ir" (CR_C)
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: "cc");
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: "cc");
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}
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}
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@ -46,13 +46,13 @@ static inline void cpu_leave_lowpower(void)
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asm volatile(
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asm volatile(
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"mrc p15, 0, %0, c1, c0, 0\n"
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"mrc p15, 0, %0, c1, c0, 0\n"
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" orr %0, %0, #0x04\n"
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" orr %0, %0, %1\n"
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" mcr p15, 0, %0, c1, c0, 0\n"
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" mcr p15, 0, %0, c1, c0, 0\n"
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" mrc p15, 0, %0, c1, c0, 1\n"
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" mrc p15, 0, %0, c1, c0, 1\n"
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" orr %0, %0, #0x20\n"
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" orr %0, %0, #0x20\n"
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" mcr p15, 0, %0, c1, c0, 1\n"
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" mcr p15, 0, %0, c1, c0, 1\n"
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: "=&r" (v)
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: "=&r" (v)
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:
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: "Ir" (CR_C)
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: "cc");
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: "cc");
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}
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}
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@ -26,13 +26,13 @@ static inline void cpu_enter_lowpower(void)
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* Turn off coherency
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* Turn off coherency
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*/
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*/
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" mrc p15, 0, %0, c1, c0, 1\n"
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" mrc p15, 0, %0, c1, c0, 1\n"
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" bic %0, %0, #0x20\n"
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" bic %0, %0, %2\n"
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" mcr p15, 0, %0, c1, c0, 1\n"
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" mcr p15, 0, %0, c1, c0, 1\n"
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" mrc p15, 0, %0, c1, c0, 0\n"
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" mrc p15, 0, %0, c1, c0, 0\n"
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" bic %0, %0, #0x04\n"
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" bic %0, %0, #0x04\n"
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" mcr p15, 0, %0, c1, c0, 0\n"
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" mcr p15, 0, %0, c1, c0, 0\n"
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: "=&r" (v)
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: "=&r" (v)
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: "r" (0)
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: "r" (0), "Ir" (CR_C)
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: "cc");
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: "cc");
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}
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}
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@ -42,13 +42,13 @@ static inline void cpu_leave_lowpower(void)
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asm volatile(
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asm volatile(
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"mrc p15, 0, %0, c1, c0, 0\n"
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"mrc p15, 0, %0, c1, c0, 0\n"
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" orr %0, %0, #0x04\n"
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" orr %0, %0, %1\n"
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" mcr p15, 0, %0, c1, c0, 0\n"
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" mcr p15, 0, %0, c1, c0, 0\n"
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" mrc p15, 0, %0, c1, c0, 1\n"
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" mrc p15, 0, %0, c1, c0, 1\n"
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" orr %0, %0, #0x20\n"
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" orr %0, %0, #0x20\n"
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" mcr p15, 0, %0, c1, c0, 1\n"
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" mcr p15, 0, %0, c1, c0, 1\n"
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: "=&r" (v)
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: "=&r" (v)
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:
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: "Ir" (CR_C)
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: "cc");
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: "cc");
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}
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}
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