Merge branch 'linus' of git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6
Pull crypto fixes from Herbert Xu: "This fixes a bug in CBC/CTR on ARM64 that breaks chaining as well as a bug in the core API that causes registration failures when a driver unloads and then reloads an algorithm" * 'linus' of git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6: crypto: arm64/aes-blk - honour iv_out requirement in CBC and CTR modes crypto: api - Clear CRYPTO_ALG_DEAD bit before registering an alg
This commit is contained in:
Linus Torvalds
commit
e387dc122f
2 changed files with 44 additions and 47 deletions
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@ -193,15 +193,16 @@ AES_ENTRY(aes_cbc_encrypt)
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cbz w6, .Lcbcencloop
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ld1 {v0.16b}, [x5] /* get iv */
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enc_prepare w3, x2, x5
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enc_prepare w3, x2, x6
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.Lcbcencloop:
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ld1 {v1.16b}, [x1], #16 /* get next pt block */
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eor v0.16b, v0.16b, v1.16b /* ..and xor with iv */
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encrypt_block v0, w3, x2, x5, w6
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encrypt_block v0, w3, x2, x6, w7
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st1 {v0.16b}, [x0], #16
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subs w4, w4, #1
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bne .Lcbcencloop
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st1 {v0.16b}, [x5] /* return iv */
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ret
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AES_ENDPROC(aes_cbc_encrypt)
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@ -211,7 +212,7 @@ AES_ENTRY(aes_cbc_decrypt)
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cbz w6, .LcbcdecloopNx
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ld1 {v7.16b}, [x5] /* get iv */
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dec_prepare w3, x2, x5
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dec_prepare w3, x2, x6
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.LcbcdecloopNx:
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#if INTERLEAVE >= 2
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@ -248,7 +249,7 @@ AES_ENTRY(aes_cbc_decrypt)
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.Lcbcdecloop:
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ld1 {v1.16b}, [x1], #16 /* get next ct block */
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mov v0.16b, v1.16b /* ...and copy to v0 */
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decrypt_block v0, w3, x2, x5, w6
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decrypt_block v0, w3, x2, x6, w7
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eor v0.16b, v0.16b, v7.16b /* xor with iv => pt */
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mov v7.16b, v1.16b /* ct is next iv */
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st1 {v0.16b}, [x0], #16
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@ -256,6 +257,7 @@ AES_ENTRY(aes_cbc_decrypt)
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bne .Lcbcdecloop
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.Lcbcdecout:
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FRAME_POP
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st1 {v7.16b}, [x5] /* return iv */
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ret
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AES_ENDPROC(aes_cbc_decrypt)
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@ -267,24 +269,15 @@ AES_ENDPROC(aes_cbc_decrypt)
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AES_ENTRY(aes_ctr_encrypt)
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FRAME_PUSH
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cbnz w6, .Lctrfirst /* 1st time around? */
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umov x5, v4.d[1] /* keep swabbed ctr in reg */
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rev x5, x5
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#if INTERLEAVE >= 2
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cmn w5, w4 /* 32 bit overflow? */
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bcs .Lctrinc
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add x5, x5, #1 /* increment BE ctr */
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b .LctrincNx
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#else
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b .Lctrinc
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#endif
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.Lctrfirst:
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cbz w6, .Lctrnotfirst /* 1st time around? */
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enc_prepare w3, x2, x6
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ld1 {v4.16b}, [x5]
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umov x5, v4.d[1] /* keep swabbed ctr in reg */
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rev x5, x5
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.Lctrnotfirst:
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umov x8, v4.d[1] /* keep swabbed ctr in reg */
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rev x8, x8
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#if INTERLEAVE >= 2
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cmn w5, w4 /* 32 bit overflow? */
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cmn w8, w4 /* 32 bit overflow? */
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bcs .Lctrloop
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.LctrloopNx:
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subs w4, w4, #INTERLEAVE
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@ -292,11 +285,11 @@ AES_ENTRY(aes_ctr_encrypt)
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#if INTERLEAVE == 2
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mov v0.8b, v4.8b
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mov v1.8b, v4.8b
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rev x7, x5
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add x5, x5, #1
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rev x7, x8
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add x8, x8, #1
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ins v0.d[1], x7
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rev x7, x5
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add x5, x5, #1
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rev x7, x8
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add x8, x8, #1
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ins v1.d[1], x7
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ld1 {v2.16b-v3.16b}, [x1], #32 /* get 2 input blocks */
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do_encrypt_block2x
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@ -305,7 +298,7 @@ AES_ENTRY(aes_ctr_encrypt)
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st1 {v0.16b-v1.16b}, [x0], #32
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#else
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ldr q8, =0x30000000200000001 /* addends 1,2,3[,0] */
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dup v7.4s, w5
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dup v7.4s, w8
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mov v0.16b, v4.16b
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add v7.4s, v7.4s, v8.4s
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mov v1.16b, v4.16b
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@ -323,18 +316,12 @@ AES_ENTRY(aes_ctr_encrypt)
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eor v2.16b, v7.16b, v2.16b
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eor v3.16b, v5.16b, v3.16b
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st1 {v0.16b-v3.16b}, [x0], #64
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add x5, x5, #INTERLEAVE
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add x8, x8, #INTERLEAVE
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#endif
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cbz w4, .LctroutNx
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.LctrincNx:
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rev x7, x5
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rev x7, x8
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ins v4.d[1], x7
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cbz w4, .Lctrout
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b .LctrloopNx
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.LctroutNx:
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sub x5, x5, #1
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rev x7, x5
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ins v4.d[1], x7
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b .Lctrout
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.Lctr1x:
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adds w4, w4, #INTERLEAVE
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beq .Lctrout
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@ -342,30 +329,39 @@ AES_ENTRY(aes_ctr_encrypt)
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.Lctrloop:
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mov v0.16b, v4.16b
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encrypt_block v0, w3, x2, x6, w7
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adds x8, x8, #1 /* increment BE ctr */
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rev x7, x8
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ins v4.d[1], x7
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bcs .Lctrcarry /* overflow? */
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.Lctrcarrydone:
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subs w4, w4, #1
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bmi .Lctrhalfblock /* blocks < 0 means 1/2 block */
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ld1 {v3.16b}, [x1], #16
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eor v3.16b, v0.16b, v3.16b
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st1 {v3.16b}, [x0], #16
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beq .Lctrout
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.Lctrinc:
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adds x5, x5, #1 /* increment BE ctr */
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rev x7, x5
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ins v4.d[1], x7
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bcc .Lctrloop /* no overflow? */
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bne .Lctrloop
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.Lctrout:
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st1 {v4.16b}, [x5] /* return next CTR value */
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FRAME_POP
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ret
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.Lctrhalfblock:
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ld1 {v3.8b}, [x1]
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eor v3.8b, v0.8b, v3.8b
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st1 {v3.8b}, [x0]
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FRAME_POP
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ret
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.Lctrcarry:
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umov x7, v4.d[0] /* load upper word of ctr */
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rev x7, x7 /* ... to handle the carry */
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add x7, x7, #1
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rev x7, x7
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ins v4.d[0], x7
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b .Lctrloop
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.Lctrhalfblock:
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ld1 {v3.8b}, [x1]
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eor v3.8b, v0.8b, v3.8b
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st1 {v3.8b}, [x0]
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.Lctrout:
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FRAME_POP
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ret
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b .Lctrcarrydone
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AES_ENDPROC(aes_ctr_encrypt)
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.ltorg
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@ -356,6 +356,7 @@ int crypto_register_alg(struct crypto_alg *alg)
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struct crypto_larval *larval;
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int err;
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alg->cra_flags &= ~CRYPTO_ALG_DEAD;
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err = crypto_check_alg(alg);
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if (err)
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return err;
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