mmc: sh_mmcif: Configure DMA slave bus width
The data register is 4 bytes wide, hardcode the DMA transfer size to 4 bytes in both directions. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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1 changed files with 5 additions and 2 deletions
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@ -418,10 +418,13 @@ sh_mmcif_request_dma_one(struct sh_mmcif_host *host,
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cfg.slave_id = slave_id;
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cfg.direction = direction;
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if (direction == DMA_DEV_TO_MEM)
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if (direction == DMA_DEV_TO_MEM) {
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cfg.src_addr = res->start + MMCIF_CE_DATA;
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else
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cfg.src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
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} else {
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cfg.dst_addr = res->start + MMCIF_CE_DATA;
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cfg.dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
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}
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ret = dmaengine_slave_config(chan, &cfg);
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if (ret < 0) {
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