lib: use generic pci_iomap on all architectures

Many architectures don't want to pull in iomap.c,
 so they ended up duplicating pci_iomap from that file.
 That function isn't trivial, and we are going to modify it
 https://lkml.org/lkml/2011/11/14/183
 so the duplication hurts.
 
 This reduces the scope of the problem significantly,
 by moving pci_iomap to a separate file and
 referencing that from all architectures.
 
 Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
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Merge tag 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/mst/vhost

lib: use generic pci_iomap on all architectures

Many architectures don't want to pull in iomap.c,
so they ended up duplicating pci_iomap from that file.
That function isn't trivial, and we are going to modify it
https://lkml.org/lkml/2011/11/14/183
so the duplication hurts.

This reduces the scope of the problem significantly,
by moving pci_iomap to a separate file and
referencing that from all architectures.

* tag 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/mst/vhost:
  alpha: drop pci_iomap/pci_iounmap from pci-noop.c
  mn10300: switch to GENERIC_PCI_IOMAP
  mn10300: add missing __iomap markers
  frv: switch to GENERIC_PCI_IOMAP
  tile: switch to GENERIC_PCI_IOMAP
  tile: don't panic on iomap
  sparc: switch to GENERIC_PCI_IOMAP
  sh: switch to GENERIC_PCI_IOMAP
  powerpc: switch to GENERIC_PCI_IOMAP
  parisc: switch to GENERIC_PCI_IOMAP
  mips: switch to GENERIC_PCI_IOMAP
  microblaze: switch to GENERIC_PCI_IOMAP
  arm: switch to GENERIC_PCI_IOMAP
  alpha: switch to GENERIC_PCI_IOMAP
  lib: add GENERIC_PCI_IOMAP
  lib: move GENERIC_IOMAP to lib/Kconfig

Fix up trivial conflicts due to changes nearby in arch/{m68k,score}/Kconfig
This commit is contained in:
Linus Torvalds 2012-01-10 18:04:27 -08:00
commit e343a895a9
48 changed files with 124 additions and 369 deletions

View file

@ -70,10 +70,6 @@ config GENERIC_ISA_DMA
bool
default y
config GENERIC_IOMAP
bool
default n
source "init/Kconfig"
source "kernel/Kconfig.freezer"
@ -319,6 +315,7 @@ config ISA_DMA_API
config PCI
bool
depends on !ALPHA_JENSEN
select GENERIC_PCI_IOMAP
default y
help
Find out whether you have a PCI motherboard. PCI is the name of a

View file

@ -185,15 +185,3 @@ struct dma_map_ops alpha_noop_ops = {
struct dma_map_ops *dma_ops = &alpha_noop_ops;
EXPORT_SYMBOL(dma_ops);
void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long maxlen)
{
return NULL;
}
void pci_iounmap(struct pci_dev *dev, void __iomem * addr)
{
}
EXPORT_SYMBOL(pci_iomap);
EXPORT_SYMBOL(pci_iounmap);

View file

@ -508,30 +508,7 @@ sys_pciconfig_iobase(long which, unsigned long bus, unsigned long dfn)
return -EOPNOTSUPP;
}
/* Create an __iomem token from a PCI BAR. Copied from lib/iomap.c with
no changes, since we don't want the other things in that object file. */
void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long maxlen)
{
resource_size_t start = pci_resource_start(dev, bar);
resource_size_t len = pci_resource_len(dev, bar);
unsigned long flags = pci_resource_flags(dev, bar);
if (!len || !start)
return NULL;
if (maxlen && len > maxlen)
len = maxlen;
if (flags & IORESOURCE_IO)
return ioport_map(start, len);
if (flags & IORESOURCE_MEM) {
/* Not checking IORESOURCE_CACHEABLE because alpha does
not distinguish between ioremap and ioremap_nocache. */
return ioremap(start, len);
}
return NULL;
}
/* Destroy that token. Not copied from lib/iomap.c. */
/* Destroy an __iomem token. Not copied from lib/iomap.c. */
void pci_iounmap(struct pci_dev *dev, void __iomem * addr)
{
@ -539,7 +516,6 @@ void pci_iounmap(struct pci_dev *dev, void __iomem * addr)
iounmap(addr);
}
EXPORT_SYMBOL(pci_iomap);
EXPORT_SYMBOL(pci_iounmap);
/* FIXME: Some boxes have multiple ISA bridges! */

View file

@ -31,6 +31,7 @@ config ARM
select HAVE_SPARSE_IRQ
select GENERIC_IRQ_SHOW
select CPU_PM if (SUSPEND || CPU_IDLE)
select GENERIC_PCI_IOMAP
help
The ARM series is a line of low-power-consumption RISC chip designs
licensed by ARM Ltd and targeted at embedded applications and

View file

@ -27,6 +27,7 @@
#include <asm/byteorder.h>
#include <asm/memory.h>
#include <asm/system.h>
#include <asm-generic/pci_iomap.h>
/*
* ISA I/O bus memory addresses are 1:1 with the physical address.
@ -306,7 +307,6 @@ extern void ioport_unmap(void __iomem *addr);
struct pci_dev;
extern void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long maxlen);
extern void pci_iounmap(struct pci_dev *dev, void __iomem *addr);
/*

View file

@ -35,27 +35,6 @@ EXPORT_SYMBOL(pcibios_min_mem);
unsigned int pci_flags = PCI_REASSIGN_ALL_RSRC;
EXPORT_SYMBOL(pci_flags);
void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long maxlen)
{
resource_size_t start = pci_resource_start(dev, bar);
resource_size_t len = pci_resource_len(dev, bar);
unsigned long flags = pci_resource_flags(dev, bar);
if (!len || !start)
return NULL;
if (maxlen && len > maxlen)
len = maxlen;
if (flags & IORESOURCE_IO)
return ioport_map(start, len);
if (flags & IORESOURCE_MEM) {
if (flags & IORESOURCE_CACHEABLE)
return ioremap(start, len);
return ioremap_nocache(start, len);
}
return NULL;
}
EXPORT_SYMBOL(pci_iomap);
void pci_iounmap(struct pci_dev *dev, void __iomem *addr)
{
if ((unsigned long)addr >= VMALLOC_START &&

View file

@ -19,10 +19,6 @@ config GENERIC_CMOS_UPDATE
config ARCH_USES_GETTIMEOFFSET
def_bool n
config GENERIC_IOMAP
bool
default y
config ARCH_HAS_ILOG2_U32
bool
default n
@ -52,6 +48,7 @@ config CRIS
select HAVE_IDE
select HAVE_GENERIC_HARDIRQS
select GENERIC_IRQ_SHOW
select GENERIC_IOMAP
config HZ
int

View file

@ -317,6 +317,7 @@ config PCI
bool "Use PCI"
depends on MB93090_MB00
default y
select GENERIC_PCI_IOMAP
help
Some FR-V systems (such as the MB93090-MB00 VDK) have PCI
onboard. If you have one of these boards and you wish to use the PCI

View file

@ -21,6 +21,7 @@
#include <asm/virtconvert.h>
#include <asm/string.h>
#include <asm/mb-regs.h>
#include <asm-generic/pci_iomap.h>
#include <linux/delay.h>
/*
@ -370,7 +371,6 @@ static inline void iowrite32_rep(void __iomem *p, const void *src, unsigned long
/* Create a virtual mapping cookie for a PCI BAR (memory or IO) */
struct pci_dev;
extern void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long max);
static inline void pci_iounmap(struct pci_dev *dev, void __iomem *p)
{
}

View file

@ -3,7 +3,7 @@
#
ifeq "$(CONFIG_PCI)" "y"
obj-y := pci-frv.o pci-irq.o pci-vdk.o pci-iomap.o
obj-y := pci-frv.o pci-irq.o pci-vdk.o
ifeq "$(CONFIG_MMU)" "y"
obj-y += pci-dma.o

View file

@ -1,29 +0,0 @@
/* pci-iomap.c: description
*
* Copyright (C) 2006 Red Hat, Inc. All Rights Reserved.
* Written by David Howells (dhowells@redhat.com)
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version
* 2 of the License, or (at your option) any later version.
*/
#include <linux/pci.h>
#include <linux/module.h>
void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long maxlen)
{
resource_size_t start = pci_resource_start(dev, bar);
resource_size_t len = pci_resource_len(dev, bar);
unsigned long flags = pci_resource_flags(dev, bar);
if (!len || !start)
return NULL;
if ((flags & IORESOURCE_IO) || (flags & IORESOURCE_MEM))
return (void __iomem *) start;
return NULL;
}
EXPORT_SYMBOL(pci_iomap);

View file

@ -26,6 +26,7 @@ config HEXAGON
select HAVE_ARCH_KGDB
select HAVE_ARCH_TRACEHOOK
select NO_IOPORT
select GENERIC_IOMAP
# mostly generic routines, with some accelerated ones
---help---
Qualcomm Hexagon is a processor architecture designed for high
@ -73,9 +74,6 @@ config GENERIC_CSUM
config GENERIC_IRQ_PROBE
def_bool y
config GENERIC_IOMAP
def_bool y
#config ZONE_DMA
# bool
# default y

View file

@ -32,6 +32,7 @@ config IA64
select GENERIC_IRQ_SHOW
select ARCH_WANT_OPTIONAL_GPIOLIB
select ARCH_HAVE_NMI_SAFE_CMPXCHG
select GENERIC_IOMAP
default y
help
The Itanium Processor Family is Intel's 64-bit successor to
@ -105,10 +106,6 @@ config EFI
bool
default y
config GENERIC_IOMAP
bool
default y
config ARCH_CLOCKSOURCE_DATA
def_bool y

View file

@ -37,9 +37,6 @@ config GENERIC_CALIBRATE_DELAY
bool
default y
config GENERIC_IOMAP
def_bool MMU
config GENERIC_CSUM
bool
@ -81,6 +78,7 @@ source "kernel/Kconfig.freezer"
config MMU
bool "MMU-based Paged Memory Management Support"
default y
select GENERIC_IOMAP
help
Select if you want MMU-based virtualised addressing space
support by paged memory management. If unsure, say 'Y'.

View file

@ -17,6 +17,7 @@ config MICROBLAZE
select HAVE_GENERIC_HARDIRQS
select GENERIC_IRQ_PROBE
select GENERIC_IRQ_SHOW
select GENERIC_PCI_IOMAP
config SWAP
def_bool n

View file

@ -10,25 +10,6 @@
#include <asm/io.h>
#include <asm/pci-bridge.h>
void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long max)
{
resource_size_t start = pci_resource_start(dev, bar);
resource_size_t len = pci_resource_len(dev, bar);
unsigned long flags = pci_resource_flags(dev, bar);
if (!len)
return NULL;
if (max && len > max)
len = max;
if (flags & IORESOURCE_IO)
return ioport_map(start, len);
if (flags & IORESOURCE_MEM)
return ioremap(start, len);
/* What? */
return NULL;
}
EXPORT_SYMBOL(pci_iomap);
void pci_iounmap(struct pci_dev *dev, void __iomem *addr)
{
if (isa_vaddr_is_ioport(addr))

View file

@ -2317,6 +2317,7 @@ config PCI
bool "Support for PCI controller"
depends on HW_HAS_PCI
select PCI_DOMAINS
select GENERIC_PCI_IOMAP
help
Find out whether you have a PCI motherboard. PCI is the name of a
bus system, i.e. the way the CPU talks to the other stuff inside

View file

@ -40,32 +40,6 @@ static void __iomem *ioport_map_pci(struct pci_dev *dev,
return (void __iomem *) (ctrl->io_map_base + port);
}
/*
* Create a virtual mapping cookie for a PCI BAR (memory or IO)
*/
void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long maxlen)
{
resource_size_t start = pci_resource_start(dev, bar);
resource_size_t len = pci_resource_len(dev, bar);
unsigned long flags = pci_resource_flags(dev, bar);
if (!len || !start)
return NULL;
if (maxlen && len > maxlen)
len = maxlen;
if (flags & IORESOURCE_IO)
return ioport_map_pci(dev, start, len);
if (flags & IORESOURCE_MEM) {
if (flags & IORESOURCE_CACHEABLE)
return ioremap(start, len);
return ioremap_nocache(start, len);
}
/* What? */
return NULL;
}
EXPORT_SYMBOL(pci_iomap);
void pci_iounmap(struct pci_dev *dev, void __iomem * addr)
{
iounmap(addr);

View file

@ -252,6 +252,7 @@ config PCI
bool "Use PCI"
depends on MN10300_UNIT_ASB2305
default y
select GENERIC_PCI_IOMAP
help
Some systems (such as the ASB2305) have PCI onboard. If you have one
of these boards and you wish to use the PCI facilities, say Y here.

View file

@ -229,7 +229,6 @@ static inline void outsl(unsigned long addr, const void *buffer, int count)
/* Create a virtual mapping cookie for a PCI BAR (memory or IO) */
struct pci_dev;
extern void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long max);
static inline void pci_iounmap(struct pci_dev *dev, void __iomem *p)
{
}
@ -251,15 +250,15 @@ static inline void *phys_to_virt(unsigned long address)
/*
* Change "struct page" to physical address.
*/
static inline void *__ioremap(unsigned long offset, unsigned long size,
unsigned long flags)
static inline void __iomem *__ioremap(unsigned long offset, unsigned long size,
unsigned long flags)
{
return (void *) offset;
return (void __iomem *) offset;
}
static inline void *ioremap(unsigned long offset, unsigned long size)
static inline void __iomem *ioremap(unsigned long offset, unsigned long size)
{
return (void *) offset;
return (void __iomem *) offset;
}
/*
@ -267,14 +266,14 @@ static inline void *ioremap(unsigned long offset, unsigned long size)
* area. it's useful if some control registers are in such an area and write
* combining or read caching is not desirable:
*/
static inline void *ioremap_nocache(unsigned long offset, unsigned long size)
static inline void __iomem *ioremap_nocache(unsigned long offset, unsigned long size)
{
return (void *) (offset | 0x20000000);
return (void __iomem *) (offset | 0x20000000);
}
#define ioremap_wc ioremap_nocache
static inline void iounmap(void *addr)
static inline void iounmap(void __iomem *addr)
{
}

View file

@ -5,4 +5,4 @@
###############################################################################
obj-y := unit-init.o leds.o
obj-$(CONFIG_PCI) += pci.o pci-asb2305.o pci-irq.o pci-iomap.o
obj-$(CONFIG_PCI) += pci.o pci-asb2305.o pci-irq.o

View file

@ -1,31 +0,0 @@
/* ASB2305 PCI I/O mapping handler
*
* Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
* Written by David Howells (dhowells@redhat.com)
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public Licence
* as published by the Free Software Foundation; either version
* 2 of the Licence, or (at your option) any later version.
*/
#include <linux/pci.h>
#include <linux/module.h>
/*
* Create a virtual mapping cookie for a PCI BAR (memory or IO)
*/
void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long maxlen)
{
resource_size_t start = pci_resource_start(dev, bar);
resource_size_t len = pci_resource_len(dev, bar);
unsigned long flags = pci_resource_flags(dev, bar);
if (!len || !start)
return NULL;
if ((flags & IORESOURCE_IO) || (flags & IORESOURCE_MEM))
return (void __iomem *) start;
return NULL;
}
EXPORT_SYMBOL(pci_iomap);

View file

@ -38,9 +38,6 @@ config RWSEM_XCHGADD_ALGORITHM
config GENERIC_HWEIGHT
def_bool y
config GENERIC_IOMAP
def_bool y
config NO_IOPORT
def_bool y

View file

@ -14,6 +14,7 @@ config PARISC
select GENERIC_ATOMIC64 if !64BIT
select HAVE_GENERIC_HARDIRQS
select GENERIC_IRQ_PROBE
select GENERIC_PCI_IOMAP
select IRQ_PER_CPU
select ARCH_HAVE_NMI_SAFE_CMPXCHG

View file

@ -436,28 +436,6 @@ void ioport_unmap(void __iomem *addr)
}
}
/* Create a virtual mapping cookie for a PCI BAR (memory or IO) */
void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long maxlen)
{
resource_size_t start = pci_resource_start(dev, bar);
resource_size_t len = pci_resource_len(dev, bar);
unsigned long flags = pci_resource_flags(dev, bar);
if (!len || !start)
return NULL;
if (maxlen && len > maxlen)
len = maxlen;
if (flags & IORESOURCE_IO)
return ioport_map(start, len);
if (flags & IORESOURCE_MEM) {
if (flags & IORESOURCE_CACHEABLE)
return ioremap(start, len);
return ioremap_nocache(start, len);
}
/* What? */
return NULL;
}
void pci_iounmap(struct pci_dev *dev, void __iomem * addr)
{
if (!INDIRECT_ADDR(addr)) {
@ -483,5 +461,4 @@ EXPORT_SYMBOL(iowrite16_rep);
EXPORT_SYMBOL(iowrite32_rep);
EXPORT_SYMBOL(ioport_map);
EXPORT_SYMBOL(ioport_unmap);
EXPORT_SYMBOL(pci_iomap);
EXPORT_SYMBOL(pci_iounmap);

View file

@ -718,6 +718,7 @@ config PCI
default PCI_PERMEDIA if !4xx && !CPM2 && !8xx
default PCI_QSPAN if !4xx && !CPM2 && 8xx
select ARCH_SUPPORTS_MSI
select GENERIC_PCI_IOMAP
help
Find out whether your system includes a PCI bus. PCI is the name of
a bus system, i.e. the way the CPU talks to the other stuff inside

View file

@ -119,24 +119,6 @@ EXPORT_SYMBOL(ioport_map);
EXPORT_SYMBOL(ioport_unmap);
#ifdef CONFIG_PCI
void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long max)
{
resource_size_t start = pci_resource_start(dev, bar);
resource_size_t len = pci_resource_len(dev, bar);
unsigned long flags = pci_resource_flags(dev, bar);
if (!len)
return NULL;
if (max && len > max)
len = max;
if (flags & IORESOURCE_IO)
return ioport_map(start, len);
if (flags & IORESOURCE_MEM)
return ioremap(start, len);
/* What? */
return NULL;
}
void pci_iounmap(struct pci_dev *dev, void __iomem *addr)
{
if (isa_vaddr_is_ioport(addr))
@ -146,6 +128,5 @@ void pci_iounmap(struct pci_dev *dev, void __iomem *addr)
iounmap(addr);
}
EXPORT_SYMBOL(pci_iomap);
EXPORT_SYMBOL(pci_iounmap);
#endif /* CONFIG_PCI */

View file

@ -175,9 +175,6 @@ config PPC_INDIRECT_MMIO
config PPC_IO_WORKAROUNDS
bool
config GENERIC_IOMAP
bool
source "drivers/cpufreq/Kconfig"
menu "CPU Frequency drivers"

View file

@ -4,6 +4,7 @@ config SCORE
def_bool y
select HAVE_GENERIC_HARDIRQS
select GENERIC_IRQ_SHOW
select GENERIC_IOMAP
select HAVE_MEMBLOCK
select HAVE_MEMBLOCK_NODE_MAP
select ARCH_DISCARD_MEMBLOCK
@ -36,9 +37,6 @@ endmenu
config CPU_SCORE7
bool
config GENERIC_IOMAP
def_bool y
config NO_DMA
bool
default y

View file

@ -85,9 +85,6 @@ config GENERIC_GPIO
config GENERIC_CALIBRATE_DELAY
bool
config GENERIC_IOMAP
bool
config GENERIC_CLOCKEVENTS
def_bool y
@ -861,6 +858,7 @@ config PCI
bool "PCI support"
depends on SYS_SUPPORTS_PCI
select PCI_DOMAINS
select GENERIC_PCI_IOMAP
help
Find out whether you have a PCI motherboard. PCI is the name of a
bus system, i.e. the way the CPU talks to the other stuff inside

View file

@ -393,29 +393,6 @@ static void __iomem *ioport_map_pci(struct pci_dev *dev,
return (void __iomem *)(chan->io_map_base + port);
}
void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long maxlen)
{
resource_size_t start = pci_resource_start(dev, bar);
resource_size_t len = pci_resource_len(dev, bar);
unsigned long flags = pci_resource_flags(dev, bar);
if (unlikely(!len || !start))
return NULL;
if (maxlen && len > maxlen)
len = maxlen;
if (flags & IORESOURCE_IO)
return ioport_map_pci(dev, start, len);
if (flags & IORESOURCE_MEM) {
if (flags & IORESOURCE_CACHEABLE)
return ioremap(start, len);
return ioremap_nocache(start, len);
}
return NULL;
}
EXPORT_SYMBOL(pci_iomap);
void pci_iounmap(struct pci_dev *dev, void __iomem *addr)
{
iounmap(addr);

View file

@ -28,6 +28,7 @@ config SPARC
select HAVE_GENERIC_HARDIRQS
select GENERIC_IRQ_SHOW
select USE_GENERIC_SMP_HELPERS if SMP
select GENERIC_PCI_IOMAP
config SPARC32
def_bool !64BIT

View file

@ -7,6 +7,7 @@
#include <asm/page.h> /* IO address mapping routines need this */
#include <asm/system.h>
#include <asm-generic/pci_iomap.h>
#define page_to_phys(page) (page_to_pfn(page) << PAGE_SHIFT)
@ -324,7 +325,6 @@ extern void ioport_unmap(void __iomem *);
/* Create a virtual mapping cookie for a PCI BAR (memory or IO) */
struct pci_dev;
extern void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long max);
extern void pci_iounmap(struct pci_dev *dev, void __iomem *);
/*

View file

@ -8,6 +8,7 @@
#include <asm/page.h> /* IO address mapping routines need this */
#include <asm/system.h>
#include <asm/asi.h>
#include <asm-generic/pci_iomap.h>
/* PC crapola... */
#define __SLOW_DOWN_IO do { } while (0)
@ -514,7 +515,6 @@ extern void ioport_unmap(void __iomem *);
/* Create a virtual mapping cookie for a PCI BAR (memory or IO) */
struct pci_dev;
extern void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long max);
extern void pci_iounmap(struct pci_dev *dev, void __iomem *);
static inline int sbus_can_dma_64bit(void)

View file

@ -18,31 +18,8 @@ void ioport_unmap(void __iomem *addr)
EXPORT_SYMBOL(ioport_map);
EXPORT_SYMBOL(ioport_unmap);
/* Create a virtual mapping cookie for a PCI BAR (memory or IO) */
void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long maxlen)
{
resource_size_t start = pci_resource_start(dev, bar);
resource_size_t len = pci_resource_len(dev, bar);
unsigned long flags = pci_resource_flags(dev, bar);
if (!len || !start)
return NULL;
if (maxlen && len > maxlen)
len = maxlen;
if (flags & IORESOURCE_IO)
return ioport_map(start, len);
if (flags & IORESOURCE_MEM) {
if (flags & IORESOURCE_CACHEABLE)
return ioremap(start, len);
return ioremap_nocache(start, len);
}
/* What? */
return NULL;
}
void pci_iounmap(struct pci_dev *dev, void __iomem * addr)
{
/* nothing to do */
}
EXPORT_SYMBOL(pci_iomap);
EXPORT_SYMBOL(pci_iounmap);

View file

@ -321,6 +321,7 @@ config PCI
bool "PCI support"
default y
select PCI_DOMAINS
select GENERIC_PCI_IOMAP
---help---
Enable PCI root complex support, so PCIe endpoint devices can
be attached to the Tile chip. Many, but not all, PCI devices

View file

@ -204,7 +204,8 @@ static inline long ioport_panic(void)
static inline void __iomem *ioport_map(unsigned long port, unsigned int len)
{
return (void __iomem *) ioport_panic();
pr_info("ioport_map: mapping IO resources is unsupported on tile.\n");
return NULL;
}
static inline void ioport_unmap(void __iomem *addr)

View file

@ -16,6 +16,7 @@
#define _ASM_TILE_PCI_H
#include <linux/pci.h>
#include <asm-generic/pci_iomap.h>
/*
* Structure of a PCI controller (host bridge)
@ -49,7 +50,6 @@ struct pci_controller {
int __devinit tile_pci_init(void);
int __devinit pcibios_init(void);
void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long max);
static inline void pci_iounmap(struct pci_dev *dev, void __iomem *addr) {}
void __devinit pcibios_fixup_bus(struct pci_bus *bus);

View file

@ -466,27 +466,6 @@ int pcibios_enable_device(struct pci_dev *dev, int mask)
return 0;
}
void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long max)
{
unsigned long start = pci_resource_start(dev, bar);
unsigned long len = pci_resource_len(dev, bar);
unsigned long flags = pci_resource_flags(dev, bar);
if (!len)
return NULL;
if (max && len > max)
len = max;
if (!(flags & IORESOURCE_MEM)) {
pr_info("PCI: Trying to map invalid resource %#lx\n", flags);
start = 0;
}
return (void __iomem *)start;
}
EXPORT_SYMBOL(pci_iomap);
/****************************************************************
*
* Tile PCI config space read/write routines

View file

@ -12,6 +12,7 @@ config UNICORE32
select GENERIC_IRQ_PROBE
select GENERIC_IRQ_SHOW
select ARCH_WANT_FRAME_POINTERS
select GENERIC_IOMAP
help
UniCore-32 is 32-bit Instruction Set Architecture,
including a series of low-power-consumption RISC chip
@ -30,9 +31,6 @@ config GENERIC_CLOCKEVENTS
config GENERIC_CSUM
def_bool y
config GENERIC_IOMAP
def_bool y
config NO_IOPORT
bool

View file

@ -78,6 +78,7 @@ config X86
select HAVE_BPF_JIT if (X86_64 && NET)
select CLKEVT_I8253
select ARCH_HAVE_NMI_SAFE_CMPXCHG
select GENERIC_IOMAP
config INSTRUCTION_DECODER
def_bool (KPROBES || PERF_EVENTS)
@ -143,9 +144,6 @@ config NEED_SG_DMA_LENGTH
config GENERIC_ISA_DMA
def_bool ISA_DMA_API
config GENERIC_IOMAP
def_bool y
config GENERIC_BUG
def_bool y
depends on BUG

View file

@ -19,6 +19,8 @@
#include <asm-generic/iomap.h>
#endif
#include <asm-generic/pci_iomap.h>
#ifndef mmiowb
#define mmiowb() do {} while (0)
#endif
@ -283,9 +285,7 @@ static inline void writesb(const void __iomem *addr, const void *buf, int len)
#define __io_virt(x) ((void __force *) (x))
#ifndef CONFIG_GENERIC_IOMAP
/* Create a virtual mapping cookie for a PCI BAR (memory or IO) */
struct pci_dev;
extern void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long max);
static inline void pci_iounmap(struct pci_dev *dev, void __iomem *p)
{
}

View file

@ -67,18 +67,15 @@ extern void ioport_unmap(void __iomem *);
#endif
#ifdef CONFIG_PCI
/* Create a virtual mapping cookie for a PCI BAR (memory or IO) */
/* Destroy a virtual mapping cookie for a PCI BAR (memory or IO) */
struct pci_dev;
extern void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long max);
extern void pci_iounmap(struct pci_dev *dev, void __iomem *);
#else
struct pci_dev;
static inline void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long max)
{
return NULL;
}
static inline void pci_iounmap(struct pci_dev *dev, void __iomem *addr)
{ }
#endif
#include <asm-generic/pci_iomap.h>
#endif

View file

@ -0,0 +1,25 @@
/* Generic I/O port emulation, based on MN10300 code
*
* Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
* Written by David Howells (dhowells@redhat.com)
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public Licence
* as published by the Free Software Foundation; either version
* 2 of the Licence, or (at your option) any later version.
*/
#ifndef __ASM_GENERIC_PCI_IOMAP_H
#define __ASM_GENERIC_PCI_IOMAP_H
struct pci_dev;
#ifdef CONFIG_PCI
/* Create a virtual mapping cookie for a PCI BAR (memory or IO) */
extern void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long max);
#else
static inline void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long max)
{
return NULL;
}
#endif
#endif /* __ASM_GENERIC_IO_H */

View file

@ -19,6 +19,13 @@ config RATIONAL
config GENERIC_FIND_FIRST_BIT
bool
config GENERIC_PCI_IOMAP
bool
config GENERIC_IOMAP
bool
select GENERIC_PCI_IOMAP
config CRC_CCITT
tristate "CRC-CCITT functions"
help

View file

@ -33,6 +33,7 @@ endif
lib-$(CONFIG_HOTPLUG) += kobject_uevent.o
obj-$(CONFIG_GENERIC_IOMAP) += iomap.o
obj-$(CONFIG_GENERIC_PCI_IOMAP) += pci_iomap.o
obj-$(CONFIG_HAS_IOMEM) += iomap_copy.o devres.o
obj-$(CONFIG_CHECK_SIGNATURE) += check_signature.o
obj-$(CONFIG_DEBUG_LOCKING_API_SELFTESTS) += locking-selftest.o

View file

@ -242,45 +242,11 @@ EXPORT_SYMBOL(ioport_unmap);
#endif /* CONFIG_HAS_IOPORT */
#ifdef CONFIG_PCI
/**
* pci_iomap - create a virtual mapping cookie for a PCI BAR
* @dev: PCI device that owns the BAR
* @bar: BAR number
* @maxlen: length of the memory to map
*
* Using this function you will get a __iomem address to your device BAR.
* You can access it using ioread*() and iowrite*(). These functions hide
* the details if this is a MMIO or PIO address space and will just do what
* you expect from them in the correct way.
*
* @maxlen specifies the maximum length to map. If you want to get access to
* the complete BAR without checking for its length first, pass %0 here.
* */
void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long maxlen)
{
resource_size_t start = pci_resource_start(dev, bar);
resource_size_t len = pci_resource_len(dev, bar);
unsigned long flags = pci_resource_flags(dev, bar);
if (!len || !start)
return NULL;
if (maxlen && len > maxlen)
len = maxlen;
if (flags & IORESOURCE_IO)
return ioport_map(start, len);
if (flags & IORESOURCE_MEM) {
if (flags & IORESOURCE_CACHEABLE)
return ioremap(start, len);
return ioremap_nocache(start, len);
}
/* What? */
return NULL;
}
/* Hide the details if this is a MMIO or PIO address space and just do what
* you expect in the correct way. */
void pci_iounmap(struct pci_dev *dev, void __iomem * addr)
{
IO_COND(addr, /* nothing */, iounmap(addr));
}
EXPORT_SYMBOL(pci_iomap);
EXPORT_SYMBOL(pci_iounmap);
#endif /* CONFIG_PCI */

48
lib/pci_iomap.c Normal file
View file

@ -0,0 +1,48 @@
/*
* Implement the default iomap interfaces
*
* (C) Copyright 2004 Linus Torvalds
*/
#include <linux/pci.h>
#include <linux/io.h>
#include <linux/export.h>
#ifdef CONFIG_PCI
/**
* pci_iomap - create a virtual mapping cookie for a PCI BAR
* @dev: PCI device that owns the BAR
* @bar: BAR number
* @maxlen: length of the memory to map
*
* Using this function you will get a __iomem address to your device BAR.
* You can access it using ioread*() and iowrite*(). These functions hide
* the details if this is a MMIO or PIO address space and will just do what
* you expect from them in the correct way.
*
* @maxlen specifies the maximum length to map. If you want to get access to
* the complete BAR without checking for its length first, pass %0 here.
* */
void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long maxlen)
{
resource_size_t start = pci_resource_start(dev, bar);
resource_size_t len = pci_resource_len(dev, bar);
unsigned long flags = pci_resource_flags(dev, bar);
if (!len || !start)
return NULL;
if (maxlen && len > maxlen)
len = maxlen;
if (flags & IORESOURCE_IO)
return ioport_map(start, len);
if (flags & IORESOURCE_MEM) {
if (flags & IORESOURCE_CACHEABLE)
return ioremap(start, len);
return ioremap_nocache(start, len);
}
/* What? */
return NULL;
}
EXPORT_SYMBOL(pci_iomap);
#endif /* CONFIG_PCI */