FRV: Add support for emulation of userspace atomic ops [try #2]
Use traps 120-126 to emulate atomic cmpxchg32, xchg32, and XOR-, OR-, AND-, SUB- and ADD-to-memory operations for userspace. Signed-off-by: David Howells <dhowells@redhat.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
This commit is contained in:
David Howells
Linus Torvalds
parent
0c93d8e4d3
commit
e31c243f98
4 changed files with 268 additions and 1 deletions
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@ -316,8 +316,14 @@ __trap_fixup_kernel_data_tlb_miss:
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.section .trap.vector
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.org TBR_TT_TRAP0 >> 2
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.long system_call
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.rept 126
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.rept 119
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.long __entry_unsupported_trap
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.endr
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# userspace atomic op emulation, traps 120-126
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.rept 7
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.long __entry_atomic_op
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.endr
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.org TBR_TT_BREAK >> 2
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.long __entry_debug_exception
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@ -654,6 +654,26 @@ __entry_debug_exception:
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movgs gr4,psr
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jmpl @(gr5,gr0) ; call ill_insn(esfr1,epcr0,esr0)
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###############################################################################
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#
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# handle atomic operation emulation for userspace
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#
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###############################################################################
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.globl __entry_atomic_op
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__entry_atomic_op:
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LEDS 0x6012
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sethi.p %hi(atomic_operation),gr5
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setlo %lo(atomic_operation),gr5
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movsg esfr1,gr8
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movsg epcr0,gr9
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movsg esr0,gr10
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# now that we've accessed the exception regs, we can enable exceptions
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movsg psr,gr4
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ori gr4,#PSR_ET,gr4
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movgs gr4,psr
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jmpl @(gr5,gr0) ; call atomic_operation(esfr1,epcr0,esr0)
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###############################################################################
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#
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# handle media exception
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@ -100,6 +100,233 @@ asmlinkage void illegal_instruction(unsigned long esfr1, unsigned long epcr0, un
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force_sig_info(info.si_signo, &info, current);
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} /* end illegal_instruction() */
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/*****************************************************************************/
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/*
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* handle atomic operations with errors
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* - arguments in gr8, gr9, gr10
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* - original memory value placed in gr5
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* - replacement memory value placed in gr9
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*/
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asmlinkage void atomic_operation(unsigned long esfr1, unsigned long epcr0,
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unsigned long esr0)
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{
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static DEFINE_SPINLOCK(atomic_op_lock);
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unsigned long x, y, z, *p;
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mm_segment_t oldfs;
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siginfo_t info;
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int ret;
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y = 0;
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z = 0;
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oldfs = get_fs();
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if (!user_mode(__frame))
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set_fs(KERNEL_DS);
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switch (__frame->tbr & TBR_TT) {
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/* TIRA gr0,#120
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* u32 __atomic_user_cmpxchg32(u32 *ptr, u32 test, u32 new)
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*/
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case TBR_TT_ATOMIC_CMPXCHG32:
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p = (unsigned long *) __frame->gr8;
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x = __frame->gr9;
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y = __frame->gr10;
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for (;;) {
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ret = get_user(z, p);
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if (ret < 0)
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goto error;
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if (z != x)
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goto done;
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spin_lock_irq(&atomic_op_lock);
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if (__get_user(z, p) == 0) {
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if (z != x)
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goto done2;
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if (__put_user(y, p) == 0)
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goto done2;
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goto error2;
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}
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spin_unlock_irq(&atomic_op_lock);
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}
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/* TIRA gr0,#121
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* u32 __atomic_kernel_xchg32(void *v, u32 new)
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*/
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case TBR_TT_ATOMIC_XCHG32:
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p = (unsigned long *) __frame->gr8;
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y = __frame->gr9;
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for (;;) {
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ret = get_user(z, p);
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if (ret < 0)
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goto error;
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spin_lock_irq(&atomic_op_lock);
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if (__get_user(z, p) == 0) {
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if (__put_user(y, p) == 0)
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goto done2;
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goto error2;
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}
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spin_unlock_irq(&atomic_op_lock);
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}
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/* TIRA gr0,#122
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* ulong __atomic_kernel_XOR_return(ulong i, ulong *v)
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*/
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case TBR_TT_ATOMIC_XOR:
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p = (unsigned long *) __frame->gr8;
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x = __frame->gr9;
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for (;;) {
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ret = get_user(z, p);
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if (ret < 0)
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goto error;
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spin_lock_irq(&atomic_op_lock);
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if (__get_user(z, p) == 0) {
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y = x ^ z;
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if (__put_user(y, p) == 0)
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goto done2;
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goto error2;
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}
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spin_unlock_irq(&atomic_op_lock);
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}
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/* TIRA gr0,#123
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* ulong __atomic_kernel_OR_return(ulong i, ulong *v)
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*/
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case TBR_TT_ATOMIC_OR:
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p = (unsigned long *) __frame->gr8;
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x = __frame->gr9;
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for (;;) {
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ret = get_user(z, p);
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if (ret < 0)
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goto error;
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spin_lock_irq(&atomic_op_lock);
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if (__get_user(z, p) == 0) {
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y = x ^ z;
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if (__put_user(y, p) == 0)
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goto done2;
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goto error2;
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}
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spin_unlock_irq(&atomic_op_lock);
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}
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/* TIRA gr0,#124
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* ulong __atomic_kernel_AND_return(ulong i, ulong *v)
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*/
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case TBR_TT_ATOMIC_AND:
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p = (unsigned long *) __frame->gr8;
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x = __frame->gr9;
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for (;;) {
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ret = get_user(z, p);
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if (ret < 0)
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goto error;
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spin_lock_irq(&atomic_op_lock);
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if (__get_user(z, p) == 0) {
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y = x & z;
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if (__put_user(y, p) == 0)
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goto done2;
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goto error2;
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}
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spin_unlock_irq(&atomic_op_lock);
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}
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/* TIRA gr0,#125
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* int __atomic_user_sub_return(atomic_t *v, int i)
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*/
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case TBR_TT_ATOMIC_SUB:
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p = (unsigned long *) __frame->gr8;
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x = __frame->gr9;
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for (;;) {
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ret = get_user(z, p);
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if (ret < 0)
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goto error;
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spin_lock_irq(&atomic_op_lock);
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if (__get_user(z, p) == 0) {
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y = z - x;
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if (__put_user(y, p) == 0)
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goto done2;
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goto error2;
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}
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spin_unlock_irq(&atomic_op_lock);
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}
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/* TIRA gr0,#126
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* int __atomic_user_add_return(atomic_t *v, int i)
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*/
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case TBR_TT_ATOMIC_ADD:
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p = (unsigned long *) __frame->gr8;
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x = __frame->gr9;
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for (;;) {
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ret = get_user(z, p);
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if (ret < 0)
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goto error;
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spin_lock_irq(&atomic_op_lock);
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if (__get_user(z, p) == 0) {
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y = z + x;
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if (__put_user(y, p) == 0)
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goto done2;
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goto error2;
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}
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spin_unlock_irq(&atomic_op_lock);
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}
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default:
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BUG();
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}
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done2:
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spin_unlock_irq(&atomic_op_lock);
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done:
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if (!user_mode(__frame))
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set_fs(oldfs);
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__frame->gr5 = z;
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__frame->gr9 = y;
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return;
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error2:
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spin_unlock_irq(&atomic_op_lock);
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error:
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if (!user_mode(__frame))
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set_fs(oldfs);
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__frame->pc -= 4;
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die_if_kernel("-- Atomic Op Error --\n");
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info.si_signo = SIGSEGV;
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info.si_code = SEGV_ACCERR;
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info.si_errno = 0;
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info.si_addr = (void *) __frame->pc;
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force_sig_info(info.si_signo, &info, current);
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}
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/*****************************************************************************/
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/*
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*
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@ -99,9 +99,23 @@
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#define TBR_TT_TRAP1 (0x81 << 4)
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#define TBR_TT_TRAP2 (0x82 << 4)
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#define TBR_TT_TRAP3 (0x83 << 4)
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#define TBR_TT_TRAP120 (0xf8 << 4)
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#define TBR_TT_TRAP121 (0xf9 << 4)
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#define TBR_TT_TRAP122 (0xfa << 4)
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#define TBR_TT_TRAP123 (0xfb << 4)
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#define TBR_TT_TRAP124 (0xfc << 4)
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#define TBR_TT_TRAP125 (0xfd << 4)
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#define TBR_TT_TRAP126 (0xfe << 4)
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#define TBR_TT_BREAK (0xff << 4)
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#define TBR_TT_ATOMIC_CMPXCHG32 TBR_TT_TRAP120
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#define TBR_TT_ATOMIC_XCHG32 TBR_TT_TRAP121
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#define TBR_TT_ATOMIC_XOR TBR_TT_TRAP122
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#define TBR_TT_ATOMIC_OR TBR_TT_TRAP123
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#define TBR_TT_ATOMIC_AND TBR_TT_TRAP124
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#define TBR_TT_ATOMIC_SUB TBR_TT_TRAP125
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#define TBR_TT_ATOMIC_ADD TBR_TT_TRAP126
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#define __get_TBR() ({ unsigned long x; asm volatile("movsg tbr,%0" : "=r"(x)); x; })
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/*
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