staging: rtl8192su: move to EEPROM_93CX
this is basically a port of Larry Fingers Patch for rtl8187se to rtl8192su. also removed some dead code. plus cosmetics. Signed-off-by: Florian Schilhabel <florian.c.schilhabel@googlemail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
This commit is contained in:
Florian Schilhabel
Greg Kroah-Hartman
parent
b4c84c298b
commit
e3133b282a
6 changed files with 73 additions and 232 deletions
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@ -3,5 +3,6 @@ config RTL8192SU
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depends on PCI && WLAN && USB
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select WIRELESS_EXT
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select WEXT_PRIV
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select EEPROM_93CX6
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default N
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---help---
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@ -9,7 +9,6 @@ EXTRA_CFLAGS += -DTHOMAS_BEACON
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#EXTRA_CFLAGS += -DMUTIPLE_BULK_OUT
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r8192s_usb-objs := \
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r8180_93cx6.o \
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r8192U_wx.o \
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r8192S_phy.o \
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r8192S_rtl6052.o \
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@ -1,146 +0,0 @@
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/*
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This files contains card eeprom (93c46 or 93c56) programming routines,
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memory is addressed by 16 bits words.
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This is part of rtl8180 OpenSource driver.
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Copyright (C) Andrea Merello 2004 <andreamrl@tiscali.it>
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Released under the terms of GPL (General Public Licence)
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Parts of this driver are based on the GPL part of the
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official realtek driver.
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Parts of this driver are based on the rtl8180 driver skeleton
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from Patric Schenke & Andres Salomon.
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Parts of this driver are based on the Intel Pro Wireless 2100 GPL driver.
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We want to tanks the Authors of those projects and the Ndiswrapper
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project Authors.
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*/
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#include "r8180_93cx6.h"
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void eprom_cs(struct net_device *dev, short bit)
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{
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if(bit)
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write_nic_byte_E(dev, EPROM_CMD,
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(1<<EPROM_CS_SHIFT) | \
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read_nic_byte_E(dev, EPROM_CMD)); //enable EPROM
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else
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write_nic_byte_E(dev, EPROM_CMD, read_nic_byte_E(dev, EPROM_CMD)\
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&~(1<<EPROM_CS_SHIFT)); //disable EPROM
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force_pci_posting(dev);
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udelay(EPROM_DELAY);
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}
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void eprom_ck_cycle(struct net_device *dev)
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{
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write_nic_byte_E(dev, EPROM_CMD,
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(1<<EPROM_CK_SHIFT) | read_nic_byte_E(dev,EPROM_CMD));
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force_pci_posting(dev);
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udelay(EPROM_DELAY);
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write_nic_byte_E(dev, EPROM_CMD,
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read_nic_byte_E(dev, EPROM_CMD) &~ (1<<EPROM_CK_SHIFT));
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force_pci_posting(dev);
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udelay(EPROM_DELAY);
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}
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void eprom_w(struct net_device *dev,short bit)
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{
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if(bit)
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write_nic_byte_E(dev, EPROM_CMD, (1<<EPROM_W_SHIFT) | \
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read_nic_byte_E(dev,EPROM_CMD));
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else
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write_nic_byte_E(dev, EPROM_CMD, read_nic_byte_E(dev,EPROM_CMD)\
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&~(1<<EPROM_W_SHIFT));
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force_pci_posting(dev);
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udelay(EPROM_DELAY);
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}
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short eprom_r(struct net_device *dev)
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{
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short bit;
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bit=(read_nic_byte_E(dev, EPROM_CMD) & (1<<EPROM_R_SHIFT) );
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udelay(EPROM_DELAY);
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if(bit) return 1;
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return 0;
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}
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void eprom_send_bits_string(struct net_device *dev, short b[], int len)
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{
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int i;
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for(i=0; i<len; i++){
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eprom_w(dev, b[i]);
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eprom_ck_cycle(dev);
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}
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}
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u32 eprom_read(struct net_device *dev, u32 addr)
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{
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struct r8192_priv *priv = ieee80211_priv(dev);
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short read_cmd[]={1,1,0};
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short addr_str[8];
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int i;
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int addr_len;
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u32 ret;
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ret=0;
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//enable EPROM programming
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write_nic_byte_E(dev, EPROM_CMD,
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(EPROM_CMD_PROGRAM<<EPROM_CMD_OPERATING_MODE_SHIFT));
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force_pci_posting(dev);
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udelay(EPROM_DELAY);
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if (priv->epromtype==EPROM_93c56){
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addr_str[7]=addr & 1;
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addr_str[6]=addr & (1<<1);
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addr_str[5]=addr & (1<<2);
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addr_str[4]=addr & (1<<3);
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addr_str[3]=addr & (1<<4);
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addr_str[2]=addr & (1<<5);
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addr_str[1]=addr & (1<<6);
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addr_str[0]=addr & (1<<7);
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addr_len=8;
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}else{
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addr_str[5]=addr & 1;
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addr_str[4]=addr & (1<<1);
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addr_str[3]=addr & (1<<2);
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addr_str[2]=addr & (1<<3);
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addr_str[1]=addr & (1<<4);
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addr_str[0]=addr & (1<<5);
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addr_len=6;
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}
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eprom_cs(dev, 1);
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eprom_ck_cycle(dev);
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eprom_send_bits_string(dev, read_cmd, 3);
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eprom_send_bits_string(dev, addr_str, addr_len);
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//keep chip pin D to low state while reading.
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//I'm unsure if it is necessary, but anyway shouldn't hurt
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eprom_w(dev, 0);
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for(i=0;i<16;i++){
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//eeprom needs a clk cycle between writing opcode&adr
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//and reading data. (eeprom outs a dummy 0)
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eprom_ck_cycle(dev);
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ret |= (eprom_r(dev)<<(15-i));
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}
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eprom_cs(dev, 0);
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eprom_ck_cycle(dev);
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//disable EPROM programming
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write_nic_byte_E(dev, EPROM_CMD,
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(EPROM_CMD_NORMAL<<EPROM_CMD_OPERATING_MODE_SHIFT));
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return ret;
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}
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@ -1,40 +0,0 @@
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/*
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This is part of rtl8187 OpenSource driver
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Copyright (C) Andrea Merello 2004-2005 <andreamrl@tiscali.it>
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Released under the terms of GPL (General Public Licence)
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Parts of this driver are based on the GPL part of the official realtek driver
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Parts of this driver are based on the rtl8180 driver skeleton from Patric Schenke & Andres Salomon
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Parts of this driver are based on the Intel Pro Wireless 2100 GPL driver
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We want to tanks the Authors of such projects and the Ndiswrapper project Authors.
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*/
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/*This files contains card eeprom (93c46 or 93c56) programming routines*/
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/*memory is addressed by WORDS*/
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#include "r8192U.h"
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#include "r8192S_hw.h"
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#define EPROM_DELAY 10
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#define EPROM_ANAPARAM_ADDRLWORD 0xd
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#define EPROM_ANAPARAM_ADDRHWORD 0xe
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#define EPROM_RFCHIPID 0x6
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#define EPROM_TXPW_BASE 0x05
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#define EPROM_RFCHIPID_RTL8225U 5
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#define EPROM_RF_PARAM 0x4
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#define EPROM_CONFIG2 0xc
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#define EPROM_VERSION 0x1E
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#define MAC_ADR 0x7
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#define CIS 0x18
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#define EPROM_TXPW0 0x16
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#define EPROM_TXPW2 0x1b
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#define EPROM_TXPW1 0x3d
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u32 eprom_read(struct net_device *dev,u32 addr); //reads a 16 bits word
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@ -44,6 +44,12 @@
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#include "r8192S_firmware.h"
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/* EEPROM defs for use with linux/eeprom_93cx6.h */
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#define RTL819X_EEPROM_CMD_READ (1 << 0)
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#define RTL819X_EEPROM_CMD_WRITE (1 << 1)
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#define RTL819X_EEPROM_CMD_CK (1 << 2)
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#define RTL819X_EEPROM_CMD_CS (1 << 3)
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//#define RTL8192U
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#define RTL819xU_MODULE_NAME "rtl819xU"
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//added for HW security, john.0629
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@ -26,6 +26,7 @@
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#include <linux/vmalloc.h>
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#include <linux/slab.h>
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#include <linux/eeprom_93cx6.h>
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#undef LOOP_TEST
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#undef DUMP_RX
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@ -54,7 +55,6 @@
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#include <asm/uaccess.h>
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#include "r8192U.h"
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#include "r8180_93cx6.h" /* Card EEPROM */
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#include "r8192U_wx.h"
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#include "r8192S_rtl8225.h"
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@ -214,6 +214,36 @@ static CHANNEL_LIST ChannelPlan[] = {
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{{1,2,3,4,5,6,7,8,9,10,11,12,13,14},14} //For Global Domain. 1-11:active scan, 12-14 passive scan. //+YJ, 080626
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};
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static void rtl819x_eeprom_register_read(struct eeprom_93cx6 *eeprom)
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{
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struct net_device *dev = eeprom->data;
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u8 reg = read_nic_byte(dev, EPROM_CMD);
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eeprom->reg_data_in = reg & RTL819X_EEPROM_CMD_WRITE;
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eeprom->reg_data_out = reg & RTL819X_EEPROM_CMD_READ;
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eeprom->reg_data_clock = reg & RTL819X_EEPROM_CMD_CK;
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eeprom->reg_chip_select = reg & RTL819X_EEPROM_CMD_CS;
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}
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static void rtl819x_eeprom_register_write(struct eeprom_93cx6 *eeprom)
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{
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struct net_device *dev = eeprom->data;
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u8 reg = 2 << 6;
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if (eeprom->reg_data_in)
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reg |= RTL819X_EEPROM_CMD_WRITE;
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if (eeprom->reg_data_out)
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reg |= RTL819X_EEPROM_CMD_READ;
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if (eeprom->reg_data_clock)
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reg |= RTL819X_EEPROM_CMD_CK;
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if (eeprom->reg_chip_select)
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reg |= RTL819X_EEPROM_CMD_CS;
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write_nic_byte(dev, EPROM_CMD, reg);
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read_nic_byte(dev, EPROM_CMD);
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udelay(10);
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}
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static void rtl819x_set_channel_map(u8 channel_plan, struct r8192_priv* priv)
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{
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int i, max_chan=-1, min_chan=-1;
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@ -1152,15 +1182,6 @@ void tx_timeout(struct net_device *dev)
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//DMESG("TXTIMEOUT");
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}
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/* this is only for debug */
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void dump_eprom(struct net_device *dev)
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{
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int i;
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for(i=0; i<63; i++)
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RT_TRACE(COMP_EPROM, "EEPROM addr %x : %x", i, eprom_read(dev,i));
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}
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/* this is only for debug */
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void rtl8192_dump_reg(struct net_device *dev)
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{
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@ -3531,26 +3552,32 @@ rtl8192SU_ConfigAdapterInfo8192SForAutoLoadFail(struct net_device* dev)
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//
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// Created by Roger, 2008.10.21.
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//
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void
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rtl8192SU_ReadAdapterInfo8192SUsb(struct net_device* dev)
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void rtl8192SU_ReadAdapterInfo8192SUsb(struct net_device* dev)
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{
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struct r8192_priv *priv = ieee80211_priv(dev);
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u16 i,usValue;
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u8 tmpU1b, tempval;
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u16 EEPROMId;
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u8 hwinfo[HWSET_MAX_SIZE_92S];
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u8 rf_path, index; // For EEPROM/EFUSE After V0.6_1117
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struct r8192_priv *priv = ieee80211_priv(dev);
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u16 i;
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u8 tmpU1b, tempval;
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u16 EEPROMId;
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u8 hwinfo[HWSET_MAX_SIZE_92S];
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u8 rf_path, index; // For EEPROM/EFUSE After V0.6_1117
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struct eeprom_93cx6 eeprom;
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u16 eeprom_val;
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eeprom.data = dev;
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eeprom.register_read = rtl819x_eeprom_register_read;
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eeprom.register_write = rtl819x_eeprom_register_write;
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if (priv->epromtype == EPROM_93c46)
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eeprom.width = PCI_EEPROM_WIDTH_93C46;
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else
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eeprom.width = PCI_EEPROM_WIDTH_93C56;
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RT_TRACE(COMP_INIT, "====> ReadAdapterInfo8192SUsb\n");
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//
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// <Roger_Note> The following operation are prevent Efuse leakage by turn on 2.5V.
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// 2008.11.25.
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//
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/*
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* The following operation are prevent Efuse leakage by turn on 2.5V..
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*/
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tmpU1b = read_nic_byte(dev, EFUSE_TEST+3);
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write_nic_byte(dev, EFUSE_TEST+3, tmpU1b|0x80);
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//PlatformStallExecution(1000);
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mdelay(10);
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write_nic_byte(dev, EFUSE_TEST+3, (tmpU1b&(~BIT7)));
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@ -3558,21 +3585,20 @@ rtl8192SU_ReadAdapterInfo8192SUsb(struct net_device* dev)
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priv->card_8192_version = (VERSION_8192S)((read_nic_dword(dev, PMC_FSM)>>16)&0xF);
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RT_TRACE(COMP_INIT, "Chip Version ID: 0x%2x\n", priv->card_8192_version);
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switch(priv->card_8192_version)
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{
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case 0:
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RT_TRACE(COMP_INIT, "Chip Version ID: VERSION_8192S_ACUT.\n");
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break;
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case 1:
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RT_TRACE(COMP_INIT, "Chip Version ID: VERSION_8192S_BCUT.\n");
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break;
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case 2:
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RT_TRACE(COMP_INIT, "Chip Version ID: VERSION_8192S_CCUT.\n");
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break;
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default:
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RT_TRACE(COMP_INIT, "Unknown Chip Version!!\n");
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priv->card_8192_version = VERSION_8192S_BCUT;
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break;
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switch (priv->card_8192_version) {
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case 0:
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RT_TRACE(COMP_INIT, "Chip Version ID: VERSION_8192S_ACUT.\n");
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break;
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case 1:
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RT_TRACE(COMP_INIT, "Chip Version ID: VERSION_8192S_BCUT.\n");
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break;
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case 2:
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RT_TRACE(COMP_INIT, "Chip Version ID: VERSION_8192S_CCUT.\n");
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break;
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default:
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RT_TRACE(COMP_INIT, "Unknown Chip Version!!\n");
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priv->card_8192_version = VERSION_8192S_BCUT;
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break;
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}
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//if (IS_BOOT_FROM_EEPROM(Adapter))
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@ -3585,8 +3611,8 @@ rtl8192SU_ReadAdapterInfo8192SUsb(struct net_device* dev)
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// Read all Content from EEPROM or EFUSE.
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for(i = 0; i < HWSET_MAX_SIZE_92S; i += 2)
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{
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usValue = eprom_read(dev, (u16) (i>>1));
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*((u16*)(&hwinfo[i])) = usValue;
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eeprom_93cx6_read(&eeprom, (u16) (i>>1), &eeprom_val);
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*((u16 *)(&hwinfo[i])) = eeprom_val;
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}
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}
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else if (!(priv->EepromOrEfuse))
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@ -4138,11 +4164,6 @@ short rtl8192_init(struct net_device *dev)
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init_timer(&priv->watch_dog_timer);
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priv->watch_dog_timer.data = (unsigned long)dev;
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priv->watch_dog_timer.function = watch_dog_timer_callback;
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//rtl8192_adapter_start(dev);
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#ifdef DEBUG_EPROM
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dump_eprom(dev);
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#endif
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return 0;
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}
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