Merge branch 'parisc-4.15-1' of git://git.kernel.org/pub/scm/linux/kernel/git/deller/parisc-linux
Pull parisc updates from Helge Deller:
"Highlights:
- one important fix from Dave to prevent kernel crash when userspace
hands over invalid values to our in-kernel CAS implementation.
- added CPU topology support, including multi-core scheduler support
on PA8900 CPUs
Minor changes:
- minor fixes for sparse (from Luc)
- drop duplicates for CPU_BIG_ENDIAN from parisc and sparc top
Kconfig files (from Babu)
- reorganized parisc PDC (firmware-access) header files for usage
from userspace. Required for upcoming qemu parisc emulator and
SeaBIOS fork to support parisc"
* 'parisc-4.15-1' of git://git.kernel.org/pub/scm/linux/kernel/git/deller/parisc-linux:
arch: Fix duplicates in Kconfig for parisc and sparc
parisc: Make some PDC structures accessible in uapi headers
parisc: Pass endianness info to sparse
parisc: Add CPU topology support
parisc: Fix validity check of pointer size argument in new CAS implementation
This commit is contained in:
Linus Torvalds
commit
e29116758c
11 changed files with 454 additions and 299 deletions
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@ -32,6 +32,7 @@ config PARISC
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select GENERIC_PCI_IOMAP
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select ARCH_HAVE_NMI_SAFE_CMPXCHG
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select GENERIC_SMP_IDLE_THREAD
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select GENERIC_CPU_DEVICES
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select GENERIC_STRNCPY_FROM_USER
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select SYSCTL_ARCH_UNALIGN_ALLOW
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select SYSCTL_EXCEPTION_TRACE
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@ -60,9 +61,6 @@ config PARISC
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config CPU_BIG_ENDIAN
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def_bool y
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config CPU_BIG_ENDIAN
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def_bool y
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config MMU
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def_bool y
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@ -288,6 +286,21 @@ config SMP
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If you don't know what to do here, say N.
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config PARISC_CPU_TOPOLOGY
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bool "Support cpu topology definition"
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depends on SMP
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default y
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help
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Support PARISC cpu topology definition.
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config SCHED_MC
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bool "Multi-core scheduler support"
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depends on PARISC_CPU_TOPOLOGY && PA8X00
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help
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Multi-core scheduler support improves the CPU scheduler's decision
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making when dealing with multi-core CPU chips at a cost of slightly
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increased overhead in some places. If unsure say N here.
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config IRQSTACKS
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bool "Use separate kernel stacks when processing interrupts"
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default y
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@ -22,7 +22,7 @@ KBUILD_IMAGE := vmlinuz
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KBUILD_DEFCONFIG := default_defconfig
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NM = sh $(srctree)/arch/parisc/nm
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CHECKFLAGS += -D__hppa__=1
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CHECKFLAGS += -D__hppa__=1 -mbig-endian
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LIBGCC = $(shell $(CC) $(KBUILD_CFLAGS) -print-libgcc-file-name)
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export LIBGCC
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@ -18,261 +18,6 @@ extern unsigned long parisc_cell_loc; /* cell location of CPU (PAT) */
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#define PDC_TYPE_SYSTEM_MAP 1 /* 32-bit, but supports PDC_SYSTEM_MAP */
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#define PDC_TYPE_SNAKE 2 /* Doesn't support SYSTEM_MAP */
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struct pdc_chassis_info { /* for PDC_CHASSIS_INFO */
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unsigned long actcnt; /* actual number of bytes returned */
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unsigned long maxcnt; /* maximum number of bytes that could be returned */
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};
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struct pdc_coproc_cfg { /* for PDC_COPROC_CFG */
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unsigned long ccr_functional;
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unsigned long ccr_present;
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unsigned long revision;
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unsigned long model;
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};
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struct pdc_model { /* for PDC_MODEL */
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unsigned long hversion;
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unsigned long sversion;
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unsigned long hw_id;
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unsigned long boot_id;
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unsigned long sw_id;
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unsigned long sw_cap;
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unsigned long arch_rev;
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unsigned long pot_key;
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unsigned long curr_key;
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};
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struct pdc_cache_cf { /* for PDC_CACHE (I/D-caches) */
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unsigned long
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#ifdef CONFIG_64BIT
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cc_padW:32,
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#endif
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cc_alias: 4, /* alias boundaries for virtual addresses */
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cc_block: 4, /* to determine most efficient stride */
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cc_line : 3, /* maximum amount written back as a result of store (multiple of 16 bytes) */
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cc_shift: 2, /* how much to shift cc_block left */
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cc_wt : 1, /* 0 = WT-Dcache, 1 = WB-Dcache */
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cc_sh : 2, /* 0 = separate I/D-cache, else shared I/D-cache */
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cc_cst : 3, /* 0 = incoherent D-cache, 1=coherent D-cache */
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cc_pad1 : 10, /* reserved */
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cc_hv : 3; /* hversion dependent */
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};
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struct pdc_tlb_cf { /* for PDC_CACHE (I/D-TLB's) */
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unsigned long tc_pad0:12, /* reserved */
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#ifdef CONFIG_64BIT
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tc_padW:32,
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#endif
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tc_sh : 2, /* 0 = separate I/D-TLB, else shared I/D-TLB */
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tc_hv : 1, /* HV */
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tc_page : 1, /* 0 = 2K page-size-machine, 1 = 4k page size */
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tc_cst : 3, /* 0 = incoherent operations, else coherent operations */
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tc_aid : 5, /* ITLB: width of access ids of processor (encoded!) */
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tc_sr : 8; /* ITLB: width of space-registers (encoded) */
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};
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struct pdc_cache_info { /* main-PDC_CACHE-structure (caches & TLB's) */
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/* I-cache */
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unsigned long ic_size; /* size in bytes */
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struct pdc_cache_cf ic_conf; /* configuration */
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unsigned long ic_base; /* base-addr */
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unsigned long ic_stride;
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unsigned long ic_count;
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unsigned long ic_loop;
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/* D-cache */
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unsigned long dc_size; /* size in bytes */
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struct pdc_cache_cf dc_conf; /* configuration */
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unsigned long dc_base; /* base-addr */
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unsigned long dc_stride;
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unsigned long dc_count;
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unsigned long dc_loop;
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/* Instruction-TLB */
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unsigned long it_size; /* number of entries in I-TLB */
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struct pdc_tlb_cf it_conf; /* I-TLB-configuration */
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unsigned long it_sp_base;
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unsigned long it_sp_stride;
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unsigned long it_sp_count;
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unsigned long it_off_base;
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unsigned long it_off_stride;
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unsigned long it_off_count;
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unsigned long it_loop;
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/* data-TLB */
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unsigned long dt_size; /* number of entries in D-TLB */
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struct pdc_tlb_cf dt_conf; /* D-TLB-configuration */
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unsigned long dt_sp_base;
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unsigned long dt_sp_stride;
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unsigned long dt_sp_count;
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unsigned long dt_off_base;
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unsigned long dt_off_stride;
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unsigned long dt_off_count;
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unsigned long dt_loop;
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};
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#if 0
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/* If you start using the next struct, you'll have to adjust it to
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* work with 64-bit firmware I think -PB
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*/
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struct pdc_iodc { /* PDC_IODC */
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unsigned char hversion_model;
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unsigned char hversion;
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unsigned char spa;
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unsigned char type;
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unsigned int sversion_rev:4;
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unsigned int sversion_model:19;
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unsigned int sversion_opt:8;
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unsigned char rev;
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unsigned char dep;
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unsigned char features;
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unsigned char pad1;
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unsigned int checksum:16;
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unsigned int length:16;
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unsigned int pad[15];
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} __attribute__((aligned(8))) ;
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#endif
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#ifndef CONFIG_PA20
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/* no BLTBs in pa2.0 processors */
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struct pdc_btlb_info_range {
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__u8 res00;
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__u8 num_i;
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__u8 num_d;
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__u8 num_comb;
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};
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struct pdc_btlb_info { /* PDC_BLOCK_TLB, return of PDC_BTLB_INFO */
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unsigned int min_size; /* minimum size of BTLB in pages */
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unsigned int max_size; /* maximum size of BTLB in pages */
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struct pdc_btlb_info_range fixed_range_info;
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struct pdc_btlb_info_range variable_range_info;
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};
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#endif /* !CONFIG_PA20 */
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struct pdc_mem_retinfo { /* PDC_MEM/PDC_MEM_MEMINFO (return info) */
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unsigned long pdt_size;
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unsigned long pdt_entries;
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unsigned long pdt_status;
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unsigned long first_dbe_loc;
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unsigned long good_mem;
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};
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struct pdc_mem_read_pdt { /* PDC_MEM/PDC_MEM_READ_PDT (return info) */
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unsigned long pdt_entries;
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};
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#ifdef CONFIG_64BIT
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struct pdc_memory_table_raddr { /* PDC_MEM/PDC_MEM_TABLE (return info) */
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unsigned long entries_returned;
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unsigned long entries_total;
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};
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struct pdc_memory_table { /* PDC_MEM/PDC_MEM_TABLE (arguments) */
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unsigned long paddr;
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unsigned int pages;
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unsigned int reserved;
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};
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#endif /* CONFIG_64BIT */
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struct pdc_system_map_mod_info { /* PDC_SYSTEM_MAP/FIND_MODULE */
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unsigned long mod_addr;
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unsigned long mod_pgs;
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unsigned long add_addrs;
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};
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struct pdc_system_map_addr_info { /* PDC_SYSTEM_MAP/FIND_ADDRESS */
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unsigned long mod_addr;
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unsigned long mod_pgs;
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};
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struct pdc_initiator { /* PDC_INITIATOR */
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int host_id;
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int factor;
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int width;
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int mode;
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};
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struct hardware_path {
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char flags; /* see bit definitions below */
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char bc[6]; /* Bus Converter routing info to a specific */
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/* I/O adaptor (< 0 means none, > 63 resvd) */
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char mod; /* fixed field of specified module */
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};
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/*
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* Device path specifications used by PDC.
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*/
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struct pdc_module_path {
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struct hardware_path path;
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unsigned int layers[6]; /* device-specific info (ctlr #, unit # ...) */
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};
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#ifndef CONFIG_PA20
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/* Only used on some pre-PA2.0 boxes */
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struct pdc_memory_map { /* PDC_MEMORY_MAP */
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unsigned long hpa; /* mod's register set address */
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unsigned long more_pgs; /* number of additional I/O pgs */
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};
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#endif
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struct pdc_tod {
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unsigned long tod_sec;
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unsigned long tod_usec;
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};
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/* architected results from PDC_PIM/transfer hpmc on a PA1.1 machine */
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struct pdc_hpmc_pim_11 { /* PDC_PIM */
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__u32 gr[32];
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__u32 cr[32];
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__u32 sr[8];
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__u32 iasq_back;
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__u32 iaoq_back;
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__u32 check_type;
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__u32 cpu_state;
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__u32 rsvd1;
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__u32 cache_check;
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__u32 tlb_check;
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__u32 bus_check;
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__u32 assists_check;
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__u32 rsvd2;
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__u32 assist_state;
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__u32 responder_addr;
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__u32 requestor_addr;
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__u32 path_info;
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__u64 fr[32];
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};
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/*
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* architected results from PDC_PIM/transfer hpmc on a PA2.0 machine
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*
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* Note that PDC_PIM doesn't care whether or not wide mode was enabled
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* so the results are different on PA1.1 vs. PA2.0 when in narrow mode.
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*
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* Note also that there are unarchitected results available, which
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* are hversion dependent. Do a "ser pim 0 hpmc" after rebooting, since
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* the firmware is probably the best way of printing hversion dependent
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* data.
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*/
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struct pdc_hpmc_pim_20 { /* PDC_PIM */
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__u64 gr[32];
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__u64 cr[32];
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__u64 sr[8];
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__u64 iasq_back;
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__u64 iaoq_back;
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__u32 check_type;
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__u32 cpu_state;
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__u32 cache_check;
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__u32 tlb_check;
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||||
__u32 bus_check;
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__u32 assists_check;
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||||
__u32 assist_state;
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||||
__u32 path_info;
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||||
__u64 responder_addr;
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||||
__u64 requestor_addr;
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__u64 fr[32];
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||||
};
|
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|
||||
void pdc_console_init(void); /* in pdc_console.c */
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void pdc_console_restart(void);
|
||||
|
||||
|
|
|
|||
36
arch/parisc/include/asm/topology.h
Normal file
36
arch/parisc/include/asm/topology.h
Normal file
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|
@ -0,0 +1,36 @@
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|||
#ifndef _ASM_PARISC_TOPOLOGY_H
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||||
#define _ASM_PARISC_TOPOLOGY_H
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||||
|
||||
#ifdef CONFIG_PARISC_CPU_TOPOLOGY
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||||
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||||
#include <linux/cpumask.h>
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||||
|
||||
struct cputopo_parisc {
|
||||
int thread_id;
|
||||
int core_id;
|
||||
int socket_id;
|
||||
cpumask_t thread_sibling;
|
||||
cpumask_t core_sibling;
|
||||
};
|
||||
|
||||
extern struct cputopo_parisc cpu_topology[NR_CPUS];
|
||||
|
||||
#define topology_physical_package_id(cpu) (cpu_topology[cpu].socket_id)
|
||||
#define topology_core_id(cpu) (cpu_topology[cpu].core_id)
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||||
#define topology_core_cpumask(cpu) (&cpu_topology[cpu].core_sibling)
|
||||
#define topology_sibling_cpumask(cpu) (&cpu_topology[cpu].thread_sibling)
|
||||
|
||||
void init_cpu_topology(void);
|
||||
void store_cpu_topology(unsigned int cpuid);
|
||||
const struct cpumask *cpu_coregroup_mask(int cpu);
|
||||
|
||||
#else
|
||||
|
||||
static inline void init_cpu_topology(void) { }
|
||||
static inline void store_cpu_topology(unsigned int cpuid) { }
|
||||
|
||||
#endif
|
||||
|
||||
#include <asm-generic/topology.h>
|
||||
|
||||
#endif /* _ASM_ARM_TOPOLOGY_H */
|
||||
|
|
@ -16,6 +16,7 @@
|
|||
#define PDC_ERROR -3 /* Call could not complete without an error */
|
||||
#define PDC_NE_MOD -5 /* Module not found */
|
||||
#define PDC_NE_CELL_MOD -7 /* Cell module not found */
|
||||
#define PDC_NE_BOOTDEV -9 /* Cannot locate a console device or boot device */
|
||||
#define PDC_INVALID_ARG -10 /* Called with an invalid argument */
|
||||
#define PDC_BUS_POW_WARN -12 /* Call could not complete in allowed power budget */
|
||||
#define PDC_NOT_NARROW -17 /* Narrow mode not supported */
|
||||
|
|
@ -340,9 +341,6 @@
|
|||
|
||||
#if !defined(__ASSEMBLY__)
|
||||
|
||||
#include <linux/types.h>
|
||||
|
||||
|
||||
/* flags of the device_path */
|
||||
#define PF_AUTOBOOT 0x80
|
||||
#define PF_AUTOSEARCH 0x40
|
||||
|
|
@ -418,9 +416,255 @@ struct zeropage {
|
|||
int pad430[116];
|
||||
|
||||
/* [0x600] processor dependent */
|
||||
__u32 pad600[1];
|
||||
__u32 proc_sti; /* pointer to STI ROM */
|
||||
__u32 pad608[126];
|
||||
unsigned int pad600[1];
|
||||
unsigned int proc_sti; /* pointer to STI ROM */
|
||||
unsigned int pad608[126];
|
||||
};
|
||||
|
||||
struct pdc_chassis_info { /* for PDC_CHASSIS_INFO */
|
||||
unsigned long actcnt; /* actual number of bytes returned */
|
||||
unsigned long maxcnt; /* maximum number of bytes that could be returned */
|
||||
};
|
||||
|
||||
struct pdc_coproc_cfg { /* for PDC_COPROC_CFG */
|
||||
unsigned long ccr_functional;
|
||||
unsigned long ccr_present;
|
||||
unsigned long revision;
|
||||
unsigned long model;
|
||||
};
|
||||
|
||||
struct pdc_model { /* for PDC_MODEL */
|
||||
unsigned long hversion;
|
||||
unsigned long sversion;
|
||||
unsigned long hw_id;
|
||||
unsigned long boot_id;
|
||||
unsigned long sw_id;
|
||||
unsigned long sw_cap;
|
||||
unsigned long arch_rev;
|
||||
unsigned long pot_key;
|
||||
unsigned long curr_key;
|
||||
};
|
||||
|
||||
struct pdc_cache_cf { /* for PDC_CACHE (I/D-caches) */
|
||||
unsigned long
|
||||
#ifdef __LP64__
|
||||
cc_padW:32,
|
||||
#endif
|
||||
cc_alias: 4, /* alias boundaries for virtual addresses */
|
||||
cc_block: 4, /* to determine most efficient stride */
|
||||
cc_line : 3, /* maximum amount written back as a result of store (multiple of 16 bytes) */
|
||||
cc_shift: 2, /* how much to shift cc_block left */
|
||||
cc_wt : 1, /* 0 = WT-Dcache, 1 = WB-Dcache */
|
||||
cc_sh : 2, /* 0 = separate I/D-cache, else shared I/D-cache */
|
||||
cc_cst : 3, /* 0 = incoherent D-cache, 1=coherent D-cache */
|
||||
cc_pad1 : 10, /* reserved */
|
||||
cc_hv : 3; /* hversion dependent */
|
||||
};
|
||||
|
||||
struct pdc_tlb_cf { /* for PDC_CACHE (I/D-TLB's) */
|
||||
unsigned long tc_pad0:12, /* reserved */
|
||||
#ifdef __LP64__
|
||||
tc_padW:32,
|
||||
#endif
|
||||
tc_sh : 2, /* 0 = separate I/D-TLB, else shared I/D-TLB */
|
||||
tc_hv : 1, /* HV */
|
||||
tc_page : 1, /* 0 = 2K page-size-machine, 1 = 4k page size */
|
||||
tc_cst : 3, /* 0 = incoherent operations, else coherent operations */
|
||||
tc_aid : 5, /* ITLB: width of access ids of processor (encoded!) */
|
||||
tc_sr : 8; /* ITLB: width of space-registers (encoded) */
|
||||
};
|
||||
|
||||
struct pdc_cache_info { /* main-PDC_CACHE-structure (caches & TLB's) */
|
||||
/* I-cache */
|
||||
unsigned long ic_size; /* size in bytes */
|
||||
struct pdc_cache_cf ic_conf; /* configuration */
|
||||
unsigned long ic_base; /* base-addr */
|
||||
unsigned long ic_stride;
|
||||
unsigned long ic_count;
|
||||
unsigned long ic_loop;
|
||||
/* D-cache */
|
||||
unsigned long dc_size; /* size in bytes */
|
||||
struct pdc_cache_cf dc_conf; /* configuration */
|
||||
unsigned long dc_base; /* base-addr */
|
||||
unsigned long dc_stride;
|
||||
unsigned long dc_count;
|
||||
unsigned long dc_loop;
|
||||
/* Instruction-TLB */
|
||||
unsigned long it_size; /* number of entries in I-TLB */
|
||||
struct pdc_tlb_cf it_conf; /* I-TLB-configuration */
|
||||
unsigned long it_sp_base;
|
||||
unsigned long it_sp_stride;
|
||||
unsigned long it_sp_count;
|
||||
unsigned long it_off_base;
|
||||
unsigned long it_off_stride;
|
||||
unsigned long it_off_count;
|
||||
unsigned long it_loop;
|
||||
/* data-TLB */
|
||||
unsigned long dt_size; /* number of entries in D-TLB */
|
||||
struct pdc_tlb_cf dt_conf; /* D-TLB-configuration */
|
||||
unsigned long dt_sp_base;
|
||||
unsigned long dt_sp_stride;
|
||||
unsigned long dt_sp_count;
|
||||
unsigned long dt_off_base;
|
||||
unsigned long dt_off_stride;
|
||||
unsigned long dt_off_count;
|
||||
unsigned long dt_loop;
|
||||
};
|
||||
|
||||
/* Might need adjustment to work with 64-bit firmware */
|
||||
struct pdc_iodc { /* PDC_IODC */
|
||||
unsigned char hversion_model;
|
||||
unsigned char hversion;
|
||||
unsigned char spa;
|
||||
unsigned char type;
|
||||
unsigned int sversion_rev:4;
|
||||
unsigned int sversion_model:19;
|
||||
unsigned int sversion_opt:8;
|
||||
unsigned char rev;
|
||||
unsigned char dep;
|
||||
unsigned char features;
|
||||
unsigned char pad1;
|
||||
unsigned int checksum:16;
|
||||
unsigned int length:16;
|
||||
unsigned int pad[15];
|
||||
} __attribute__((aligned(8))) ;
|
||||
|
||||
/* no BLTBs in pa2.0 processors */
|
||||
struct pdc_btlb_info_range {
|
||||
unsigned char res00;
|
||||
unsigned char num_i;
|
||||
unsigned char num_d;
|
||||
unsigned char num_comb;
|
||||
};
|
||||
|
||||
struct pdc_btlb_info { /* PDC_BLOCK_TLB, return of PDC_BTLB_INFO */
|
||||
unsigned int min_size; /* minimum size of BTLB in pages */
|
||||
unsigned int max_size; /* maximum size of BTLB in pages */
|
||||
struct pdc_btlb_info_range fixed_range_info;
|
||||
struct pdc_btlb_info_range variable_range_info;
|
||||
};
|
||||
|
||||
struct pdc_mem_retinfo { /* PDC_MEM/PDC_MEM_MEMINFO (return info) */
|
||||
unsigned long pdt_size;
|
||||
unsigned long pdt_entries;
|
||||
unsigned long pdt_status;
|
||||
unsigned long first_dbe_loc;
|
||||
unsigned long good_mem;
|
||||
};
|
||||
|
||||
struct pdc_mem_read_pdt { /* PDC_MEM/PDC_MEM_READ_PDT (return info) */
|
||||
unsigned long pdt_entries;
|
||||
};
|
||||
|
||||
#ifdef __LP64__
|
||||
struct pdc_memory_table_raddr { /* PDC_MEM/PDC_MEM_TABLE (return info) */
|
||||
unsigned long entries_returned;
|
||||
unsigned long entries_total;
|
||||
};
|
||||
|
||||
struct pdc_memory_table { /* PDC_MEM/PDC_MEM_TABLE (arguments) */
|
||||
unsigned long paddr;
|
||||
unsigned int pages;
|
||||
unsigned int reserved;
|
||||
};
|
||||
#endif /* __LP64__ */
|
||||
|
||||
struct pdc_system_map_mod_info { /* PDC_SYSTEM_MAP/FIND_MODULE */
|
||||
unsigned long mod_addr;
|
||||
unsigned long mod_pgs;
|
||||
unsigned long add_addrs;
|
||||
};
|
||||
|
||||
struct pdc_system_map_addr_info { /* PDC_SYSTEM_MAP/FIND_ADDRESS */
|
||||
unsigned long mod_addr;
|
||||
unsigned long mod_pgs;
|
||||
};
|
||||
|
||||
struct pdc_initiator { /* PDC_INITIATOR */
|
||||
int host_id;
|
||||
int factor;
|
||||
int width;
|
||||
int mode;
|
||||
};
|
||||
|
||||
struct hardware_path {
|
||||
char flags; /* see bit definitions below */
|
||||
char bc[6]; /* Bus Converter routing info to a specific */
|
||||
/* I/O adaptor (< 0 means none, > 63 resvd) */
|
||||
char mod; /* fixed field of specified module */
|
||||
};
|
||||
|
||||
/*
|
||||
* Device path specifications used by PDC.
|
||||
*/
|
||||
struct pdc_module_path {
|
||||
struct hardware_path path;
|
||||
unsigned int layers[6]; /* device-specific info (ctlr #, unit # ...) */
|
||||
};
|
||||
|
||||
/* Only used on some pre-PA2.0 boxes */
|
||||
struct pdc_memory_map { /* PDC_MEMORY_MAP */
|
||||
unsigned long hpa; /* mod's register set address */
|
||||
unsigned long more_pgs; /* number of additional I/O pgs */
|
||||
};
|
||||
|
||||
struct pdc_tod {
|
||||
unsigned long tod_sec;
|
||||
unsigned long tod_usec;
|
||||
};
|
||||
|
||||
/* architected results from PDC_PIM/transfer hpmc on a PA1.1 machine */
|
||||
|
||||
struct pdc_hpmc_pim_11 { /* PDC_PIM */
|
||||
unsigned int gr[32];
|
||||
unsigned int cr[32];
|
||||
unsigned int sr[8];
|
||||
unsigned int iasq_back;
|
||||
unsigned int iaoq_back;
|
||||
unsigned int check_type;
|
||||
unsigned int cpu_state;
|
||||
unsigned int rsvd1;
|
||||
unsigned int cache_check;
|
||||
unsigned int tlb_check;
|
||||
unsigned int bus_check;
|
||||
unsigned int assists_check;
|
||||
unsigned int rsvd2;
|
||||
unsigned int assist_state;
|
||||
unsigned int responder_addr;
|
||||
unsigned int requestor_addr;
|
||||
unsigned int path_info;
|
||||
unsigned long long fr[32];
|
||||
};
|
||||
|
||||
/*
|
||||
* architected results from PDC_PIM/transfer hpmc on a PA2.0 machine
|
||||
*
|
||||
* Note that PDC_PIM doesn't care whether or not wide mode was enabled
|
||||
* so the results are different on PA1.1 vs. PA2.0 when in narrow mode.
|
||||
*
|
||||
* Note also that there are unarchitected results available, which
|
||||
* are hversion dependent. Do a "ser pim 0 hpmc" after rebooting, since
|
||||
* the firmware is probably the best way of printing hversion dependent
|
||||
* data.
|
||||
*/
|
||||
|
||||
struct pdc_hpmc_pim_20 { /* PDC_PIM */
|
||||
unsigned long long gr[32];
|
||||
unsigned long long cr[32];
|
||||
unsigned long long sr[8];
|
||||
unsigned long long iasq_back;
|
||||
unsigned long long iaoq_back;
|
||||
unsigned int check_type;
|
||||
unsigned int cpu_state;
|
||||
unsigned int cache_check;
|
||||
unsigned int tlb_check;
|
||||
unsigned int bus_check;
|
||||
unsigned int assists_check;
|
||||
unsigned int assist_state;
|
||||
unsigned int path_info;
|
||||
unsigned long long responder_addr;
|
||||
unsigned long long requestor_addr;
|
||||
unsigned long long fr[32];
|
||||
};
|
||||
|
||||
#endif /* !defined(__ASSEMBLY__) */
|
||||
|
|
|
|||
|
|
@ -9,8 +9,7 @@ obj-y := cache.o pacache.o setup.o pdt.o traps.o time.o irq.o \
|
|||
pa7300lc.o syscall.o entry.o sys_parisc.o firmware.o \
|
||||
ptrace.o hardware.o inventory.o drivers.o \
|
||||
signal.o hpmc.o real2.o parisc_ksyms.o unaligned.o \
|
||||
process.o processor.o pdc_cons.o pdc_chassis.o unwind.o \
|
||||
topology.o
|
||||
process.o processor.o pdc_cons.o pdc_chassis.o unwind.o
|
||||
|
||||
ifdef CONFIG_FUNCTION_TRACER
|
||||
# Do not profile debug and lowlevel utilities
|
||||
|
|
@ -30,5 +29,6 @@ obj-$(CONFIG_AUDIT) += audit.o
|
|||
obj64-$(CONFIG_AUDIT) += compat_audit.o
|
||||
# only supported for PCX-W/U in 64-bit mode at the moment
|
||||
obj-$(CONFIG_64BIT) += perf.o perf_asm.o $(obj64-y)
|
||||
obj-$(CONFIG_PARISC_CPU_TOPOLOGY) += topology.o
|
||||
obj-$(CONFIG_FUNCTION_TRACER) += ftrace.o
|
||||
obj-$(CONFIG_FUNCTION_GRAPH_TRACER) += ftrace.o
|
||||
|
|
|
|||
|
|
@ -184,6 +184,9 @@ static int __init processor_probe(struct parisc_device *dev)
|
|||
p->txn_addr = txn_addr; /* save CPU IRQ address */
|
||||
p->cpu_num = cpu_info.cpu_num;
|
||||
p->cpu_loc = cpu_info.cpu_loc;
|
||||
|
||||
store_cpu_topology(cpuid);
|
||||
|
||||
#ifdef CONFIG_SMP
|
||||
/*
|
||||
** FIXME: review if any other initialization is clobbered
|
||||
|
|
@ -325,6 +328,8 @@ int __init init_per_cpu(int cpunum)
|
|||
set_firmware_width();
|
||||
ret = pdc_coproc_cfg(&coproc_cfg);
|
||||
|
||||
store_cpu_topology(cpunum);
|
||||
|
||||
if(ret >= 0 && coproc_cfg.ccr_functional) {
|
||||
mtctl(coproc_cfg.ccr_functional, 10); /* 10 == Coprocessor Control Reg */
|
||||
|
||||
|
|
@ -388,6 +393,14 @@ show_cpuinfo (struct seq_file *m, void *v)
|
|||
boot_cpu_data.cpu_hz / 1000000,
|
||||
boot_cpu_data.cpu_hz % 1000000 );
|
||||
|
||||
#ifdef CONFIG_PARISC_CPU_TOPOLOGY
|
||||
seq_printf(m, "physical id\t: %d\n",
|
||||
topology_physical_package_id(cpu));
|
||||
seq_printf(m, "siblings\t: %d\n",
|
||||
cpumask_weight(topology_core_cpumask(cpu)));
|
||||
seq_printf(m, "core id\t\t: %d\n", topology_core_id(cpu));
|
||||
#endif
|
||||
|
||||
seq_printf(m, "capabilities\t:");
|
||||
if (boot_cpu_data.pdc.capabilities & PDC_MODEL_OS32)
|
||||
seq_puts(m, " os32");
|
||||
|
|
|
|||
|
|
@ -408,6 +408,8 @@ void __init start_parisc(void)
|
|||
|
||||
cpunum = smp_processor_id();
|
||||
|
||||
init_cpu_topology();
|
||||
|
||||
set_firmware_width_unlocked();
|
||||
|
||||
ret = pdc_coproc_cfg_unlocked(&coproc_cfg);
|
||||
|
|
|
|||
|
|
@ -690,15 +690,15 @@ cas_action:
|
|||
/* ELF32 Process entry path */
|
||||
lws_compare_and_swap_2:
|
||||
#ifdef CONFIG_64BIT
|
||||
/* Clip the input registers */
|
||||
/* Clip the input registers. We don't need to clip %r23 as we
|
||||
only use it for word operations */
|
||||
depdi 0, 31, 32, %r26
|
||||
depdi 0, 31, 32, %r25
|
||||
depdi 0, 31, 32, %r24
|
||||
depdi 0, 31, 32, %r23
|
||||
#endif
|
||||
|
||||
/* Check the validity of the size pointer */
|
||||
subi,>>= 4, %r23, %r0
|
||||
subi,>>= 3, %r23, %r0
|
||||
b,n lws_exit_nosys
|
||||
|
||||
/* Jump to the functions which will load the old and new values into
|
||||
|
|
|
|||
|
|
@ -1,37 +1,142 @@
|
|||
/*
|
||||
* arch/parisc/kernel/topology.c - Populate sysfs with topology information
|
||||
* arch/parisc/kernel/topology.c
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
* Copyright (C) 2017 Helge Deller <deller@gmx.de>
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful, but
|
||||
* WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
|
||||
* NON INFRINGEMENT. See the GNU General Public License for more
|
||||
* details.
|
||||
* based on arch/arm/kernel/topology.c
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
|
||||
* This file is subject to the terms and conditions of the GNU General Public
|
||||
* License. See the file "COPYING" in the main directory of this archive
|
||||
* for more details.
|
||||
*/
|
||||
|
||||
#include <linux/init.h>
|
||||
#include <linux/smp.h>
|
||||
#include <linux/cpu.h>
|
||||
#include <linux/cache.h>
|
||||
#include <linux/percpu.h>
|
||||
#include <linux/sched.h>
|
||||
#include <linux/sched/topology.h>
|
||||
|
||||
static DEFINE_PER_CPU(struct cpu, cpu_devices);
|
||||
#include <asm/topology.h>
|
||||
|
||||
static int __init topology_init(void)
|
||||
/*
|
||||
* cpu topology table
|
||||
*/
|
||||
struct cputopo_parisc cpu_topology[NR_CPUS] __read_mostly;
|
||||
EXPORT_SYMBOL_GPL(cpu_topology);
|
||||
|
||||
const struct cpumask *cpu_coregroup_mask(int cpu)
|
||||
{
|
||||
int num;
|
||||
|
||||
for_each_present_cpu(num) {
|
||||
register_cpu(&per_cpu(cpu_devices, num), num);
|
||||
}
|
||||
return 0;
|
||||
return &cpu_topology[cpu].core_sibling;
|
||||
}
|
||||
|
||||
subsys_initcall(topology_init);
|
||||
static void update_siblings_masks(unsigned int cpuid)
|
||||
{
|
||||
struct cputopo_parisc *cpu_topo, *cpuid_topo = &cpu_topology[cpuid];
|
||||
int cpu;
|
||||
|
||||
/* update core and thread sibling masks */
|
||||
for_each_possible_cpu(cpu) {
|
||||
cpu_topo = &cpu_topology[cpu];
|
||||
|
||||
if (cpuid_topo->socket_id != cpu_topo->socket_id)
|
||||
continue;
|
||||
|
||||
cpumask_set_cpu(cpuid, &cpu_topo->core_sibling);
|
||||
if (cpu != cpuid)
|
||||
cpumask_set_cpu(cpu, &cpuid_topo->core_sibling);
|
||||
|
||||
if (cpuid_topo->core_id != cpu_topo->core_id)
|
||||
continue;
|
||||
|
||||
cpumask_set_cpu(cpuid, &cpu_topo->thread_sibling);
|
||||
if (cpu != cpuid)
|
||||
cpumask_set_cpu(cpu, &cpuid_topo->thread_sibling);
|
||||
}
|
||||
smp_wmb();
|
||||
}
|
||||
|
||||
static int dualcores_found __initdata;
|
||||
|
||||
/*
|
||||
* store_cpu_topology is called at boot when only one cpu is running
|
||||
* and with the mutex cpu_hotplug.lock locked, when several cpus have booted,
|
||||
* which prevents simultaneous write access to cpu_topology array
|
||||
*/
|
||||
void __init store_cpu_topology(unsigned int cpuid)
|
||||
{
|
||||
struct cputopo_parisc *cpuid_topo = &cpu_topology[cpuid];
|
||||
struct cpuinfo_parisc *p;
|
||||
int max_socket = -1;
|
||||
unsigned long cpu;
|
||||
|
||||
/* If the cpu topology has been already set, just return */
|
||||
if (cpuid_topo->core_id != -1)
|
||||
return;
|
||||
|
||||
/* create cpu topology mapping */
|
||||
cpuid_topo->thread_id = -1;
|
||||
cpuid_topo->core_id = 0;
|
||||
|
||||
p = &per_cpu(cpu_data, cpuid);
|
||||
for_each_online_cpu(cpu) {
|
||||
const struct cpuinfo_parisc *cpuinfo = &per_cpu(cpu_data, cpu);
|
||||
|
||||
if (cpu == cpuid) /* ignore current cpu */
|
||||
continue;
|
||||
|
||||
if (cpuinfo->cpu_loc == p->cpu_loc) {
|
||||
cpuid_topo->core_id = cpu_topology[cpu].core_id;
|
||||
if (p->cpu_loc) {
|
||||
cpuid_topo->core_id++;
|
||||
cpuid_topo->socket_id = cpu_topology[cpu].socket_id;
|
||||
dualcores_found = 1;
|
||||
continue;
|
||||
}
|
||||
}
|
||||
|
||||
if (cpuid_topo->socket_id == -1)
|
||||
max_socket = max(max_socket, cpu_topology[cpu].socket_id);
|
||||
}
|
||||
|
||||
if (cpuid_topo->socket_id == -1)
|
||||
cpuid_topo->socket_id = max_socket + 1;
|
||||
|
||||
update_siblings_masks(cpuid);
|
||||
|
||||
pr_info("CPU%u: thread %d, cpu %d, socket %d\n",
|
||||
cpuid, cpu_topology[cpuid].thread_id,
|
||||
cpu_topology[cpuid].core_id,
|
||||
cpu_topology[cpuid].socket_id);
|
||||
}
|
||||
|
||||
static struct sched_domain_topology_level parisc_mc_topology[] = {
|
||||
#ifdef CONFIG_SCHED_MC
|
||||
{ cpu_coregroup_mask, cpu_core_flags, SD_INIT_NAME(MC) },
|
||||
#endif
|
||||
|
||||
{ cpu_cpu_mask, SD_INIT_NAME(DIE) },
|
||||
{ NULL, },
|
||||
};
|
||||
|
||||
/*
|
||||
* init_cpu_topology is called at boot when only one cpu is running
|
||||
* which prevent simultaneous write access to cpu_topology array
|
||||
*/
|
||||
void __init init_cpu_topology(void)
|
||||
{
|
||||
unsigned int cpu;
|
||||
|
||||
/* init core mask and capacity */
|
||||
for_each_possible_cpu(cpu) {
|
||||
struct cputopo_parisc *cpu_topo = &(cpu_topology[cpu]);
|
||||
|
||||
cpu_topo->thread_id = -1;
|
||||
cpu_topo->core_id = -1;
|
||||
cpu_topo->socket_id = -1;
|
||||
cpumask_clear(&cpu_topo->core_sibling);
|
||||
cpumask_clear(&cpu_topo->thread_sibling);
|
||||
}
|
||||
smp_wmb();
|
||||
|
||||
/* Set scheduler topology descriptor */
|
||||
if (dualcores_found)
|
||||
set_sched_topology(parisc_mc_topology);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -96,9 +96,6 @@ config ARCH_PROC_KCORE_TEXT
|
|||
config CPU_BIG_ENDIAN
|
||||
def_bool y
|
||||
|
||||
config CPU_BIG_ENDIAN
|
||||
def_bool y
|
||||
|
||||
config ARCH_ATU
|
||||
bool
|
||||
default y if SPARC64
|
||||
|
|
|
|||
Loading…
Reference in a new issue