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m68knommu: platform setup for 527x ColdFire parts

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Switch to platform style configuration for 527x ColdFire parts.
Initial support is for the UARTs. DMA support moved to common code
for all ColdFire parts.

Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
This commit is contained in:
Greg Ungerer 2008-02-01 17:34:40 +10:00 committed by Linus Torvalds
parent 96db271ace
commit e206da0bb3
1 changed files with 78 additions and 9 deletions
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87
arch/m68knommu/platform/527x/config.c
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@ -16,11 +16,11 @@
#include <linux/param.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <asm/dma.h>
#include <linux/io.h>
#include <asm/machdep.h>
#include <asm/coldfire.h>
#include <asm/mcfsim.h>
#include <asm/mcfdma.h>
#include <asm/mcfuart.h>
/***************************************************************************/
@ -28,14 +28,72 @@ void coldfire_reset(void);
/***************************************************************************/
/*
* DMA channel base address table.
*/
unsigned int dma_base_addr[MAX_M68K_DMA_CHANNELS] = {
MCF_MBAR + MCFDMA_BASE0,
static struct mcf_platform_uart m527x_uart_platform[] = {
{
.mapbase = MCF_MBAR + MCFUART_BASE1,
.irq = MCFINT_VECBASE + MCFINT_UART0,
},
{
.mapbase = MCF_MBAR + MCFUART_BASE2,
.irq = MCFINT_VECBASE + MCFINT_UART1,
},
{
.mapbase = MCF_MBAR + MCFUART_BASE3,
.irq = MCFINT_VECBASE + MCFINT_UART2,
},
{ },
};
unsigned int dma_device_address[MAX_M68K_DMA_CHANNELS];
static struct platform_device m527x_uart = {
.name = "mcfuart",
.id = 0,
.dev.platform_data = m527x_uart_platform,
};
static struct platform_device *m527x_devices[] __initdata = {
&m527x_uart,
};
/***************************************************************************/
#define INTC0 (MCF_MBAR + MCFICM_INTC0)
static void __init m527x_uart_init_line(int line, int irq)
{
u16 sepmask;
u32 imr;
if ((line < 0) || (line > 2))
return;
/* level 6, line based priority */
writeb(0x30+line, INTC0 + MCFINTC_ICR0 + MCFINT_UART0 + line);
imr = readl(INTC0 + MCFINTC_IMRL);
imr &= ~((1 << (irq - MCFINT_VECBASE)) | 1);
writel(imr, INTC0 + MCFINTC_IMRL);
/*
* External Pin Mask Setting & Enable External Pin for Interface
*/
sepmask = readw(MCF_IPSBAR + MCF_GPIO_PAR_UART);
if (line == 0)
sepmask |= UART0_ENABLE_MASK;
else if (line == 1)
sepmask |= UART1_ENABLE_MASK;
else if (line == 2)
sepmask |= UART2_ENABLE_MASK;
writew(sepmask, MCF_IPSBAR + MCF_GPIO_PAR_UART);
}
static void __init m527x_uarts_init(void)
{
const int nrlines = ARRAY_SIZE(m527x_uart_platform);
int line;
for (line = 0; (line < nrlines); line++)
m527x_uart_init_line(line, m527x_uart_platform[line].irq);
}
/***************************************************************************/
@ -54,10 +112,21 @@ void mcf_autovector(unsigned int vec)
/***************************************************************************/
void config_BSP(char *commandp, int size)
void __init config_BSP(char *commandp, int size)
{
mcf_disableall();
mach_reset = coldfire_reset;
}
/***************************************************************************/
static int __init init_BSP(void)
{
m527x_uarts_init();
platform_add_devices(m527x_devices, ARRAY_SIZE(m527x_devices));
return 0;
}
arch_initcall(init_BSP);
/***************************************************************************/