ACPICA: Hardcode access width for the reset register.
The ACPI spec requires the reset register width to be 8, so we now hardcode it and ignore the FADT value. This provides/maintains compatibility with other ACPI implementations that have allowed BIOS code with bad register width values to go unnoticed. Matthew Garett, Bob Moore, Lv Zheng. Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Lv Zheng <lv.zheng@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
This commit is contained in:
parent
ab3b24807a
commit
e07fcfd89f
2 changed files with 9 additions and 2 deletions
|
@ -83,11 +83,17 @@ acpi_status acpi_reset(void)
|
|||
* For I/O space, write directly to the OSL. This bypasses the port
|
||||
* validation mechanism, which may block a valid write to the reset
|
||||
* register.
|
||||
* Spec section 4.7.3.6 requires register width to be 8.
|
||||
*
|
||||
* NOTE:
|
||||
* The ACPI spec requires the reset register width to be 8, so we
|
||||
* hardcode it here and ignore the FADT value. This maintains
|
||||
* compatibility with other ACPI implementations that have allowed
|
||||
* BIOS code with bad register width values to go unnoticed.
|
||||
*/
|
||||
status =
|
||||
acpi_os_write_port((acpi_io_address) reset_reg->address,
|
||||
acpi_gbl_FADT.reset_value, 8);
|
||||
acpi_gbl_FADT.reset_value,
|
||||
ACPI_RESET_REGISTER_WIDTH);
|
||||
} else {
|
||||
/* Write the reset value to the reset register */
|
||||
|
||||
|
|
|
@ -349,6 +349,7 @@ typedef u32 acpi_physical_address;
|
|||
#define ACPI_PM1_REGISTER_WIDTH 16
|
||||
#define ACPI_PM2_REGISTER_WIDTH 8
|
||||
#define ACPI_PM_TIMER_WIDTH 32
|
||||
#define ACPI_RESET_REGISTER_WIDTH 8
|
||||
|
||||
/* Names within the namespace are 4 bytes long */
|
||||
|
||||
|
|
Loading…
Reference in a new issue