tree-wide: fix typos "ass?o[sc]iac?te" -> "associate" in comments

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Jiri Kosina <jkosina@suse.cz>
This commit is contained in:
Uwe Kleine-König 2010-02-12 21:58:11 +01:00 committed by Jiri Kosina
parent 6b79b264ce
commit dfff0615d2
4 changed files with 4 additions and 4 deletions

View file

@ -274,7 +274,7 @@ static irqreturn_t davinci_interrupt(int irq, void *__hci)
/* NOTE: DaVinci shadows the Mentor IRQs. Don't manage them through
* the Mentor registers (except for setup), use the TI ones and EOI.
*
* Docs describe irq "vector" registers asociated with the CPPI and
* Docs describe irq "vector" registers associated with the CPPI and
* USB EOI registers. These hold a bitmask corresponding to the
* current IRQ, not an irq handler address. Would using those bits
* resolve some of the races observed in this dispatch code??

View file

@ -108,7 +108,7 @@
0c00 500XP/SupraDrive WordSync [SCSI Host Adapter]
0d00 SupraDrive WordSync II [SCSI Host Adapter]
1000 2400zi+ [Modem]
0422 Computer Systems Assosiates
0422 Computer Systems Associates
1100 Magnum 40 [Accelerator and SCSI Host Adapter]
1500 12 Gauge [SCSI Host Adapter]
0439 Marc Michael Groth

View file

@ -97,7 +97,7 @@
#define TTP_MAX_SDU_SIZE 0x01
/*
* This structure contains all data assosiated with one instance of a TTP
* This structure contains all data associated with one instance of a TTP
* connection.
*/
struct tsap_cb {

View file

@ -520,7 +520,7 @@ handle_fasteoi_irq(unsigned int irq, struct irq_desc *desc)
* signal. The occurence is latched into the irq controller hardware
* and must be acked in order to be reenabled. After the ack another
* interrupt can happen on the same source even before the first one
* is handled by the assosiacted event handler. If this happens it
* is handled by the associated event handler. If this happens it
* might be necessary to disable (mask) the interrupt depending on the
* controller hardware. This requires to reenable the interrupt inside
* of the loop which handles the interrupts which have arrived while