ath9k_hw: store the clock rate in common data on channel changes
Signed-off-by: Felix Fietkau <nbd@openwrt.org> Signed-off-by: John W. Linville <linville@tuxdriver.com>
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62c58fb431
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dfdac8ac03
3 changed files with 23 additions and 37 deletions
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@ -145,6 +145,8 @@ struct ath_common {
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DECLARE_BITMAP(tkip_keymap, ATH_KEYMAX);
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enum ath_crypt_caps crypt_caps;
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unsigned int clockrate;
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struct ath_regulatory regulatory;
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const struct ath_ops *ops;
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const struct ath_bus_ops *bus_ops;
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@ -465,35 +465,13 @@ static void ath9k_hw_ani_lower_immunity(struct ath_hw *ah)
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ath9k_hw_set_cck_nil(ah, aniState->cckNoiseImmunityLevel - 1);
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}
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static u8 ath9k_hw_chan_2_clockrate_mhz(struct ath_hw *ah)
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{
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struct ath9k_channel *chan = ah->curchan;
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struct ieee80211_conf *conf = &ath9k_hw_common(ah)->hw->conf;
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u8 clockrate; /* in MHz */
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if (!ah->curchan) /* should really check for CCK instead */
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clockrate = ATH9K_CLOCK_RATE_CCK;
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else if (conf->channel->band == IEEE80211_BAND_2GHZ)
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clockrate = ATH9K_CLOCK_RATE_2GHZ_OFDM;
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else if (IS_CHAN_A_FAST_CLOCK(ah, chan))
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clockrate = ATH9K_CLOCK_FAST_RATE_5GHZ_OFDM;
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else
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clockrate = ATH9K_CLOCK_RATE_5GHZ_OFDM;
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if (conf_is_ht40(conf))
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return clockrate * 2;
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return clockrate;
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}
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static int32_t ath9k_hw_ani_get_listen_time(struct ath_hw *ah)
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{
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struct ath_common *common = ath9k_hw_common(ah);
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int32_t listen_time;
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int32_t clock_rate;
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ath9k_hw_update_cycle_counters(ah);
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clock_rate = ath9k_hw_chan_2_clockrate_mhz(ah) * 1000;
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listen_time = ah->listen_time / clock_rate;
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listen_time = ah->listen_time / (common->clockrate * 1000);
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ah->listen_time = 0;
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return listen_time;
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@ -88,29 +88,32 @@ static void ath9k_hw_ani_cache_ini_regs(struct ath_hw *ah)
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/* Helper Functions */
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/********************/
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static u32 ath9k_hw_mac_clks(struct ath_hw *ah, u32 usecs)
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static void ath9k_hw_set_clockrate(struct ath_hw *ah)
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{
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struct ieee80211_conf *conf = &ath9k_hw_common(ah)->hw->conf;
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struct ath_common *common = ath9k_hw_common(ah);
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unsigned int clockrate;
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if (!ah->curchan) /* should really check for CCK instead */
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return usecs *ATH9K_CLOCK_RATE_CCK;
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if (conf->channel->band == IEEE80211_BAND_2GHZ)
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return usecs *ATH9K_CLOCK_RATE_2GHZ_OFDM;
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if (ah->caps.hw_caps & ATH9K_HW_CAP_FASTCLOCK)
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return usecs * ATH9K_CLOCK_FAST_RATE_5GHZ_OFDM;
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clockrate = ATH9K_CLOCK_RATE_CCK;
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else if (conf->channel->band == IEEE80211_BAND_2GHZ)
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clockrate = ATH9K_CLOCK_RATE_2GHZ_OFDM;
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else if (ah->caps.hw_caps & ATH9K_HW_CAP_FASTCLOCK)
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clockrate = ATH9K_CLOCK_FAST_RATE_5GHZ_OFDM;
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else
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return usecs * ATH9K_CLOCK_RATE_5GHZ_OFDM;
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clockrate = ATH9K_CLOCK_RATE_5GHZ_OFDM;
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if (conf_is_ht40(conf))
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clockrate *= 2;
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common->clockrate = clockrate;
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}
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static u32 ath9k_hw_mac_to_clks(struct ath_hw *ah, u32 usecs)
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{
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struct ieee80211_conf *conf = &ath9k_hw_common(ah)->hw->conf;
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struct ath_common *common = ath9k_hw_common(ah);
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if (conf_is_ht40(conf))
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return ath9k_hw_mac_clks(ah, usecs) * 2;
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else
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return ath9k_hw_mac_clks(ah, usecs);
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return usecs * common->clockrate;
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}
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bool ath9k_hw_wait(struct ath_hw *ah, u32 reg, u32 mask, u32 val, u32 timeout)
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@ -1156,6 +1159,7 @@ static bool ath9k_hw_channel_change(struct ath_hw *ah,
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"Failed to set channel\n");
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return false;
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}
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ath9k_hw_set_clockrate(ah);
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ah->eep_ops->set_txpower(ah, chan,
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ath9k_regd_get_ctl(regulatory, chan),
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@ -1368,6 +1372,8 @@ int ath9k_hw_reset(struct ath_hw *ah, struct ath9k_channel *chan,
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if (r)
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return r;
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ath9k_hw_set_clockrate(ah);
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ENABLE_REGWRITE_BUFFER(ah);
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for (i = 0; i < AR_NUM_DCU; i++)
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