Techwizz/kernel-fxtec-pro1x
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity

Merge branch 'fixes' of git://git.linaro.org/people/rmk/linux-arm

Browse source 
* 'fixes' of git://git.linaro.org/people/rmk/linux-arm: (31 commits)
  ARM: 7304/1: ioremap: fix boundary check when reusing static mapping
  ARM: 7301/1: Rename the T() macro to TUSER() to avoid namespace conflicts
  ARM: 7299/1: ftrace: clear zero bit in reported IPs for Thumb-2
  ARM: 7298/1: realview: fix mapping of MPCore private memory region
  PCMCIA: fix sa1111 oops on remove
  ARM: 7288/1: mach-sa1100: add missing module_init() call
  ARM: 7297/1: smp_twd: make sure timer is stopped before registering it
  ARM: 7296/1: proc-v7.S: remove HARVARD_CACHE preprocessor guards
  ARM: 7295/1: cortex-a7: move proc_info out of !CONFIG_ARM_LPAE block
  ARM: 7293/1: logical_cpu_map: decouple CPU mapping from SMP
  ARM: 7291/1: cache: assume 64-byte L1 cachelines for ARMv7 CPUs
  ARM: 7290/1: vmlinux.lds.S: align the exception fixup table to a 4-byte boundary
  ARM: 7289/1: vmlinux.lds.S: do not hardcode cacheline size as 32 bytes
  MFD: ucb1x00-ts: fix resume failure
  MFD: ucb1x00-core: fix gpiolib direction_output handling
  MFD: ucb1x00-core: fix missing restore of io output data on resume
  MFD: mcp-core: fix mcp_priv() to be more type safe
  MFD: mcp-core: fix complaints from the genirq layer
  Revert "ARM: sa11x0: Implement autoloading of codec and codec pdata for mcp bus."
  Revert "ARM: sa1100: Refactor mcp-sa11x0 to use platform resources."
  ...

Fix up conflict due to arch/arm/mach-mx5/Kconfig having been merged into
mach-imx5 (commit 784a90c0a7: "ARM i.MX: Merge i.MX5 support into
mach-imx"), but the ARM_L1_CACHE_SHIFT_6 entry was moved to be driven by
the CPU_V7 logic from it in the old location in rmk's branch (commit
a092f2b153: "ARM: 7291/1: cache: assume 64-byte L1 cachelines for
ARMv7 CPUs").
This commit is contained in:
Linus Torvalds 2012-01-28 13:27:10 -08:00
commit deb9b4ce97
69 changed files with 425 additions and 824 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

4
arch/arm/Kconfig
View file

@ -754,7 +754,7 @@ config ARCH_SA1100
select ARCH_HAS_CPUFREQ
select CPU_FREQ
select GENERIC_CLOCKEVENTS
select CLKDEV_LOOKUP
select HAVE_CLK
select HAVE_SCHED_CLOCK
select TICK_ONESHOT
select ARCH_REQUIRE_GPIOLIB
@ -825,7 +825,6 @@ config ARCH_S5PC100
select HAVE_CLK
select CLKDEV_LOOKUP
select CPU_V7
select ARM_L1_CACHE_SHIFT_6
select ARCH_USES_GETTIMEOFFSET
select HAVE_S3C2410_I2C if I2C
select HAVE_S3C_RTC if RTC_CLASS
@ -842,7 +841,6 @@ config ARCH_S5PV210
select HAVE_CLK
select CLKDEV_LOOKUP
select CLKSRC_MMIO
select ARM_L1_CACHE_SHIFT_6
select ARCH_HAS_CPUFREQ
select GENERIC_CLOCKEVENTS
select HAVE_SCHED_CLOCK

7
arch/arm/common/gic.c
View file

@ -41,6 +41,7 @@
#include <asm/irq.h>
#include <asm/exception.h>
#include <asm/smp_plat.h>
#include <asm/mach/irq.h>
#include <asm/hardware/gic.h>
@ -352,11 +353,7 @@ static void __init gic_dist_init(struct gic_chip_data *gic)
unsigned int gic_irqs = gic->gic_irqs;
struct irq_domain *domain = &gic->domain;
void __iomem *base = gic_data_dist_base(gic);
u32 cpu = 0;
#ifdef CONFIG_SMP
cpu = cpu_logical_map(smp_processor_id());
#endif
u32 cpu = cpu_logical_map(smp_processor_id());
cpumask = 1 << cpu;
cpumask |= cpumask << 8;

4
arch/arm/include/asm/assembler.h
View file

@ -237,7 +237,7 @@
*/
#ifdef CONFIG_THUMB2_KERNEL
.macro usraccoff, instr, reg, ptr, inc, off, cond, abort, t=T()
.macro usraccoff, instr, reg, ptr, inc, off, cond, abort, t=TUSER()
9999:
.if \inc == 1
\instr\cond\()b\()\t\().w \reg, [\ptr, #\off]
@ -277,7 +277,7 @@
#else /* !CONFIG_THUMB2_KERNEL */
.macro usracc, instr, reg, ptr, inc, cond, rept, abort, t=T()
.macro usracc, instr, reg, ptr, inc, cond, rept, abort, t=TUSER()
.rept \rept
9999:
.if \inc == 1

8
arch/arm/include/asm/domain.h
View file

@ -83,9 +83,9 @@
* instructions (inline assembly)
*/
#ifdef CONFIG_CPU_USE_DOMAINS
#define T(instr) #instr "t"
#define TUSER(instr) #instr "t"
#else
#define T(instr) #instr
#define TUSER(instr) #instr
#endif
#else /* __ASSEMBLY__ */
@ -95,9 +95,9 @@
* instructions
*/
#ifdef CONFIG_CPU_USE_DOMAINS
#define T(instr) instr ## t
#define TUSER(instr) instr ## t
#else
#define T(instr) instr
#define TUSER(instr) instr
#endif
#endif /* __ASSEMBLY__ */

8
arch/arm/include/asm/futex.h
View file

@ -75,9 +75,9 @@ futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr,
#define __futex_atomic_op(insn, ret, oldval, tmp, uaddr, oparg) \
__asm__ __volatile__( \
"1: " T(ldr) " %1, [%3]\n" \
"1: " TUSER(ldr) " %1, [%3]\n" \
" " insn "\n" \
"2: " T(str) " %0, [%3]\n" \
"2: " TUSER(str) " %0, [%3]\n" \
" mov %0, #0\n" \
__futex_atomic_ex_table("%5") \
: "=&r" (ret), "=&r" (oldval), "=&r" (tmp) \
@ -95,10 +95,10 @@ futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr,
return -EFAULT;
__asm__ __volatile__("@futex_atomic_cmpxchg_inatomic\n"
"1: " T(ldr) " %1, [%4]\n"
"1: " TUSER(ldr) " %1, [%4]\n"
" teq %1, %2\n"
" it eq @ explicit IT needed for the 2b label\n"
"2: " T(streq) " %3, [%4]\n"
"2: " TUSER(streq) " %3, [%4]\n"
__futex_atomic_ex_table("%5")
: "+r" (ret), "=&r" (val)
: "r" (oldval), "r" (newval), "r" (uaddr), "Ir" (-EFAULT)

6
arch/arm/include/asm/smp.h
View file

@ -70,12 +70,6 @@ extern void platform_secondary_init(unsigned int cpu);
*/
extern void platform_smp_prepare_cpus(unsigned int);
/*
* Logical CPU mapping.
*/
extern int __cpu_logical_map[NR_CPUS];
#define cpu_logical_map(cpu) __cpu_logical_map[cpu]
/*
* Initial data for bringing up a secondary CPU.
*/

6
arch/arm/include/asm/smp_plat.h
View file

@ -43,4 +43,10 @@ static inline int cache_ops_need_broadcast(void)
}
#endif
/*
* Logical CPU mapping.
*/
extern int __cpu_logical_map[];
#define cpu_logical_map(cpu) __cpu_logical_map[cpu]
#endif

16
arch/arm/include/asm/uaccess.h
View file

@ -227,7 +227,7 @@ do { \
#define __get_user_asm_byte(x,addr,err) \
__asm__ __volatile__( \
"1: " T(ldrb) " %1,[%2],#0\n" \
"1: " TUSER(ldrb) " %1,[%2],#0\n" \
"2:\n" \
" .pushsection .fixup,\"ax\"\n" \
" .align 2\n" \
@ -263,7 +263,7 @@ do { \
#define __get_user_asm_word(x,addr,err) \
__asm__ __volatile__( \
"1: " T(ldr) " %1,[%2],#0\n" \
"1: " TUSER(ldr) " %1,[%2],#0\n" \
"2:\n" \
" .pushsection .fixup,\"ax\"\n" \
" .align 2\n" \
@ -308,7 +308,7 @@ do { \
#define __put_user_asm_byte(x,__pu_addr,err) \
__asm__ __volatile__( \
"1: " T(strb) " %1,[%2],#0\n" \
"1: " TUSER(strb) " %1,[%2],#0\n" \
"2:\n" \
" .pushsection .fixup,\"ax\"\n" \
" .align 2\n" \
@ -341,7 +341,7 @@ do { \
#define __put_user_asm_word(x,__pu_addr,err) \
__asm__ __volatile__( \
"1: " T(str) " %1,[%2],#0\n" \
"1: " TUSER(str) " %1,[%2],#0\n" \
"2:\n" \
" .pushsection .fixup,\"ax\"\n" \
" .align 2\n" \
@ -366,10 +366,10 @@ do { \
#define __put_user_asm_dword(x,__pu_addr,err) \
__asm__ __volatile__( \
ARM( "1: " T(str) " " __reg_oper1 ", [%1], #4\n" ) \
ARM( "2: " T(str) " " __reg_oper0 ", [%1]\n" ) \
THUMB( "1: " T(str) " " __reg_oper1 ", [%1]\n" ) \
THUMB( "2: " T(str) " " __reg_oper0 ", [%1, #4]\n" ) \
ARM( "1: " TUSER(str) " " __reg_oper1 ", [%1], #4\n" ) \
ARM( "2: " TUSER(str) " " __reg_oper0 ", [%1]\n" ) \
THUMB( "1: " TUSER(str) " " __reg_oper1 ", [%1]\n" ) \
THUMB( "2: " TUSER(str) " " __reg_oper0 ", [%1, #4]\n" ) \
"3:\n" \
" .pushsection .fixup,\"ax\"\n" \
" .align 2\n" \

15
arch/arm/kernel/entry-common.S
View file

@ -149,6 +149,11 @@ ENDPROC(ret_from_fork)
#endif
#endif
.macro mcount_adjust_addr rd, rn
bic \rd, \rn, #1 @ clear the Thumb bit if present
sub \rd, \rd, #MCOUNT_INSN_SIZE
.endm
.macro __mcount suffix
mcount_enter
ldr r0, =ftrace_trace_function
@ -173,8 +178,7 @@ ENDPROC(ret_from_fork)
mcount_exit
1: mcount_get_lr r1 @ lr of instrumented func
mov r0, lr @ instrumented function
sub r0, r0, #MCOUNT_INSN_SIZE
mcount_adjust_addr r0, lr @ instrumented function
adr lr, BSYM(2f)
mov pc, r2
2: mcount_exit
@ -184,8 +188,7 @@ ENDPROC(ret_from_fork)
mcount_enter
mcount_get_lr r1 @ lr of instrumented func
mov r0, lr @ instrumented function
sub r0, r0, #MCOUNT_INSN_SIZE
mcount_adjust_addr r0, lr @ instrumented function
.globl ftrace_call\suffix
ftrace_call\suffix:
@ -205,11 +208,11 @@ ftrace_graph_call\suffix:
#ifdef CONFIG_DYNAMIC_FTRACE
@ called from __ftrace_caller, saved in mcount_enter
ldr r1, [sp, #16] @ instrumented routine (func)
mcount_adjust_addr r1, r1
#else
@ called from __mcount, untouched in lr
mov r1, lr @ instrumented routine (func)
mcount_adjust_addr r1, lr @ instrumented routine (func)
#endif
sub r1, r1, #MCOUNT_INSN_SIZE
mov r2, fp @ frame pointer
bl prepare_ftrace_return
mcount_exit

17
arch/arm/kernel/setup.c
View file

@ -21,7 +21,6 @@
#include <linux/init.h>
#include <linux/kexec.h>
#include <linux/of_fdt.h>
#include <linux/crash_dump.h>
#include <linux/root_dev.h>
#include <linux/cpu.h>
#include <linux/interrupt.h>
@ -160,7 +159,7 @@ static struct resource mem_res[] = {
.flags = IORESOURCE_MEM
},
{
.name = "Kernel text",
.name = "Kernel code",
.start = 0,
.end = 0,
.flags = IORESOURCE_MEM
@ -427,6 +426,20 @@ void cpu_init(void)
: "r14");
}
int __cpu_logical_map[NR_CPUS];
void __init smp_setup_processor_id(void)
{
int i;
u32 cpu = is_smp() ? read_cpuid_mpidr() & 0xff : 0;
cpu_logical_map(0) = cpu;
for (i = 1; i < NR_CPUS; ++i)
cpu_logical_map(i) = i == cpu ? 0 : i;
printk(KERN_INFO "Booting Linux on physical CPU %d\n", cpu);
}
static void __init setup_processor(void)
{
struct proc_info_list *list;

24
arch/arm/kernel/smp.c
View file

@ -233,20 +233,6 @@ void __ref cpu_die(void)
}
#endif /* CONFIG_HOTPLUG_CPU */
int __cpu_logical_map[NR_CPUS];
void __init smp_setup_processor_id(void)
{
int i;
u32 cpu = is_smp() ? read_cpuid_mpidr() & 0xff : 0;
cpu_logical_map(0) = cpu;
for (i = 1; i < NR_CPUS; ++i)
cpu_logical_map(i) = i == cpu ? 0 : i;
printk(KERN_INFO "Booting Linux on physical CPU %d\n", cpu);
}
/*
* Called by both boot and secondaries to move global data into
* per-processor storage.
@ -443,9 +429,7 @@ static DEFINE_PER_CPU(struct clock_event_device, percpu_clockevent);
static void ipi_timer(void)
{
struct clock_event_device *evt = &__get_cpu_var(percpu_clockevent);
irq_enter();
evt->event_handler(evt);
irq_exit();
}
#ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
@ -548,7 +532,9 @@ void handle_IPI(int ipinr, struct pt_regs *regs)
switch (ipinr) {
case IPI_TIMER:
irq_enter();
ipi_timer();
irq_exit();
break;
case IPI_RESCHEDULE:
@ -556,15 +542,21 @@ void handle_IPI(int ipinr, struct pt_regs *regs)
break;
case IPI_CALL_FUNC:
irq_enter();
generic_smp_call_function_interrupt();
irq_exit();
break;
case IPI_CALL_FUNC_SINGLE:
irq_enter();
generic_smp_call_function_single_interrupt();
irq_exit();
break;
case IPI_CPU_STOP:
irq_enter();
ipi_cpu_stop(cpu);
irq_exit();
break;
default:

2
arch/arm/kernel/smp_twd.c
View file

@ -252,6 +252,8 @@ void __cpuinit twd_timer_setup(struct clock_event_device *clk)
else
twd_calibrate_rate();
__raw_writel(0, twd_base + TWD_TIMER_CONTROL);
clk->name = "local_timer";
clk->features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT |
CLOCK_EVT_FEAT_C3STOP;

9
arch/arm/kernel/vmlinux.lds.S
View file

@ -4,6 +4,7 @@
*/
#include <asm-generic/vmlinux.lds.h>
#include <asm/cache.h>
#include <asm/thread_info.h>
#include <asm/memory.h>
#include <asm/page.h>
@ -181,7 +182,7 @@ SECTIONS
}
#endif
PERCPU_SECTION(32)
PERCPU_SECTION(L1_CACHE_BYTES)
#ifdef CONFIG_XIP_KERNEL
__data_loc = ALIGN(4); /* location in binary */
@ -212,13 +213,13 @@ SECTIONS
#endif
NOSAVE_DATA
CACHELINE_ALIGNED_DATA(32)
READ_MOSTLY_DATA(32)
CACHELINE_ALIGNED_DATA(L1_CACHE_BYTES)
READ_MOSTLY_DATA(L1_CACHE_BYTES)
/*
* The exception fixup table (might need resorting at runtime)
*/
. = ALIGN(32);
. = ALIGN(4);
__start___ex_table = .;
#ifdef CONFIG_MMU
*(__ex_table)

12
arch/arm/lib/getuser.S
View file

@ -31,18 +31,18 @@
#include <asm/domain.h>
ENTRY(__get_user_1)
1: T(ldrb) r2, [r0]
1: TUSER(ldrb) r2, [r0]
mov r0, #0
mov pc, lr
ENDPROC(__get_user_1)
ENTRY(__get_user_2)
#ifdef CONFIG_THUMB2_KERNEL
2: T(ldrb) r2, [r0]
3: T(ldrb) r3, [r0, #1]
2: TUSER(ldrb) r2, [r0]
3: TUSER(ldrb) r3, [r0, #1]
#else
2: T(ldrb) r2, [r0], #1
3: T(ldrb) r3, [r0]
2: TUSER(ldrb) r2, [r0], #1
3: TUSER(ldrb) r3, [r0]
#endif
#ifndef __ARMEB__
orr r2, r2, r3, lsl #8
@ -54,7 +54,7 @@ ENTRY(__get_user_2)
ENDPROC(__get_user_2)
ENTRY(__get_user_4)
4: T(ldr) r2, [r0]
4: TUSER(ldr) r2, [r0]
mov r0, #0
mov pc, lr
ENDPROC(__get_user_4)

28
arch/arm/lib/putuser.S
View file

@ -31,7 +31,7 @@
#include <asm/domain.h>
ENTRY(__put_user_1)
1: T(strb) r2, [r0]
1: TUSER(strb) r2, [r0]
mov r0, #0
mov pc, lr
ENDPROC(__put_user_1)
@ -40,19 +40,19 @@ ENTRY(__put_user_2)
mov ip, r2, lsr #8
#ifdef CONFIG_THUMB2_KERNEL
#ifndef __ARMEB__
2: T(strb) r2, [r0]
3: T(strb) ip, [r0, #1]
2: TUSER(strb) r2, [r0]
3: TUSER(strb) ip, [r0, #1]
#else
2: T(strb) ip, [r0]
3: T(strb) r2, [r0, #1]
2: TUSER(strb) ip, [r0]
3: TUSER(strb) r2, [r0, #1]
#endif
#else /* !CONFIG_THUMB2_KERNEL */
#ifndef __ARMEB__
2: T(strb) r2, [r0], #1
3: T(strb) ip, [r0]
2: TUSER(strb) r2, [r0], #1
3: TUSER(strb) ip, [r0]
#else
2: T(strb) ip, [r0], #1
3: T(strb) r2, [r0]
2: TUSER(strb) ip, [r0], #1
3: TUSER(strb) r2, [r0]
#endif
#endif /* CONFIG_THUMB2_KERNEL */
mov r0, #0
@ -60,18 +60,18 @@ ENTRY(__put_user_2)
ENDPROC(__put_user_2)
ENTRY(__put_user_4)
4: T(str) r2, [r0]
4: TUSER(str) r2, [r0]
mov r0, #0
mov pc, lr
ENDPROC(__put_user_4)
ENTRY(__put_user_8)
#ifdef CONFIG_THUMB2_KERNEL
5: T(str) r2, [r0]
6: T(str) r3, [r0, #4]
5: TUSER(str) r2, [r0]
6: TUSER(str) r3, [r0, #4]
#else
5: T(str) r2, [r0], #4
6: T(str) r3, [r0]
5: TUSER(str) r2, [r0], #4
6: TUSER(str) r3, [r0]
#endif
mov r0, #0
mov pc, lr

82
arch/arm/lib/uaccess.S
View file

@ -32,11 +32,11 @@
rsb ip, ip, #4
cmp ip, #2
ldrb r3, [r1], #1
USER( T(strb) r3, [r0], #1) @ May fault
USER( TUSER( strb) r3, [r0], #1) @ May fault
ldrgeb r3, [r1], #1
USER( T(strgeb) r3, [r0], #1) @ May fault
USER( TUSER( strgeb) r3, [r0], #1) @ May fault
ldrgtb r3, [r1], #1
USER( T(strgtb) r3, [r0], #1) @ May fault
USER( TUSER( strgtb) r3, [r0], #1) @ May fault
sub r2, r2, ip
b .Lc2u_dest_aligned
@ -59,7 +59,7 @@ ENTRY(__copy_to_user)
addmi ip, r2, #4
bmi .Lc2u_0nowords
ldr r3, [r1], #4
USER( T(str) r3, [r0], #4) @ May fault
USER( TUSER( str) r3, [r0], #4) @ May fault
mov ip, r0, lsl #32 - PAGE_SHIFT @ On each page, use a ld/st??t instruction
rsb ip, ip, #0
movs ip, ip, lsr #32 - PAGE_SHIFT
@ -88,18 +88,18 @@ USER( T(str) r3, [r0], #4) @ May fault
stmneia r0!, {r3 - r4} @ Shouldnt fault
tst ip, #4
ldrne r3, [r1], #4
T(strne) r3, [r0], #4 @ Shouldnt fault
TUSER( strne) r3, [r0], #4 @ Shouldnt fault
ands ip, ip, #3
beq .Lc2u_0fupi
.Lc2u_0nowords: teq ip, #0
beq .Lc2u_finished
.Lc2u_nowords: cmp ip, #2
ldrb r3, [r1], #1
USER( T(strb) r3, [r0], #1) @ May fault
USER( TUSER( strb) r3, [r0], #1) @ May fault
ldrgeb r3, [r1], #1
USER( T(strgeb) r3, [r0], #1) @ May fault
USER( TUSER( strgeb) r3, [r0], #1) @ May fault
ldrgtb r3, [r1], #1
USER( T(strgtb) r3, [r0], #1) @ May fault
USER( TUSER( strgtb) r3, [r0], #1) @ May fault
b .Lc2u_finished
.Lc2u_not_enough:
@ -120,7 +120,7 @@ USER( T(strgtb) r3, [r0], #1) @ May fault
mov r3, r7, pull #8
ldr r7, [r1], #4
orr r3, r3, r7, push #24
USER( T(str) r3, [r0], #4) @ May fault
USER( TUSER( str) r3, [r0], #4) @ May fault
mov ip, r0, lsl #32 - PAGE_SHIFT
rsb ip, ip, #0
movs ip, ip, lsr #32 - PAGE_SHIFT
@ -155,18 +155,18 @@ USER( T(str) r3, [r0], #4) @ May fault
movne r3, r7, pull #8
ldrne r7, [r1], #4
orrne r3, r3, r7, push #24
T(strne) r3, [r0], #4 @ Shouldnt fault
TUSER( strne) r3, [r0], #4 @ Shouldnt fault
ands ip, ip, #3
beq .Lc2u_1fupi
.Lc2u_1nowords: mov r3, r7, get_byte_1
teq ip, #0
beq .Lc2u_finished
cmp ip, #2
USER( T(strb) r3, [r0], #1) @ May fault
USER( TUSER( strb) r3, [r0], #1) @ May fault
movge r3, r7, get_byte_2
USER( T(strgeb) r3, [r0], #1) @ May fault
USER( TUSER( strgeb) r3, [r0], #1) @ May fault
movgt r3, r7, get_byte_3
USER( T(strgtb) r3, [r0], #1) @ May fault
USER( TUSER( strgtb) r3, [r0], #1) @ May fault
b .Lc2u_finished
.Lc2u_2fupi: subs r2, r2, #4
@ -175,7 +175,7 @@ USER( T(strgtb) r3, [r0], #1) @ May fault
mov r3, r7, pull #16
ldr r7, [r1], #4
orr r3, r3, r7, push #16
USER( T(str) r3, [r0], #4) @ May fault
USER( TUSER( str) r3, [r0], #4) @ May fault
mov ip, r0, lsl #32 - PAGE_SHIFT
rsb ip, ip, #0
movs ip, ip, lsr #32 - PAGE_SHIFT
@ -210,18 +210,18 @@ USER( T(str) r3, [r0], #4) @ May fault
movne r3, r7, pull #16
ldrne r7, [r1], #4
orrne r3, r3, r7, push #16
T(strne) r3, [r0], #4 @ Shouldnt fault
TUSER( strne) r3, [r0], #4 @ Shouldnt fault
ands ip, ip, #3
beq .Lc2u_2fupi
.Lc2u_2nowords: mov r3, r7, get_byte_2
teq ip, #0
beq .Lc2u_finished
cmp ip, #2
USER( T(strb) r3, [r0], #1) @ May fault
USER( TUSER( strb) r3, [r0], #1) @ May fault
movge r3, r7, get_byte_3
USER( T(strgeb) r3, [r0], #1) @ May fault
USER( TUSER( strgeb) r3, [r0], #1) @ May fault
ldrgtb r3, [r1], #0
USER( T(strgtb) r3, [r0], #1) @ May fault
USER( TUSER( strgtb) r3, [r0], #1) @ May fault
b .Lc2u_finished
.Lc2u_3fupi: subs r2, r2, #4
@ -230,7 +230,7 @@ USER( T(strgtb) r3, [r0], #1) @ May fault
mov r3, r7, pull #24
ldr r7, [r1], #4
orr r3, r3, r7, push #8
USER( T(str) r3, [r0], #4) @ May fault
USER( TUSER( str) r3, [r0], #4) @ May fault
mov ip, r0, lsl #32 - PAGE_SHIFT
rsb ip, ip, #0
movs ip, ip, lsr #32 - PAGE_SHIFT
@ -265,18 +265,18 @@ USER( T(str) r3, [r0], #4) @ May fault
movne r3, r7, pull #24
ldrne r7, [r1], #4
orrne r3, r3, r7, push #8
T(strne) r3, [r0], #4 @ Shouldnt fault
TUSER( strne) r3, [r0], #4 @ Shouldnt fault
ands ip, ip, #3
beq .Lc2u_3fupi
.Lc2u_3nowords: mov r3, r7, get_byte_3
teq ip, #0
beq .Lc2u_finished
cmp ip, #2
USER( T(strb) r3, [r0], #1) @ May fault
USER( TUSER( strb) r3, [r0], #1) @ May fault
ldrgeb r3, [r1], #1
USER( T(strgeb) r3, [r0], #1) @ May fault
USER( TUSER( strgeb) r3, [r0], #1) @ May fault
ldrgtb r3, [r1], #0
USER( T(strgtb) r3, [r0], #1) @ May fault
USER( TUSER( strgtb) r3, [r0], #1) @ May fault
b .Lc2u_finished
ENDPROC(__copy_to_user)
@ -295,11 +295,11 @@ ENDPROC(__copy_to_user)
.Lcfu_dest_not_aligned:
rsb ip, ip, #4
cmp ip, #2
USER( T(ldrb) r3, [r1], #1) @ May fault
USER( TUSER( ldrb) r3, [r1], #1) @ May fault
strb r3, [r0], #1
USER( T(ldrgeb) r3, [r1], #1) @ May fault
USER( TUSER( ldrgeb) r3, [r1], #1) @ May fault
strgeb r3, [r0], #1
USER( T(ldrgtb) r3, [r1], #1) @ May fault
USER( TUSER( ldrgtb) r3, [r1], #1) @ May fault
strgtb r3, [r0], #1
sub r2, r2, ip
b .Lcfu_dest_aligned
@ -322,7 +322,7 @@ ENTRY(__copy_from_user)
.Lcfu_0fupi: subs r2, r2, #4
addmi ip, r2, #4
bmi .Lcfu_0nowords
USER( T(ldr) r3, [r1], #4)
USER( TUSER( ldr) r3, [r1], #4)
str r3, [r0], #4
mov ip, r1, lsl #32 - PAGE_SHIFT @ On each page, use a ld/st??t instruction
rsb ip, ip, #0
@ -351,18 +351,18 @@ USER( T(ldr) r3, [r1], #4)
ldmneia r1!, {r3 - r4} @ Shouldnt fault
stmneia r0!, {r3 - r4}
tst ip, #4
T(ldrne) r3, [r1], #4 @ Shouldnt fault
TUSER( ldrne) r3, [r1], #4 @ Shouldnt fault
strne r3, [r0], #4
ands ip, ip, #3
beq .Lcfu_0fupi
.Lcfu_0nowords: teq ip, #0
beq .Lcfu_finished
.Lcfu_nowords: cmp ip, #2
USER( T(ldrb) r3, [r1], #1) @ May fault
USER( TUSER( ldrb) r3, [r1], #1) @ May fault
strb r3, [r0], #1
USER( T(ldrgeb) r3, [r1], #1) @ May fault
USER( TUSER( ldrgeb) r3, [r1], #1) @ May fault
strgeb r3, [r0], #1
USER( T(ldrgtb) r3, [r1], #1) @ May fault
USER( TUSER( ldrgtb) r3, [r1], #1) @ May fault
strgtb r3, [r0], #1
b .Lcfu_finished
@ -375,7 +375,7 @@ USER( T(ldrgtb) r3, [r1], #1) @ May fault
.Lcfu_src_not_aligned:
bic r1, r1, #3
USER( T(ldr) r7, [r1], #4) @ May fault
USER( TUSER( ldr) r7, [r1], #4) @ May fault
cmp ip, #2
bgt .Lcfu_3fupi
beq .Lcfu_2fupi
@ -383,7 +383,7 @@ USER( T(ldr) r7, [r1], #4) @ May fault
addmi ip, r2, #4
bmi .Lcfu_1nowords
mov r3, r7, pull #8
USER( T(ldr) r7, [r1], #4) @ May fault
USER( TUSER( ldr) r7, [r1], #4) @ May fault
orr r3, r3, r7, push #24
str r3, [r0], #4
mov ip, r1, lsl #32 - PAGE_SHIFT
@ -418,7 +418,7 @@ USER( T(ldr) r7, [r1], #4) @ May fault
stmneia r0!, {r3 - r4}
tst ip, #4
movne r3, r7, pull #8
USER( T(ldrne) r7, [r1], #4) @ May fault
USER( TUSER( ldrne) r7, [r1], #4) @ May fault
orrne r3, r3, r7, push #24
strne r3, [r0], #4
ands ip, ip, #3
@ -438,7 +438,7 @@ USER( T(ldrne) r7, [r1], #4) @ May fault
addmi ip, r2, #4
bmi .Lcfu_2nowords
mov r3, r7, pull #16
USER( T(ldr) r7, [r1], #4) @ May fault
USER( TUSER( ldr) r7, [r1], #4) @ May fault
orr r3, r3, r7, push #16
str r3, [r0], #4
mov ip, r1, lsl #32 - PAGE_SHIFT
@ -474,7 +474,7 @@ USER( T(ldr) r7, [r1], #4) @ May fault
stmneia r0!, {r3 - r4}
tst ip, #4
movne r3, r7, pull #16
USER( T(ldrne) r7, [r1], #4) @ May fault
USER( TUSER( ldrne) r7, [r1], #4) @ May fault
orrne r3, r3, r7, push #16
strne r3, [r0], #4
ands ip, ip, #3
@ -486,7 +486,7 @@ USER( T(ldrne) r7, [r1], #4) @ May fault
strb r3, [r0], #1
movge r3, r7, get_byte_3
strgeb r3, [r0], #1
USER( T(ldrgtb) r3, [r1], #0) @ May fault
USER( TUSER( ldrgtb) r3, [r1], #0) @ May fault
strgtb r3, [r0], #1
b .Lcfu_finished
@ -494,7 +494,7 @@ USER( T(ldrgtb) r3, [r1], #0) @ May fault
addmi ip, r2, #4
bmi .Lcfu_3nowords
mov r3, r7, pull #24
USER( T(ldr) r7, [r1], #4) @ May fault
USER( TUSER( ldr) r7, [r1], #4) @ May fault
orr r3, r3, r7, push #8
str r3, [r0], #4
mov ip, r1, lsl #32 - PAGE_SHIFT
@ -529,7 +529,7 @@ USER( T(ldr) r7, [r1], #4) @ May fault
stmneia r0!, {r3 - r4}
tst ip, #4
movne r3, r7, pull #24
USER( T(ldrne) r7, [r1], #4) @ May fault
USER( TUSER( ldrne) r7, [r1], #4) @ May fault
orrne r3, r3, r7, push #8
strne r3, [r0], #4
ands ip, ip, #3
@ -539,9 +539,9 @@ USER( T(ldrne) r7, [r1], #4) @ May fault
beq .Lcfu_finished
cmp ip, #2
strb r3, [r0], #1
USER( T(ldrgeb) r3, [r1], #1) @ May fault
USER( TUSER( ldrgeb) r3, [r1], #1) @ May fault
strgeb r3, [r0], #1
USER( T(ldrgtb) r3, [r1], #1) @ May fault
USER( TUSER( ldrgtb) r3, [r1], #1) @ May fault
strgtb r3, [r0], #1
b .Lcfu_finished
ENDPROC(__copy_from_user)

1
arch/arm/mach-exynos/hotplug.c
View file

@ -16,6 +16,7 @@
#include <linux/io.h>
#include <asm/cacheflush.h>
#include <asm/smp_plat.h>
#include <mach/regs-pmu.h>

1
arch/arm/mach-exynos/platsmp.c
View file

@ -23,6 +23,7 @@
#include <asm/cacheflush.h>
#include <asm/hardware/gic.h>
#include <asm/smp_plat.h>
#include <asm/smp_scu.h>
#include <mach/hardware.h>

3
arch/arm/mach-highbank/highbank.c
View file

@ -25,6 +25,7 @@
#include <linux/smp.h>
#include <asm/cacheflush.h>
#include <asm/smp_plat.h>
#include <asm/smp_scu.h>
#include <asm/hardware/arm_timer.h>
#include <asm/hardware/timer-sp.h>
@ -72,9 +73,7 @@ static void __init highbank_map_io(void)
void highbank_set_cpu_jump(int cpu, void *jump_addr)
{
#ifdef CONFIG_SMP
cpu = cpu_logical_map(cpu);
#endif
writel(virt_to_phys(jump_addr), HB_JUMP_TABLE_VIRT(cpu));
__cpuc_flush_dcache_area(HB_JUMP_TABLE_VIRT(cpu), 16);
outer_clean_range(HB_JUMP_TABLE_PHYS(cpu),

1
arch/arm/mach-imx/Kconfig
View file

@ -87,7 +87,6 @@ config SOC_IMX35
config SOC_IMX5
select CPU_V7
select ARM_L1_CACHE_SHIFT_6
select MXC_TZIC
select ARCH_MXC_IOMUX_V3
select ARCH_MXC_AUDMUX_V2

5
arch/arm/mach-imx/src.c
View file

@ -15,6 +15,7 @@
#include <linux/of.h>
#include <linux/of_address.h>
#include <linux/smp.h>
#include <asm/smp_plat.h>
#define SRC_SCR 0x000
#define SRC_GPR1 0x020
@ -24,10 +25,6 @@
static void __iomem *src_base;
#ifndef CONFIG_SMP
#define cpu_logical_map(cpu) 0
#endif
void imx_enable_cpu(int cpu, bool enable)
{
u32 mask, val;

1
arch/arm/mach-msm/hotplug.c
View file

@ -11,6 +11,7 @@
#include <linux/smp.h>
#include <asm/cacheflush.h>
#include <asm/smp_plat.h>
extern volatile int pen_release;

1
arch/arm/mach-msm/platsmp.c
View file

@ -20,6 +20,7 @@
#include <asm/cacheflush.h>
#include <asm/cputype.h>
#include <asm/mach-types.h>
#include <asm/smp_plat.h>
#include <mach/msm_iomap.h>

1
arch/arm/mach-omap2/Kconfig
View file

@ -33,7 +33,6 @@ config ARCH_OMAP3
default y
select CPU_V7
select USB_ARCH_HAS_EHCI
select ARM_L1_CACHE_SHIFT_6 if !ARCH_OMAP4
select ARCH_HAS_OPP
select PM_OPP if PM
select ARM_CPU_SUSPEND if PM

20
arch/arm/mach-pxa/devices.c
View file

@ -415,29 +415,9 @@ static struct resource pxa_rtc_resources[] = {
},
};
static struct resource sa1100_rtc_resources[] = {
[0] = {
.start = 0x40900000,
.end = 0x409000ff,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = IRQ_RTC1Hz,
.end = IRQ_RTC1Hz,
.flags = IORESOURCE_IRQ,
},
[2] = {
.start = IRQ_RTCAlrm,
.end = IRQ_RTCAlrm,
.flags = IORESOURCE_IRQ,
},
};
struct platform_device sa1100_device_rtc = {
.name = "sa1100-rtc",
.id = -1,
.num_resources = ARRAY_SIZE(sa1100_rtc_resources),
.resource = sa1100_rtc_resources,
};
struct platform_device pxa_device_rtc = {

2
arch/arm/mach-pxa/pxa25x.c
View file

@ -209,8 +209,6 @@ static struct clk_lookup pxa25x_clkregs[] = {
INIT_CLKREG(&clk_pxa25x_gpio11, NULL, "GPIO11_CLK"),
INIT_CLKREG(&clk_pxa25x_gpio12, NULL, "GPIO12_CLK"),
INIT_CLKREG(&clk_pxa25x_mem, "pxa2xx-pcmcia", NULL),
INIT_CLKREG(&clk_dummy, "pxa-gpio", NULL),
INIT_CLKREG(&clk_dummy, "sa1100-rtc", NULL),
};
static struct clk_lookup pxa25x_hwuart_clkreg =

2
arch/arm/mach-pxa/pxa27x.c
View file

@ -230,8 +230,6 @@ static struct clk_lookup pxa27x_clkregs[] = {
INIT_CLKREG(&clk_pxa27x_im, NULL, "IMCLK"),
INIT_CLKREG(&clk_pxa27x_memc, NULL, "MEMCLK"),
INIT_CLKREG(&clk_pxa27x_mem, "pxa2xx-pcmcia", NULL),
INIT_CLKREG(&clk_dummy, "pxa-gpio", NULL),
INIT_CLKREG(&clk_dummy, "sa1100-rtc", NULL),
};
#ifdef CONFIG_PM

1
arch/arm/mach-pxa/pxa300.c
View file

@ -89,7 +89,6 @@ static DEFINE_PXA3_CKEN(gcu, PXA300_GCU, 0, 0);
static struct clk_lookup common_clkregs[] = {
INIT_CLKREG(&clk_common_nand, "pxa3xx-nand", NULL),
INIT_CLKREG(&clk_gcu, "pxa3xx-gcu", NULL),
INIT_CLKREG(&clk_dummy, "sa1100-rtc", NULL),
};
static DEFINE_PXA3_CKEN(pxa310_mmc3, MMC3, 19500000, 0);

1
arch/arm/mach-pxa/pxa320.c
View file

@ -83,7 +83,6 @@ static DEFINE_PXA3_CKEN(gcu, PXA320_GCU, 0, 0);
static struct clk_lookup pxa320_clkregs[] = {
INIT_CLKREG(&clk_pxa320_nand, "pxa3xx-nand", NULL),
INIT_CLKREG(&clk_gcu, "pxa3xx-gcu", NULL),
INIT_CLKREG(&clk_dummy, "sa1100-rtc", NULL),
};
static int __init pxa320_init(void)

1
arch/arm/mach-pxa/pxa3xx.c
View file

@ -67,7 +67,6 @@ static struct clk_lookup pxa3xx_clkregs[] = {
INIT_CLKREG(&clk_pxa3xx_pout, NULL, "CLK_POUT"),
/* Power I2C clock is always on */
INIT_CLKREG(&clk_dummy, "pxa3xx-pwri2c.1", NULL),
INIT_CLKREG(&clk_dummy, "sa1100-rtc", NULL),
INIT_CLKREG(&clk_pxa3xx_lcd, "pxa2xx-fb", NULL),
INIT_CLKREG(&clk_pxa3xx_camera, NULL, "CAMCLK"),
INIT_CLKREG(&clk_pxa3xx_ac97, NULL, "AC97CLK"),

1
arch/arm/mach-pxa/pxa95x.c
View file

@ -217,7 +217,6 @@ static struct clk_lookup pxa95x_clkregs[] = {
INIT_CLKREG(&clk_pxa95x_pout, NULL, "CLK_POUT"),
/* Power I2C clock is always on */
INIT_CLKREG(&clk_dummy, "pxa3xx-pwri2c.1", NULL),
INIT_CLKREG(&clk_dummy, "sa1100-rtc", NULL),
INIT_CLKREG(&clk_pxa95x_lcd, "pxa2xx-fb", NULL),
INIT_CLKREG(&clk_pxa95x_ffuart, "pxa2xx-uart.0", NULL),
INIT_CLKREG(&clk_pxa95x_btuart, "pxa2xx-uart.1", NULL),

1
arch/arm/mach-realview/hotplug.c
View file

@ -13,6 +13,7 @@
#include <linux/smp.h>
#include <asm/cacheflush.h>
#include <asm/smp_plat.h>
extern volatile int pen_release;

18
arch/arm/mach-realview/include/mach/board-eb.h
View file

@ -47,21 +47,23 @@
#define REALVIEW_EB_USB_BASE 0x4F000000 /* USB */
#ifdef CONFIG_REALVIEW_EB_ARM11MP_REVB
#define REALVIEW_EB11MP_SCU_BASE 0x10100000 /* SCU registers */
#define REALVIEW_EB11MP_GIC_CPU_BASE 0x10100100 /* Generic interrupt controller CPU interface */
#define REALVIEW_EB11MP_TWD_BASE 0x10100600
#define REALVIEW_EB11MP_GIC_DIST_BASE 0x10101000 /* Generic interrupt controller distributor */
#define REALVIEW_EB11MP_PRIV_MEM_BASE 0x1F000000
#define REALVIEW_EB11MP_L220_BASE 0x10102000 /* L220 registers */
#define REALVIEW_EB11MP_SYS_PLD_CTRL1 0xD8 /* Register offset for MPCore sysctl */
#else
#define REALVIEW_EB11MP_SCU_BASE 0x1F000000 /* SCU registers */
#define REALVIEW_EB11MP_GIC_CPU_BASE 0x1F000100 /* Generic interrupt controller CPU interface */
#define REALVIEW_EB11MP_TWD_BASE 0x1F000600
#define REALVIEW_EB11MP_GIC_DIST_BASE 0x1F001000 /* Generic interrupt controller distributor */
#define REALVIEW_EB11MP_PRIV_MEM_BASE 0x1F000000
#define REALVIEW_EB11MP_L220_BASE 0x1F002000 /* L220 registers */
#define REALVIEW_EB11MP_SYS_PLD_CTRL1 0x74 /* Register offset for MPCore sysctl */
#endif
#define REALVIEW_EB11MP_PRIV_MEM_SIZE SZ_8K
#define REALVIEW_EB11MP_PRIV_MEM_OFF(x) (REALVIEW_EB11MP_PRIV_MEM_BASE + (x))
#define REALVIEW_EB11MP_SCU_BASE REALVIEW_EB11MP_PRIV_MEM_OFF(0) /* SCU registers */
#define REALVIEW_EB11MP_GIC_CPU_BASE REALVIEW_EB11MP_PRIV_MEM_OFF(0x0100) /* Generic interrupt controller CPU interface */
#define REALVIEW_EB11MP_TWD_BASE REALVIEW_EB11MP_PRIV_MEM_OFF(0x0600)
#define REALVIEW_EB11MP_GIC_DIST_BASE REALVIEW_EB11MP_PRIV_MEM_OFF(0x1000) /* Generic interrupt controller distributor */
/*
* Core tile identification (REALVIEW_SYS_PROCID)
*/

2
arch/arm/mach-realview/include/mach/board-pb11mp.h
View file

@ -75,6 +75,8 @@
/*
* Testchip peripheral and fpga gic regions
*/
#define REALVIEW_TC11MP_PRIV_MEM_BASE 0x1F000000
#define REALVIEW_TC11MP_PRIV_MEM_SIZE SZ_8K
#define REALVIEW_TC11MP_SCU_BASE 0x1F000000 /* IRQ, Test chip */
#define REALVIEW_TC11MP_GIC_CPU_BASE 0x1F000100 /* Test chip interrupt controller CPU interface */
#define REALVIEW_TC11MP_TWD_BASE 0x1F000600

11
arch/arm/mach-realview/realview_eb.c
View file

@ -91,14 +91,9 @@ static struct map_desc realview_eb_io_desc[] __initdata = {
static struct map_desc realview_eb11mp_io_desc[] __initdata = {
{
.virtual = IO_ADDRESS(REALVIEW_EB11MP_SCU_BASE),
.pfn = __phys_to_pfn(REALVIEW_EB11MP_SCU_BASE),
.length = SZ_4K,
.type = MT_DEVICE,
}, {
.virtual = IO_ADDRESS(REALVIEW_EB11MP_GIC_DIST_BASE),
.pfn = __phys_to_pfn(REALVIEW_EB11MP_GIC_DIST_BASE),
.length = SZ_4K,
.virtual = IO_ADDRESS(REALVIEW_EB11MP_PRIV_MEM_BASE),
.pfn = __phys_to_pfn(REALVIEW_EB11MP_PRIV_MEM_BASE),
.length = REALVIEW_EB11MP_PRIV_MEM_SIZE,
.type = MT_DEVICE,
}, {
.virtual = IO_ADDRESS(REALVIEW_EB11MP_L220_BASE),

13
arch/arm/mach-realview/realview_pb11mp.c
View file

@ -64,15 +64,10 @@ static struct map_desc realview_pb11mp_io_desc[] __initdata = {
.pfn = __phys_to_pfn(REALVIEW_PB11MP_GIC_DIST_BASE),
.length = SZ_4K,
.type = MT_DEVICE,
}, {
.virtual = IO_ADDRESS(REALVIEW_TC11MP_GIC_CPU_BASE),
.pfn = __phys_to_pfn(REALVIEW_TC11MP_GIC_CPU_BASE),
.length = SZ_4K,
.type = MT_DEVICE,
}, {
.virtual = IO_ADDRESS(REALVIEW_TC11MP_GIC_DIST_BASE),
.pfn = __phys_to_pfn(REALVIEW_TC11MP_GIC_DIST_BASE),
.length = SZ_4K,
}, { /* Maps the SCU, GIC CPU interface, TWD, GIC DIST */
.virtual = IO_ADDRESS(REALVIEW_TC11MP_PRIV_MEM_BASE),
.pfn = __phys_to_pfn(REALVIEW_TC11MP_PRIV_MEM_BASE),
.length = REALVIEW_TC11MP_PRIV_MEM_SIZE,
.type = MT_DEVICE,
}, {
.virtual = IO_ADDRESS(REALVIEW_SCTL_BASE),

12
arch/arm/mach-sa1100/assabet.c
View file

@ -202,7 +202,6 @@ static struct irda_platform_data assabet_irda_data = {
static struct mcp_plat_data assabet_mcp_data = {
.mccr0 = MCCR0_ADM,
.sclk_rate = 11981000,
.codec = "ucb1x00",
};
static void __init assabet_init(void)
@ -253,17 +252,6 @@ static void __init assabet_init(void)
sa11x0_register_mtd(&assabet_flash_data, assabet_flash_resources,
ARRAY_SIZE(assabet_flash_resources));
sa11x0_register_irda(&assabet_irda_data);
/*
* Setup the PPC unit correctly.
*/
PPDR &= ~PPC_RXD4;
PPDR |= PPC_TXD4 | PPC_SCLK | PPC_SFRM;
PSDR |= PPC_RXD4;
PSDR &= ~(PPC_TXD4 | PPC_SCLK | PPC_SFRM);
PPSR &= ~(PPC_TXD4 | PPC_SCLK | PPC_SFRM);
ASSABET_BCR_set(ASSABET_BCR_CODEC_RST);
sa11x0_register_mcp(&assabet_mcp_data);
}

11
arch/arm/mach-sa1100/cerf.c
View file

@ -124,23 +124,12 @@ static void __init cerf_map_io(void)
static struct mcp_plat_data cerf_mcp_data = {
.mccr0 = MCCR0_ADM,
.sclk_rate = 11981000,
.codec = "ucb1x00",
};
static void __init cerf_init(void)
{
platform_add_devices(cerf_devices, ARRAY_SIZE(cerf_devices));
sa11x0_register_mtd(&cerf_flash_data, &cerf_flash_resource, 1);
/*
* Setup the PPC unit correctly.
*/
PPDR &= ~PPC_RXD4;
PPDR |= PPC_TXD4 | PPC_SCLK | PPC_SFRM;
PSDR |= PPC_RXD4;
PSDR &= ~(PPC_TXD4 | PPC_SCLK | PPC_SFRM);
PPSR &= ~(PPC_TXD4 | PPC_SCLK | PPC_SFRM);
sa11x0_register_mcp(&cerf_mcp_data);
}

91
arch/arm/mach-sa1100/clock.c
View file

@ -11,39 +11,17 @@
#include <linux/clk.h>
#include <linux/spinlock.h>
#include <linux/mutex.h>
#include <linux/io.h>
#include <linux/clkdev.h>
#include <mach/hardware.h>
struct clkops {
void (*enable)(struct clk *);
void (*disable)(struct clk *);
unsigned long (*getrate)(struct clk *);
};
/*
* Very simple clock implementation - we only have one clock to deal with.
*/
struct clk {
const struct clkops *ops;
unsigned long rate;
unsigned int enabled;
};
#define INIT_CLKREG(_clk, _devname, _conname) \
{ \
.clk = _clk, \
.dev_id = _devname, \
.con_id = _conname, \
}
#define DEFINE_CLK(_name, _ops, _rate) \
struct clk clk_##_name = { \
.ops = _ops, \
.rate = _rate, \
}
static DEFINE_SPINLOCK(clocks_lock);
static void clk_gpio27_enable(struct clk *clk)
static void clk_gpio27_enable(void)
{
/*
* First, set up the 3.6864MHz clock on GPIO 27 for the SA-1111:
@ -54,22 +32,38 @@ static void clk_gpio27_enable(struct clk *clk)
TUCR = TUCR_3_6864MHz;
}
static void clk_gpio27_disable(struct clk *clk)
static void clk_gpio27_disable(void)
{
TUCR = 0;
GPDR &= ~GPIO_32_768kHz;
GAFR &= ~GPIO_32_768kHz;
}
static struct clk clk_gpio27;
static DEFINE_SPINLOCK(clocks_lock);
struct clk *clk_get(struct device *dev, const char *id)
{
const char *devname = dev_name(dev);
return strcmp(devname, "sa1111.0") ? ERR_PTR(-ENOENT) : &clk_gpio27;
}
EXPORT_SYMBOL(clk_get);
void clk_put(struct clk *clk)
{
}
EXPORT_SYMBOL(clk_put);
int clk_enable(struct clk *clk)
{
unsigned long flags;
spin_lock_irqsave(&clocks_lock, flags);
if (clk->enabled++ == 0)
clk->ops->enable(clk);
clk_gpio27_enable();
spin_unlock_irqrestore(&clocks_lock, flags);
return 0;
}
EXPORT_SYMBOL(clk_enable);
@ -82,48 +76,13 @@ void clk_disable(struct clk *clk)
spin_lock_irqsave(&clocks_lock, flags);
if (--clk->enabled == 0)
clk->ops->disable(clk);
clk_gpio27_disable();
spin_unlock_irqrestore(&clocks_lock, flags);
}
EXPORT_SYMBOL(clk_disable);
unsigned long clk_get_rate(struct clk *clk)
{
unsigned long rate;
rate = clk->rate;
if (clk->ops->getrate)
rate = clk->ops->getrate(clk);
return rate;
return 3686400;
}
EXPORT_SYMBOL(clk_get_rate);
const struct clkops clk_gpio27_ops = {
.enable = clk_gpio27_enable,
.disable = clk_gpio27_disable,
};
static void clk_dummy_enable(struct clk *clk) { }
static void clk_dummy_disable(struct clk *clk) { }
const struct clkops clk_dummy_ops = {
.enable = clk_dummy_enable,
.disable = clk_dummy_disable,
};
static DEFINE_CLK(gpio27, &clk_gpio27_ops, 3686400);
static DEFINE_CLK(dummy, &clk_dummy_ops, 0);
static struct clk_lookup sa11xx_clkregs[] = {
INIT_CLKREG(&clk_gpio27, "sa1111.0", NULL),
INIT_CLKREG(&clk_dummy, "sa1100-rtc", NULL),
};
static int __init sa11xx_clk_init(void)
{
clkdev_add_table(sa11xx_clkregs, ARRAY_SIZE(sa11xx_clkregs));
return 0;
}
postcore_initcall(sa11xx_clk_init);

23
arch/arm/mach-sa1100/collie.c
View file

@ -27,7 +27,6 @@
#include <linux/timer.h>
#include <linux/gpio.h>
#include <linux/pda_power.h>
#include <linux/mfd/ucb1x00.h>
#include <mach/hardware.h>
#include <asm/mach-types.h>
@ -86,15 +85,10 @@ static struct scoop_pcmcia_config collie_pcmcia_config = {
.num_devs = 1,
};
static struct ucb1x00_plat_data collie_ucb1x00_data = {
.gpio_base = COLLIE_TC35143_GPIO_BASE,
};
static struct mcp_plat_data collie_mcp_data = {
.mccr0 = MCCR0_ADM | MCCR0_ExtClk,
.sclk_rate = 9216000,
.codec = "ucb1x00",
.codec_pdata = &collie_ucb1x00_data,
.gpio_base = COLLIE_TC35143_GPIO_BASE,
};
/*
@ -144,8 +138,6 @@ static struct pda_power_pdata collie_power_data = {
static struct resource collie_power_resource[] = {
{
.name = "ac",
.start = gpio_to_irq(COLLIE_GPIO_AC_IN),
.end = gpio_to_irq(COLLIE_GPIO_AC_IN),
.flags = IORESOURCE_IRQ |
IORESOURCE_IRQ_HIGHEDGE |
IORESOURCE_IRQ_LOWEDGE,
@ -347,7 +339,8 @@ static void __init collie_init(void)
GPSR |= _COLLIE_GPIO_UCB1x00_RESET;
collie_power_resource[0].start = gpio_to_irq(COLLIE_GPIO_AC_IN);
collie_power_resource[0].end = gpio_to_irq(COLLIE_GPIO_AC_IN);
platform_scoop_config = &collie_pcmcia_config;
ret = platform_add_devices(devices, ARRAY_SIZE(devices));
@ -357,16 +350,6 @@ static void __init collie_init(void)
sa11x0_register_mtd(&collie_flash_data, collie_flash_resources,
ARRAY_SIZE(collie_flash_resources));
/*
* Setup the PPC unit correctly.
*/
PPDR &= ~PPC_RXD4;
PPDR |= PPC_TXD4 | PPC_SCLK | PPC_SFRM;
PSDR |= PPC_RXD4;
PSDR &= ~(PPC_TXD4 | PPC_SCLK | PPC_SFRM);
PPSR &= ~(PPC_TXD4 | PPC_SCLK | PPC_SFRM);
sa11x0_register_mcp(&collie_mcp_data);
sharpsl_save_param();

2
arch/arm/mach-sa1100/cpu-sa1100.c
View file

@ -228,7 +228,7 @@ static int __init sa1100_cpu_init(struct cpufreq_policy *policy)
return 0;
}
static struct cpufreq_driver sa1100_driver = {
static struct cpufreq_driver sa1100_driver __refdata = {
.flags = CPUFREQ_STICKY,
.verify = sa11x0_verify_speed,
.target = sa1100_target,

27
arch/arm/mach-sa1100/generic.c
View file

@ -217,15 +217,10 @@ static struct platform_device sa11x0uart3_device = {
static struct resource sa11x0mcp_resources[] = {
[0] = {
.start = __PREG(Ser4MCCR0),
.end = __PREG(Ser4MCCR0) + 0x1C - 1,
.end = __PREG(Ser4MCCR0) + 0xffff,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = __PREG(Ser4MCCR1),
.end = __PREG(Ser4MCCR1) + 0x4 - 1,
.flags = IORESOURCE_MEM,
},
[2] = {
.start = IRQ_Ser4MCP,
.end = IRQ_Ser4MCP,
.flags = IORESOURCE_IRQ,
@ -350,29 +345,9 @@ void sa11x0_register_irda(struct irda_platform_data *irda)
sa11x0_register_device(&sa11x0ir_device, irda);
}
static struct resource sa11x0rtc_resources[] = {
[0] = {
.start = 0x90010000,
.end = 0x900100ff,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = IRQ_RTC1Hz,
.end = IRQ_RTC1Hz,
.flags = IORESOURCE_IRQ,
},
[2] = {
.start = IRQ_RTCAlrm,
.end = IRQ_RTCAlrm,
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device sa11x0rtc_device = {
.name = "sa1100-rtc",
.id = -1,
.resource = sa11x0rtc_resources,
.num_resources = ARRAY_SIZE(sa11x0rtc_resources),
};
static struct platform_device *sa11x0_devices[] __initdata = {

2
arch/arm/mach-sa1100/include/mach/mcp.h
View file

@ -17,8 +17,6 @@ struct mcp_plat_data {
u32 mccr1;
unsigned int sclk_rate;
int gpio_base;
const char *codec;
void *codec_pdata;
};
#endif

2
arch/arm/mach-sa1100/jornada720_ssp.c
View file

@ -198,3 +198,5 @@ static int __init jornada_ssp_init(void)
{
return platform_driver_register(&jornadassp_driver);
}
module_init(jornada_ssp_init);

10
arch/arm/mach-sa1100/lart.c
View file

@ -24,20 +24,10 @@
static struct mcp_plat_data lart_mcp_data = {
.mccr0 = MCCR0_ADM,
.sclk_rate = 11981000,
.codec = "ucb1x00",
};
static void __init lart_init(void)
{
/*
* Setup the PPC unit correctly.
*/
PPDR &= ~PPC_RXD4;
PPDR |= PPC_TXD4 | PPC_SCLK | PPC_SFRM;
PSDR |= PPC_RXD4;
PSDR &= ~(PPC_TXD4 | PPC_SCLK | PPC_SFRM);
PPSR &= ~(PPC_TXD4 | PPC_SCLK | PPC_SFRM);
sa11x0_register_mcp(&lart_mcp_data);
}

11
arch/arm/mach-sa1100/shannon.c
View file

@ -55,22 +55,11 @@ static struct resource shannon_flash_resource = {
static struct mcp_plat_data shannon_mcp_data = {
.mccr0 = MCCR0_ADM,
.sclk_rate = 11981000,
.codec = "ucb1x00",
};
static void __init shannon_init(void)
{
sa11x0_register_mtd(&shannon_flash_data, &shannon_flash_resource, 1);
/*
* Setup the PPC unit correctly.
*/
PPDR &= ~PPC_RXD4;
PPDR |= PPC_TXD4 | PPC_SCLK | PPC_SFRM;
PSDR |= PPC_RXD4;
PSDR &= ~(PPC_TXD4 | PPC_SCLK | PPC_SFRM);
PPSR &= ~(PPC_TXD4 | PPC_SCLK | PPC_SFRM);
sa11x0_register_mcp(&shannon_mcp_data);
}

18
arch/arm/mach-sa1100/simpad.c
View file

@ -14,7 +14,6 @@
#include <linux/mtd/partitions.h>
#include <linux/io.h>
#include <linux/gpio.h>
#include <linux/mfd/ucb1x00.h>
#include <asm/irq.h>
#include <mach/hardware.h>
@ -188,15 +187,10 @@ static struct resource simpad_flash_resources [] = {
}
};
static struct ucb1x00_plat_data simpad_ucb1x00_data = {
.gpio_base = SIMPAD_UCB1X00_GPIO_BASE,
};
static struct mcp_plat_data simpad_mcp_data = {
.mccr0 = MCCR0_ADM,
.sclk_rate = 11981000,
.codec = "ucb1300",
.codec_pdata = &simpad_ucb1x00_data,
.gpio_base = SIMPAD_UCB1X00_GPIO_BASE,
};
@ -384,16 +378,6 @@ static int __init simpad_init(void)
sa11x0_register_mtd(&simpad_flash_data, simpad_flash_resources,
ARRAY_SIZE(simpad_flash_resources));
/*
* Setup the PPC unit correctly.
*/
PPDR &= ~PPC_RXD4;
PPDR |= PPC_TXD4 | PPC_SCLK | PPC_SFRM;
PSDR |= PPC_RXD4;
PSDR &= ~(PPC_TXD4 | PPC_SCLK | PPC_SFRM);
PPSR &= ~(PPC_TXD4 | PPC_SCLK | PPC_SFRM);
sa11x0_register_mcp(&simpad_mcp_data);
ret = platform_add_devices(devices, ARRAY_SIZE(devices));

1
arch/arm/mach-shmobile/smp-r8a7779.c
View file

@ -25,6 +25,7 @@
#include <linux/delay.h>
#include <mach/common.h>
#include <mach/r8a7779.h>
#include <asm/smp_plat.h>
#include <asm/smp_scu.h>
#include <asm/smp_twd.h>
#include <asm/hardware/gic.h>

1
arch/arm/mach-shmobile/smp-sh73a0.c
View file

@ -23,6 +23,7 @@
#include <linux/spinlock.h>
#include <linux/io.h>
#include <mach/common.h>
#include <asm/smp_plat.h>
#include <asm/smp_scu.h>
#include <asm/smp_twd.h>
#include <asm/hardware/gic.h>

1
arch/arm/mach-ux500/hotplug.c
View file

@ -13,6 +13,7 @@
#include <linux/smp.h>
#include <asm/cacheflush.h>
#include <asm/smp_plat.h>
extern volatile int pen_release;

1
arch/arm/mach-ux500/platsmp.c
View file

@ -19,6 +19,7 @@
#include <asm/cacheflush.h>
#include <asm/hardware/gic.h>
#include <asm/smp_plat.h>
#include <asm/smp_scu.h>
#include <mach/hardware.h>
#include <mach/setup.h>

4
arch/arm/mach-vexpress/ct-ca9x4.c
View file

@ -217,7 +217,7 @@ static void __init ct_ca9x4_init(void)
}
#ifdef CONFIG_SMP
static void ct_ca9x4_init_cpu_map(void)
static void __init ct_ca9x4_init_cpu_map(void)
{
int i, ncores = scu_get_core_count(MMIO_P2V(A9_MPCORE_SCU));
@ -233,7 +233,7 @@ static void ct_ca9x4_init_cpu_map(void)
set_smp_cross_call(gic_raise_softirq);
}
static void ct_ca9x4_smp_enable(unsigned int max_cpus)
static void __init ct_ca9x4_smp_enable(unsigned int max_cpus)
{
scu_enable(MMIO_P2V(A9_MPCORE_SCU));
}

1
arch/arm/mach-vexpress/hotplug.c
View file

@ -13,6 +13,7 @@
#include <linux/smp.h>
#include <asm/cacheflush.h>
#include <asm/smp_plat.h>
#include <asm/system.h>
extern volatile int pen_release;

1
arch/arm/mm/Kconfig
View file

@ -882,6 +882,7 @@ config CACHE_XSC3L2
config ARM_L1_CACHE_SHIFT_6
bool
default y if CPU_V7
help
Setting ARM L1 cache line size to 64 Bytes.

2
arch/arm/mm/init.c
View file

@ -310,7 +310,7 @@ static void arm_memory_present(void)
static bool arm_memblock_steal_permitted = true;
phys_addr_t arm_memblock_steal(phys_addr_t size, phys_addr_t align)
phys_addr_t __init arm_memblock_steal(phys_addr_t size, phys_addr_t align)
{
phys_addr_t phys;

3
arch/arm/mm/ioremap.c
View file

@ -225,7 +225,8 @@ void __iomem * __arm_ioremap_pfn_caller(unsigned long pfn,
if ((area->flags & VM_ARM_MTYPE_MASK) != VM_ARM_MTYPE(mtype))
continue;
if (__phys_to_pfn(area->phys_addr) > pfn ||
__pfn_to_phys(pfn) + size-1 > area->phys_addr + area->size-1)
__pfn_to_phys(pfn) + offset + size-1 >
area->phys_addr + area->size-1)
continue;
/* we can drop the lock here as we know *area is static */
read_unlock(&vmlist_lock);

26
arch/arm/mm/proc-v7.S
View file

@ -148,10 +148,6 @@ ENDPROC(cpu_v7_do_resume)
* Initialise TLB, Caches, and MMU state ready to switch the MMU
* on. Return in r0 the new CP15 C1 control register setting.
*
* We automatically detect if we have a Harvard cache, and use the
* Harvard cache control instructions insead of the unified cache
* control instructions.
*
* This should be able to cover all ARMv7 cores.
*
* It is assumed that:
@ -251,9 +247,7 @@ __v7_setup:
#endif
3: mov r10, #0
#ifdef HARVARD_CACHE
mcr p15, 0, r10, c7, c5, 0 @ I+BTB cache invalidate
#endif
dsb
#ifdef CONFIG_MMU
mcr p15, 0, r10, c8, c7, 0 @ invalidate I + D TLBs
@ -329,16 +323,6 @@ __v7_ca5mp_proc_info:
__v7_proc __v7_ca5mp_setup
.size __v7_ca5mp_proc_info, . - __v7_ca5mp_proc_info
/*
* ARM Ltd. Cortex A7 processor.
*/
.type __v7_ca7mp_proc_info, #object
__v7_ca7mp_proc_info:
.long 0x410fc070
.long 0xff0ffff0
__v7_proc __v7_ca7mp_setup, hwcaps = HWCAP_IDIV
.size __v7_ca7mp_proc_info, . - __v7_ca7mp_proc_info
/*
* ARM Ltd. Cortex A9 processor.
*/
@ -350,6 +334,16 @@ __v7_ca9mp_proc_info:
.size __v7_ca9mp_proc_info, . - __v7_ca9mp_proc_info
#endif /* CONFIG_ARM_LPAE */
/*
* ARM Ltd. Cortex A7 processor.
*/
.type __v7_ca7mp_proc_info, #object
__v7_ca7mp_proc_info:
.long 0x410fc070
.long 0xff0ffff0
__v7_proc __v7_ca7mp_setup, hwcaps = HWCAP_IDIV
.size __v7_ca7mp_proc_info, . - __v7_ca7mp_proc_info
/*
* ARM Ltd. Cortex A15 processor.
*/

1
arch/arm/plat-versatile/platsmp.c
View file

@ -16,6 +16,7 @@
#include <linux/smp.h>
#include <asm/cacheflush.h>
#include <asm/smp_plat.h>
#include <asm/hardware/gic.h>
/*

61
drivers/mfd/mcp-core.c
View file

@ -26,35 +26,9 @@
#define to_mcp(d) container_of(d, struct mcp, attached_device)
#define to_mcp_driver(d) container_of(d, struct mcp_driver, drv)
static const struct mcp_device_id *mcp_match_id(const struct mcp_device_id *id,
const char *codec)
{
while (id->name[0]) {
if (strcmp(codec, id->name) == 0)
return id;
id++;
}
return NULL;
}
const struct mcp_device_id *mcp_get_device_id(const struct mcp *mcp)
{
const struct mcp_driver *driver =
to_mcp_driver(mcp->attached_device.driver);
return mcp_match_id(driver->id_table, mcp->codec);
}
EXPORT_SYMBOL(mcp_get_device_id);
static int mcp_bus_match(struct device *dev, struct device_driver *drv)
{
const struct mcp *mcp = to_mcp(dev);
const struct mcp_driver *driver = to_mcp_driver(drv);
if (driver->id_table)
return !!mcp_match_id(driver->id_table, mcp->codec);
return 0;
return 1;
}
static int mcp_bus_probe(struct device *dev)
@ -100,18 +74,9 @@ static int mcp_bus_resume(struct device *dev)
return ret;
}
static int mcp_bus_uevent(struct device *dev, struct kobj_uevent_env *env)
{
struct mcp *mcp = to_mcp(dev);
add_uevent_var(env, "MODALIAS=%s%s", MCP_MODULE_PREFIX, mcp->codec);
return 0;
}
static struct bus_type mcp_bus_type = {
.name = "mcp",
.match = mcp_bus_match,
.uevent = mcp_bus_uevent,
.probe = mcp_bus_probe,
.remove = mcp_bus_remove,
.suspend = mcp_bus_suspend,
@ -128,9 +93,11 @@ static struct bus_type mcp_bus_type = {
*/
void mcp_set_telecom_divisor(struct mcp *mcp, unsigned int div)
{
spin_lock_irq(&mcp->lock);
unsigned long flags;
spin_lock_irqsave(&mcp->lock, flags);
mcp->ops->set_telecom_divisor(mcp, div);
spin_unlock_irq(&mcp->lock);
spin_unlock_irqrestore(&mcp->lock, flags);
}
EXPORT_SYMBOL(mcp_set_telecom_divisor);
@ -143,9 +110,11 @@ EXPORT_SYMBOL(mcp_set_telecom_divisor);
*/
void mcp_set_audio_divisor(struct mcp *mcp, unsigned int div)
{
spin_lock_irq(&mcp->lock);
unsigned long flags;
spin_lock_irqsave(&mcp->lock, flags);
mcp->ops->set_audio_divisor(mcp, div);
spin_unlock_irq(&mcp->lock);
spin_unlock_irqrestore(&mcp->lock, flags);
}
EXPORT_SYMBOL(mcp_set_audio_divisor);
@ -198,10 +167,11 @@ EXPORT_SYMBOL(mcp_reg_read);
*/
void mcp_enable(struct mcp *mcp)
{
spin_lock_irq(&mcp->lock);
unsigned long flags;
spin_lock_irqsave(&mcp->lock, flags);
if (mcp->use_count++ == 0)
mcp->ops->enable(mcp);
spin_unlock_irq(&mcp->lock);
spin_unlock_irqrestore(&mcp->lock, flags);
}
EXPORT_SYMBOL(mcp_enable);
@ -247,14 +217,9 @@ struct mcp *mcp_host_alloc(struct device *parent, size_t size)
}
EXPORT_SYMBOL(mcp_host_alloc);
int mcp_host_register(struct mcp *mcp, void *pdata)
int mcp_host_register(struct mcp *mcp)
{
if (!mcp->codec)
return -EINVAL;
mcp->attached_device.platform_data = pdata;
dev_set_name(&mcp->attached_device, "mcp0");
request_module("%s%s", MCP_MODULE_PREFIX, mcp->codec);
return device_register(&mcp->attached_device);
}
EXPORT_SYMBOL(mcp_host_register);

169
drivers/mfd/mcp-sa11x0.c
View file

@ -19,7 +19,6 @@
#include <linux/spinlock.h>
#include <linux/platform_device.h>
#include <linux/mfd/mcp.h>
#include <linux/io.h>
#include <mach/dma.h>
#include <mach/hardware.h>
@ -27,19 +26,12 @@
#include <asm/system.h>
#include <mach/mcp.h>
/* Register offsets */
#define MCCR0 0x00
#define MCDR0 0x08
#define MCDR1 0x0C
#define MCDR2 0x10
#define MCSR 0x18
#define MCCR1 0x00
#include <mach/assabet.h>
struct mcp_sa11x0 {
u32 mccr0;
u32 mccr1;
unsigned char *mccr0_base;
unsigned char *mccr1_base;
u32 mccr0;
u32 mccr1;
};
#define priv(mcp) ((struct mcp_sa11x0 *)mcp_priv(mcp))
@ -47,25 +39,25 @@ struct mcp_sa11x0 {
static void
mcp_sa11x0_set_telecom_divisor(struct mcp *mcp, unsigned int divisor)
{
struct mcp_sa11x0 *priv = priv(mcp);
unsigned int mccr0;
divisor /= 32;
priv->mccr0 &= ~0x00007f00;
priv->mccr0 |= divisor << 8;
__raw_writel(priv->mccr0, priv->mccr0_base + MCCR0);
mccr0 = Ser4MCCR0 & ~0x00007f00;
mccr0 |= divisor << 8;
Ser4MCCR0 = mccr0;
}
static void
mcp_sa11x0_set_audio_divisor(struct mcp *mcp, unsigned int divisor)
{
struct mcp_sa11x0 *priv = priv(mcp);
unsigned int mccr0;
divisor /= 32;
priv->mccr0 &= ~0x0000007f;
priv->mccr0 |= divisor;
__raw_writel(priv->mccr0, priv->mccr0_base + MCCR0);
mccr0 = Ser4MCCR0 & ~0x0000007f;
mccr0 |= divisor;
Ser4MCCR0 = mccr0;
}
/*
@ -79,16 +71,12 @@ mcp_sa11x0_write(struct mcp *mcp, unsigned int reg, unsigned int val)
{
int ret = -ETIME;
int i;
u32 mcpreg;
struct mcp_sa11x0 *priv = priv(mcp);
mcpreg = reg << 17 | MCDR2_Wr | (val & 0xffff);
__raw_writel(mcpreg, priv->mccr0_base + MCDR2);
Ser4MCDR2 = reg << 17 | MCDR2_Wr | (val & 0xffff);
for (i = 0; i < 2; i++) {
udelay(mcp->rw_timeout);
mcpreg = __raw_readl(priv->mccr0_base + MCSR);
if (mcpreg & MCSR_CWC) {
if (Ser4MCSR & MCSR_CWC) {
ret = 0;
break;
}
@ -109,18 +97,13 @@ mcp_sa11x0_read(struct mcp *mcp, unsigned int reg)
{
int ret = -ETIME;
int i;
u32 mcpreg;
struct mcp_sa11x0 *priv = priv(mcp);
mcpreg = reg << 17 | MCDR2_Rd;
__raw_writel(mcpreg, priv->mccr0_base + MCDR2);
Ser4MCDR2 = reg << 17 | MCDR2_Rd;
for (i = 0; i < 2; i++) {
udelay(mcp->rw_timeout);
mcpreg = __raw_readl(priv->mccr0_base + MCSR);
if (mcpreg & MCSR_CRC) {
ret = __raw_readl(priv->mccr0_base + MCDR2)
& 0xffff;
if (Ser4MCSR & MCSR_CRC) {
ret = Ser4MCDR2 & 0xffff;
break;
}
}
@ -133,19 +116,13 @@ mcp_sa11x0_read(struct mcp *mcp, unsigned int reg)
static void mcp_sa11x0_enable(struct mcp *mcp)
{
struct mcp_sa11x0 *priv = priv(mcp);
__raw_writel(-1, priv->mccr0_base + MCSR);
priv->mccr0 |= MCCR0_MCE;
__raw_writel(priv->mccr0, priv->mccr0_base + MCCR0);
Ser4MCSR = -1;
Ser4MCCR0 |= MCCR0_MCE;
}
static void mcp_sa11x0_disable(struct mcp *mcp)
{
struct mcp_sa11x0 *priv = priv(mcp);
priv->mccr0 &= ~MCCR0_MCE;
__raw_writel(priv->mccr0, priv->mccr0_base + MCCR0);
Ser4MCCR0 &= ~MCCR0_MCE;
}
/*
@ -165,69 +142,50 @@ static int mcp_sa11x0_probe(struct platform_device *pdev)
struct mcp_plat_data *data = pdev->dev.platform_data;
struct mcp *mcp;
int ret;
struct mcp_sa11x0 *priv;
struct resource *res_mem0, *res_mem1;
u32 size0, size1;
if (!data)
return -ENODEV;
if (!data->codec)
return -ENODEV;
res_mem0 = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (!res_mem0)
return -ENODEV;
size0 = res_mem0->end - res_mem0->start + 1;
res_mem1 = platform_get_resource(pdev, IORESOURCE_MEM, 1);
if (!res_mem1)
return -ENODEV;
size1 = res_mem1->end - res_mem1->start + 1;
if (!request_mem_region(res_mem0->start, size0, "sa11x0-mcp"))
if (!request_mem_region(0x80060000, 0x60, "sa11x0-mcp"))
return -EBUSY;
if (!request_mem_region(res_mem1->start, size1, "sa11x0-mcp")) {
ret = -EBUSY;
goto release;
}
mcp = mcp_host_alloc(&pdev->dev, sizeof(struct mcp_sa11x0));
if (!mcp) {
ret = -ENOMEM;
goto release2;
goto release;
}
priv = priv(mcp);
mcp->owner = THIS_MODULE;
mcp->ops = &mcp_sa11x0;
mcp->sclk_rate = data->sclk_rate;
mcp->dma_audio_rd = DDAR_DevAdd(res_mem0->start + MCDR0)
+ DDAR_DevRd + DDAR_Brst4 + DDAR_8BitDev;
mcp->dma_audio_wr = DDAR_DevAdd(res_mem0->start + MCDR0)
+ DDAR_DevWr + DDAR_Brst4 + DDAR_8BitDev;
mcp->dma_telco_rd = DDAR_DevAdd(res_mem0->start + MCDR1)
+ DDAR_DevRd + DDAR_Brst4 + DDAR_8BitDev;
mcp->dma_telco_wr = DDAR_DevAdd(res_mem0->start + MCDR1)
+ DDAR_DevWr + DDAR_Brst4 + DDAR_8BitDev;
mcp->codec = data->codec;
mcp->dma_audio_rd = DMA_Ser4MCP0Rd;
mcp->dma_audio_wr = DMA_Ser4MCP0Wr;
mcp->dma_telco_rd = DMA_Ser4MCP1Rd;
mcp->dma_telco_wr = DMA_Ser4MCP1Wr;
mcp->gpio_base = data->gpio_base;
platform_set_drvdata(pdev, mcp);
if (machine_is_assabet()) {
ASSABET_BCR_set(ASSABET_BCR_CODEC_RST);
}
/*
* Setup the PPC unit correctly.
*/
PPDR &= ~PPC_RXD4;
PPDR |= PPC_TXD4 | PPC_SCLK | PPC_SFRM;
PSDR |= PPC_RXD4;
PSDR &= ~(PPC_TXD4 | PPC_SCLK | PPC_SFRM);
PPSR &= ~(PPC_TXD4 | PPC_SCLK | PPC_SFRM);
/*
* Initialise device. Note that we initially
* set the sampling rate to minimum.
*/
priv->mccr0_base = ioremap(res_mem0->start, size0);
priv->mccr1_base = ioremap(res_mem1->start, size1);
__raw_writel(-1, priv->mccr0_base + MCSR);
priv->mccr1 = data->mccr1;
priv->mccr0 = data->mccr0 | 0x7f7f;
__raw_writel(priv->mccr0, priv->mccr0_base + MCCR0);
__raw_writel(priv->mccr1, priv->mccr1_base + MCCR1);
Ser4MCSR = -1;
Ser4MCCR1 = data->mccr1;
Ser4MCCR0 = data->mccr0 | 0x7f7f;
/*
* Calculate the read/write timeout (us) from the bit clock
@ -237,53 +195,36 @@ static int mcp_sa11x0_probe(struct platform_device *pdev)
mcp->rw_timeout = (64 * 3 * 1000000 + mcp->sclk_rate - 1) /
mcp->sclk_rate;
ret = mcp_host_register(mcp, data->codec_pdata);
ret = mcp_host_register(mcp);
if (ret == 0)
goto out;
release2:
release_mem_region(res_mem1->start, size1);
release:
release_mem_region(res_mem0->start, size0);
release_mem_region(0x80060000, 0x60);
platform_set_drvdata(pdev, NULL);
out:
return ret;
}
static int mcp_sa11x0_remove(struct platform_device *pdev)
static int mcp_sa11x0_remove(struct platform_device *dev)
{
struct mcp *mcp = platform_get_drvdata(pdev);
struct mcp_sa11x0 *priv = priv(mcp);
struct resource *res_mem;
u32 size;
struct mcp *mcp = platform_get_drvdata(dev);
platform_set_drvdata(pdev, NULL);
platform_set_drvdata(dev, NULL);
mcp_host_unregister(mcp);
release_mem_region(0x80060000, 0x60);
res_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (res_mem) {
size = res_mem->end - res_mem->start + 1;
release_mem_region(res_mem->start, size);
}
res_mem = platform_get_resource(pdev, IORESOURCE_MEM, 1);
if (res_mem) {
size = res_mem->end - res_mem->start + 1;
release_mem_region(res_mem->start, size);
}
iounmap(priv->mccr0_base);
iounmap(priv->mccr1_base);
return 0;
}
static int mcp_sa11x0_suspend(struct platform_device *dev, pm_message_t state)
{
struct mcp *mcp = platform_get_drvdata(dev);
struct mcp_sa11x0 *priv = priv(mcp);
u32 mccr0;
mccr0 = priv->mccr0 & ~MCCR0_MCE;
__raw_writel(mccr0, priv->mccr0_base + MCCR0);
priv(mcp)->mccr0 = Ser4MCCR0;
priv(mcp)->mccr1 = Ser4MCCR1;
Ser4MCCR0 &= ~MCCR0_MCE;
return 0;
}
@ -291,10 +232,9 @@ static int mcp_sa11x0_suspend(struct platform_device *dev, pm_message_t state)
static int mcp_sa11x0_resume(struct platform_device *dev)
{
struct mcp *mcp = platform_get_drvdata(dev);
struct mcp_sa11x0 *priv = priv(mcp);
__raw_writel(priv->mccr0, priv->mccr0_base + MCCR0);
__raw_writel(priv->mccr1, priv->mccr1_base + MCCR1);
Ser4MCCR1 = priv(mcp)->mccr1;
Ser4MCCR0 = priv(mcp)->mccr0;
return 0;
}
@ -311,7 +251,6 @@ static struct platform_driver mcp_sa11x0_driver = {
.resume = mcp_sa11x0_resume,
.driver = {
.name = "sa11x0-mcp",
.owner = THIS_MODULE,
},
};

67
drivers/mfd/ucb1x00-core.c
View file

@ -36,15 +36,6 @@ static DEFINE_MUTEX(ucb1x00_mutex);
static LIST_HEAD(ucb1x00_drivers);
static LIST_HEAD(ucb1x00_devices);
static struct mcp_device_id ucb1x00_id[] = {
{ "ucb1x00", 0 }, /* auto-detection */
{ "ucb1200", UCB_ID_1200 },
{ "ucb1300", UCB_ID_1300 },
{ "tc35143", UCB_ID_TC35143 },
{ }
};
MODULE_DEVICE_TABLE(mcp, ucb1x00_id);
/**
* ucb1x00_io_set_dir - set IO direction
* @ucb: UCB1x00 structure describing chip
@ -157,16 +148,22 @@ static int ucb1x00_gpio_direction_output(struct gpio_chip *chip, unsigned offset
{
struct ucb1x00 *ucb = container_of(chip, struct ucb1x00, gpio);
unsigned long flags;
unsigned old, mask = 1 << offset;
spin_lock_irqsave(&ucb->io_lock, flags);
ucb->io_dir |= (1 << offset);
ucb1x00_reg_write(ucb, UCB_IO_DIR, ucb->io_dir);
old = ucb->io_out;
if (value)
ucb->io_out |= 1 << offset;
ucb->io_out |= mask;
else
ucb->io_out &= ~(1 << offset);
ucb1x00_reg_write(ucb, UCB_IO_DATA, ucb->io_out);
ucb->io_out &= ~mask;
if (old != ucb->io_out)
ucb1x00_reg_write(ucb, UCB_IO_DATA, ucb->io_out);
if (!(ucb->io_dir & mask)) {
ucb->io_dir |= mask;
ucb1x00_reg_write(ucb, UCB_IO_DIR, ucb->io_dir);
}
spin_unlock_irqrestore(&ucb->io_lock, flags);
return 0;
@ -536,33 +533,17 @@ static struct class ucb1x00_class = {
static int ucb1x00_probe(struct mcp *mcp)
{
const struct mcp_device_id *mid;
struct ucb1x00 *ucb;
struct ucb1x00_driver *drv;
struct ucb1x00_plat_data *pdata;
unsigned int id;
int ret = -ENODEV;
int temp;
mcp_enable(mcp);
id = mcp_reg_read(mcp, UCB_ID);
mid = mcp_get_device_id(mcp);
if (mid && mid->driver_data) {
if (id != mid->driver_data) {
printk(KERN_WARNING "%s wrong ID %04x found: %04x\n",
mid->name, (unsigned int) mid->driver_data, id);
goto err_disable;
}
} else {
mid = &ucb1x00_id[1];
while (mid->driver_data) {
if (id == mid->driver_data)
break;
mid++;
}
printk(KERN_WARNING "%s ID not found: %04x\n",
ucb1x00_id[0].name, id);
if (id != UCB_ID_1200 && id != UCB_ID_1300 && id != UCB_ID_TC35143) {
printk(KERN_WARNING "UCB1x00 ID not found: %04x\n", id);
goto err_disable;
}
@ -571,28 +552,28 @@ static int ucb1x00_probe(struct mcp *mcp)
if (!ucb)
goto err_disable;
pdata = mcp->attached_device.platform_data;
ucb->dev.class = &ucb1x00_class;
ucb->dev.parent = &mcp->attached_device;
dev_set_name(&ucb->dev, mid->name);
dev_set_name(&ucb->dev, "ucb1x00");
spin_lock_init(&ucb->lock);
spin_lock_init(&ucb->io_lock);
sema_init(&ucb->adc_sem, 1);
ucb->id = mid;
ucb->id = id;
ucb->mcp = mcp;
ucb->irq = ucb1x00_detect_irq(ucb);
if (ucb->irq == NO_IRQ) {
printk(KERN_ERR "%s: IRQ probe failed\n", mid->name);
printk(KERN_ERR "UCB1x00: IRQ probe failed\n");
ret = -ENODEV;
goto err_free;
}
ucb->gpio.base = -1;
if (pdata && (pdata->gpio_base >= 0)) {
if (mcp->gpio_base != 0) {
ucb->gpio.label = dev_name(&ucb->dev);
ucb->gpio.base = pdata->gpio_base;
ucb->gpio.base = mcp->gpio_base;
ucb->gpio.ngpio = 10;
ucb->gpio.set = ucb1x00_gpio_set;
ucb->gpio.get = ucb1x00_gpio_get;
@ -605,10 +586,10 @@ static int ucb1x00_probe(struct mcp *mcp)
dev_info(&ucb->dev, "gpio_base not set so no gpiolib support");
ret = request_irq(ucb->irq, ucb1x00_irq, IRQF_TRIGGER_RISING,
mid->name, ucb);
"UCB1x00", ucb);
if (ret) {
printk(KERN_ERR "%s: unable to grab irq%d: %d\n",
mid->name, ucb->irq, ret);
printk(KERN_ERR "ucb1x00: unable to grab irq%d: %d\n",
ucb->irq, ret);
goto err_gpio;
}
@ -712,6 +693,7 @@ static int ucb1x00_resume(struct mcp *mcp)
struct ucb1x00 *ucb = mcp_get_drvdata(mcp);
struct ucb1x00_dev *dev;
ucb1x00_reg_write(ucb, UCB_IO_DATA, ucb->io_out);
ucb1x00_reg_write(ucb, UCB_IO_DIR, ucb->io_dir);
mutex_lock(&ucb1x00_mutex);
list_for_each_entry(dev, &ucb->devs, dev_node) {
@ -730,7 +712,6 @@ static struct mcp_driver ucb1x00_driver = {
.remove = ucb1x00_remove,
.suspend = ucb1x00_suspend,
.resume = ucb1x00_resume,
.id_table = ucb1x00_id,
};
static int __init ucb1x00_init(void)

34
drivers/mfd/ucb1x00-ts.c
View file

@ -47,7 +47,6 @@ struct ucb1x00_ts {
u16 x_res;
u16 y_res;
unsigned int restart:1;
unsigned int adcsync:1;
};
@ -207,15 +206,17 @@ static int ucb1x00_thread(void *_ts)
{
struct ucb1x00_ts *ts = _ts;
DECLARE_WAITQUEUE(wait, current);
bool frozen, ignore = false;
int valid = 0;
set_freezable();
add_wait_queue(&ts->irq_wait, &wait);
while (!kthread_should_stop()) {
while (!kthread_freezable_should_stop(&frozen)) {
unsigned int x, y, p;
signed long timeout;
ts->restart = 0;
if (frozen)
ignore = true;
ucb1x00_adc_enable(ts->ucb);
@ -258,7 +259,7 @@ static int ucb1x00_thread(void *_ts)
* space. We therefore leave it to user space
* to do any filtering they please.
*/
if (!ts->restart) {
if (!ignore) {
ucb1x00_ts_evt_add(ts, p, x, y);
valid = 1;
}
@ -267,8 +268,6 @@ static int ucb1x00_thread(void *_ts)
timeout = HZ / 100;
}
try_to_freeze();
schedule_timeout(timeout);
}
@ -340,26 +339,6 @@ static void ucb1x00_ts_close(struct input_dev *idev)
ucb1x00_disable(ts->ucb);
}
#ifdef CONFIG_PM
static int ucb1x00_ts_resume(struct ucb1x00_dev *dev)
{
struct ucb1x00_ts *ts = dev->priv;
if (ts->rtask != NULL) {
/*
* Restart the TS thread to ensure the
* TS interrupt mode is set up again
* after sleep.
*/
ts->restart = 1;
wake_up(&ts->irq_wait);
}
return 0;
}
#else
#define ucb1x00_ts_resume NULL
#endif
/*
* Initialisation.
@ -382,7 +361,7 @@ static int ucb1x00_ts_add(struct ucb1x00_dev *dev)
ts->adcsync = adcsync ? UCB_SYNC : UCB_NOSYNC;
idev->name = "Touchscreen panel";
idev->id.product = ts->ucb->id->driver_data;
idev->id.product = ts->ucb->id;
idev->open = ucb1x00_ts_open;
idev->close = ucb1x00_ts_close;
@ -425,7 +404,6 @@ static void ucb1x00_ts_remove(struct ucb1x00_dev *dev)
static struct ucb1x00_driver ucb1x00_ts_driver = {
.add = ucb1x00_ts_add,
.remove = ucb1x00_ts_remove,
.resume = ucb1x00_ts_resume,
};
static int __init ucb1x00_ts_init(void)

3
drivers/pcmcia/sa1111_generic.c
View file

@ -205,7 +205,8 @@ static int __devexit pcmcia_remove(struct sa1111_dev *dev)
dev_set_drvdata(&dev->dev, NULL);
for (; next = s->next, s; s = next) {
for (; s; s = next) {
next = s->next;
soc_pcmcia_remove_one(&s->soc);
kfree(s);
}

2
drivers/rtc/Kconfig
View file

@ -774,7 +774,7 @@ config RTC_DRV_EP93XX
config RTC_DRV_SA1100
tristate "SA11x0/PXA2xx"
depends on ARCH_SA1100 || ARCH_PXA || ARCH_MMP
depends on ARCH_SA1100 || ARCH_PXA
help
If you say Y here you will get access to the real time clock
built into your SA11x0 or PXA2xx CPU.

289
drivers/rtc/rtc-sa1100.c
View file

@ -27,42 +27,34 @@
#include <linux/init.h>
#include <linux/fs.h>
#include <linux/interrupt.h>
#include <linux/string.h>
#include <linux/pm.h>
#include <linux/slab.h>
#include <linux/clk.h>
#include <linux/io.h>
#include <linux/bitops.h>
#include <mach/hardware.h>
#include <asm/irq.h>
#ifdef CONFIG_ARCH_PXA
#include <mach/regs-rtc.h>
#endif
#define RTC_DEF_DIVIDER (32768 - 1)
#define RTC_DEF_TRIM 0
#define RTC_FREQ 1024
#define RCNR 0x00 /* RTC Count Register */
#define RTAR 0x04 /* RTC Alarm Register */
#define RTSR 0x08 /* RTC Status Register */
#define RTTR 0x0c /* RTC Timer Trim Register */
static const unsigned long RTC_FREQ = 1024;
static struct rtc_time rtc_alarm;
static DEFINE_SPINLOCK(sa1100_rtc_lock);
#define RTSR_HZE (1 << 3) /* HZ interrupt enable */
#define RTSR_ALE (1 << 2) /* RTC alarm interrupt enable */
#define RTSR_HZ (1 << 1) /* HZ rising-edge detected */
#define RTSR_AL (1 << 0) /* RTC alarm detected */
static inline int rtc_periodic_alarm(struct rtc_time *tm)
{
return (tm->tm_year == -1) ||
((unsigned)tm->tm_mon >= 12) ||
((unsigned)(tm->tm_mday - 1) >= 31) ||
((unsigned)tm->tm_hour > 23) ||
((unsigned)tm->tm_min > 59) ||
((unsigned)tm->tm_sec > 59);
}
#define rtc_readl(sa1100_rtc, reg) \
readl_relaxed((sa1100_rtc)->base + (reg))
#define rtc_writel(sa1100_rtc, reg, value) \
writel_relaxed((value), (sa1100_rtc)->base + (reg))
struct sa1100_rtc {
struct resource *ress;
void __iomem *base;
struct clk *clk;
int irq_1Hz;
int irq_Alrm;
struct rtc_device *rtc;
spinlock_t lock; /* Protects this structure */
};
/*
* Calculate the next alarm time given the requested alarm time mask
* and the current time.
@ -90,26 +82,46 @@ static void rtc_next_alarm_time(struct rtc_time *next, struct rtc_time *now,
}
}
static int rtc_update_alarm(struct rtc_time *alrm)
{
struct rtc_time alarm_tm, now_tm;
unsigned long now, time;
int ret;
do {
now = RCNR;
rtc_time_to_tm(now, &now_tm);
rtc_next_alarm_time(&alarm_tm, &now_tm, alrm);
ret = rtc_tm_to_time(&alarm_tm, &time);
if (ret != 0)
break;
RTSR = RTSR & (RTSR_HZE|RTSR_ALE|RTSR_AL);
RTAR = time;
} while (now != RCNR);
return ret;
}
static irqreturn_t sa1100_rtc_interrupt(int irq, void *dev_id)
{
struct platform_device *pdev = to_platform_device(dev_id);
struct sa1100_rtc *sa1100_rtc = platform_get_drvdata(pdev);
struct rtc_device *rtc = platform_get_drvdata(pdev);
unsigned int rtsr;
unsigned long events = 0;
spin_lock(&sa1100_rtc->lock);
spin_lock(&sa1100_rtc_lock);
rtsr = RTSR;
/* clear interrupt sources */
rtsr = rtc_readl(sa1100_rtc, RTSR);
rtc_writel(sa1100_rtc, RTSR, 0);
RTSR = 0;
/* Fix for a nasty initialization problem the in SA11xx RTSR register.
* See also the comments in sa1100_rtc_probe(). */
if (rtsr & (RTSR_ALE | RTSR_HZE)) {
/* This is the original code, before there was the if test
* above. This code does not clear interrupts that were not
* enabled. */
rtc_writel(sa1100_rtc, RTSR, (RTSR_AL | RTSR_HZ) & (rtsr >> 2));
RTSR = (RTSR_AL | RTSR_HZ) & (rtsr >> 2);
} else {
/* For some reason, it is possible to enter this routine
* without interruptions enabled, it has been tested with
@ -118,13 +130,13 @@ static irqreturn_t sa1100_rtc_interrupt(int irq, void *dev_id)
* This situation leads to an infinite "loop" of interrupt
* routine calling and as a result the processor seems to
* lock on its first call to open(). */
rtc_writel(sa1100_rtc, RTSR, (RTSR_AL | RTSR_HZ));
RTSR = RTSR_AL | RTSR_HZ;
}
/* clear alarm interrupt if it has occurred */
if (rtsr & RTSR_AL)
rtsr &= ~RTSR_ALE;
rtc_writel(sa1100_rtc, RTSR, rtsr & (RTSR_ALE | RTSR_HZE));
RTSR = rtsr & (RTSR_ALE | RTSR_HZE);
/* update irq data & counter */
if (rtsr & RTSR_AL)
@ -132,100 +144,89 @@ static irqreturn_t sa1100_rtc_interrupt(int irq, void *dev_id)
if (rtsr & RTSR_HZ)
events |= RTC_UF | RTC_IRQF;
rtc_update_irq(sa1100_rtc->rtc, 1, events);
rtc_update_irq(rtc, 1, events);
spin_unlock(&sa1100_rtc->lock);
if (rtsr & RTSR_AL && rtc_periodic_alarm(&rtc_alarm))
rtc_update_alarm(&rtc_alarm);
spin_unlock(&sa1100_rtc_lock);
return IRQ_HANDLED;
}
static int sa1100_rtc_open(struct device *dev)
{
struct sa1100_rtc *sa1100_rtc = dev_get_drvdata(dev);
int ret;
struct platform_device *plat_dev = to_platform_device(dev);
struct rtc_device *rtc = platform_get_drvdata(plat_dev);
ret = request_irq(sa1100_rtc->irq_1Hz, sa1100_rtc_interrupt,
IRQF_DISABLED, "rtc 1Hz", dev);
ret = request_irq(IRQ_RTC1Hz, sa1100_rtc_interrupt, IRQF_DISABLED,
"rtc 1Hz", dev);
if (ret) {
dev_err(dev, "IRQ %d already in use.\n", sa1100_rtc->irq_1Hz);
dev_err(dev, "IRQ %d already in use.\n", IRQ_RTC1Hz);
goto fail_ui;
}
ret = request_irq(sa1100_rtc->irq_Alrm, sa1100_rtc_interrupt,
IRQF_DISABLED, "rtc Alrm", dev);
ret = request_irq(IRQ_RTCAlrm, sa1100_rtc_interrupt, IRQF_DISABLED,
"rtc Alrm", dev);
if (ret) {
dev_err(dev, "IRQ %d already in use.\n", sa1100_rtc->irq_Alrm);
dev_err(dev, "IRQ %d already in use.\n", IRQ_RTCAlrm);
goto fail_ai;
}
sa1100_rtc->rtc->max_user_freq = RTC_FREQ;
rtc_irq_set_freq(sa1100_rtc->rtc, NULL, RTC_FREQ);
rtc->max_user_freq = RTC_FREQ;
rtc_irq_set_freq(rtc, NULL, RTC_FREQ);
return 0;
fail_ai:
free_irq(sa1100_rtc->irq_1Hz, dev);
free_irq(IRQ_RTC1Hz, dev);
fail_ui:
return ret;
}
static void sa1100_rtc_release(struct device *dev)
{
struct sa1100_rtc *sa1100_rtc = dev_get_drvdata(dev);
spin_lock_irq(&sa1100_rtc_lock);
RTSR = 0;
spin_unlock_irq(&sa1100_rtc_lock);
spin_lock_irq(&sa1100_rtc->lock);
rtc_writel(sa1100_rtc, RTSR, 0);
spin_unlock_irq(&sa1100_rtc->lock);
free_irq(sa1100_rtc->irq_Alrm, dev);
free_irq(sa1100_rtc->irq_1Hz, dev);
free_irq(IRQ_RTCAlrm, dev);
free_irq(IRQ_RTC1Hz, dev);
}
static int sa1100_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
{
struct sa1100_rtc *sa1100_rtc = dev_get_drvdata(dev);
unsigned int rtsr;
spin_lock_irq(&sa1100_rtc->lock);
rtsr = rtc_readl(sa1100_rtc, RTSR);
spin_lock_irq(&sa1100_rtc_lock);
if (enabled)
rtsr |= RTSR_ALE;
RTSR |= RTSR_ALE;
else
rtsr &= ~RTSR_ALE;
rtc_writel(sa1100_rtc, RTSR, rtsr);
spin_unlock_irq(&sa1100_rtc->lock);
RTSR &= ~RTSR_ALE;
spin_unlock_irq(&sa1100_rtc_lock);
return 0;
}
static int sa1100_rtc_read_time(struct device *dev, struct rtc_time *tm)
{
struct sa1100_rtc *sa1100_rtc = dev_get_drvdata(dev);
rtc_time_to_tm(rtc_readl(sa1100_rtc, RCNR), tm);
rtc_time_to_tm(RCNR, tm);
return 0;
}
static int sa1100_rtc_set_time(struct device *dev, struct rtc_time *tm)
{
struct sa1100_rtc *sa1100_rtc = dev_get_drvdata(dev);
unsigned long time;
int ret;
ret = rtc_tm_to_time(tm, &time);
if (ret == 0)
rtc_writel(sa1100_rtc, RCNR, time);
RCNR = time;
return ret;
}
static int sa1100_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
{
struct sa1100_rtc *sa1100_rtc = dev_get_drvdata(dev);
unsigned long time;
unsigned int rtsr;
u32 rtsr;
time = rtc_readl(sa1100_rtc, RCNR);
rtc_time_to_tm(time, &alrm->time);
rtsr = rtc_readl(sa1100_rtc, RTSR);
memcpy(&alrm->time, &rtc_alarm, sizeof(struct rtc_time));
rtsr = RTSR;
alrm->enabled = (rtsr & RTSR_ALE) ? 1 : 0;
alrm->pending = (rtsr & RTSR_AL) ? 1 : 0;
return 0;
@ -233,39 +234,26 @@ static int sa1100_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
static int sa1100_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
{
struct sa1100_rtc *sa1100_rtc = dev_get_drvdata(dev);
struct rtc_time now_tm, alarm_tm;
unsigned long time, alarm;
unsigned int rtsr;
int ret;
spin_lock_irq(&sa1100_rtc->lock);
spin_lock_irq(&sa1100_rtc_lock);
ret = rtc_update_alarm(&alrm->time);
if (ret == 0) {
if (alrm->enabled)
RTSR |= RTSR_ALE;
else
RTSR &= ~RTSR_ALE;
}
spin_unlock_irq(&sa1100_rtc_lock);
time = rtc_readl(sa1100_rtc, RCNR);
rtc_time_to_tm(time, &now_tm);
rtc_next_alarm_time(&alarm_tm, &now_tm, &alrm->time);
rtc_tm_to_time(&alarm_tm, &alarm);
rtc_writel(sa1100_rtc, RTAR, alarm);
rtsr = rtc_readl(sa1100_rtc, RTSR);
if (alrm->enabled)
rtsr |= RTSR_ALE;
else
rtsr &= ~RTSR_ALE;
rtc_writel(sa1100_rtc, RTSR, rtsr);
spin_unlock_irq(&sa1100_rtc->lock);
return 0;
return ret;
}
static int sa1100_rtc_proc(struct device *dev, struct seq_file *seq)
{
struct sa1100_rtc *sa1100_rtc = dev_get_drvdata(dev);
seq_printf(seq, "trim/divider\t\t: 0x%08x\n", (u32) RTTR);
seq_printf(seq, "RTSR\t\t\t: 0x%08x\n", (u32)RTSR);
seq_printf(seq, "trim/divider\t\t: 0x%08x\n",
rtc_readl(sa1100_rtc, RTTR));
seq_printf(seq, "RTSR\t\t\t: 0x%08x\n",
rtc_readl(sa1100_rtc, RTSR));
return 0;
}
@ -282,51 +270,7 @@ static const struct rtc_class_ops sa1100_rtc_ops = {
static int sa1100_rtc_probe(struct platform_device *pdev)
{
struct sa1100_rtc *sa1100_rtc;
unsigned int rttr;
int ret;
sa1100_rtc = kzalloc(sizeof(struct sa1100_rtc), GFP_KERNEL);
if (!sa1100_rtc)
return -ENOMEM;
spin_lock_init(&sa1100_rtc->lock);
platform_set_drvdata(pdev, sa1100_rtc);
ret = -ENXIO;
sa1100_rtc->ress = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (!sa1100_rtc->ress) {
dev_err(&pdev->dev, "No I/O memory resource defined\n");
goto err_ress;
}
sa1100_rtc->irq_1Hz = platform_get_irq(pdev, 0);
if (sa1100_rtc->irq_1Hz < 0) {
dev_err(&pdev->dev, "No 1Hz IRQ resource defined\n");
goto err_ress;
}
sa1100_rtc->irq_Alrm = platform_get_irq(pdev, 1);
if (sa1100_rtc->irq_Alrm < 0) {
dev_err(&pdev->dev, "No alarm IRQ resource defined\n");
goto err_ress;
}
ret = -ENOMEM;
sa1100_rtc->base = ioremap(sa1100_rtc->ress->start,
resource_size(sa1100_rtc->ress));
if (!sa1100_rtc->base) {
dev_err(&pdev->dev, "Unable to map pxa RTC I/O memory\n");
goto err_map;
}
sa1100_rtc->clk = clk_get(&pdev->dev, NULL);
if (IS_ERR(sa1100_rtc->clk)) {
dev_err(&pdev->dev, "failed to find rtc clock source\n");
ret = PTR_ERR(sa1100_rtc->clk);
goto err_clk;
}
clk_prepare(sa1100_rtc->clk);
clk_enable(sa1100_rtc->clk);
struct rtc_device *rtc;
/*
* According to the manual we should be able to let RTTR be zero
@ -335,24 +279,24 @@ static int sa1100_rtc_probe(struct platform_device *pdev)
* If the clock divider is uninitialized then reset it to the
* default value to get the 1Hz clock.
*/
if (rtc_readl(sa1100_rtc, RTTR) == 0) {
rttr = RTC_DEF_DIVIDER + (RTC_DEF_TRIM << 16);
rtc_writel(sa1100_rtc, RTTR, rttr);
dev_warn(&pdev->dev, "warning: initializing default clock"
" divider/trim value\n");
if (RTTR == 0) {
RTTR = RTC_DEF_DIVIDER + (RTC_DEF_TRIM << 16);
dev_warn(&pdev->dev, "warning: "
"initializing default clock divider/trim value\n");
/* The current RTC value probably doesn't make sense either */
rtc_writel(sa1100_rtc, RCNR, 0);
RCNR = 0;
}
device_init_wakeup(&pdev->dev, 1);
sa1100_rtc->rtc = rtc_device_register(pdev->name, &pdev->dev,
&sa1100_rtc_ops, THIS_MODULE);
if (IS_ERR(sa1100_rtc->rtc)) {
dev_err(&pdev->dev, "Failed to register RTC device -> %d\n",
ret);
goto err_rtc_reg;
}
rtc = rtc_device_register(pdev->name, &pdev->dev, &sa1100_rtc_ops,
THIS_MODULE);
if (IS_ERR(rtc))
return PTR_ERR(rtc);
platform_set_drvdata(pdev, rtc);
/* Fix for a nasty initialization problem the in SA11xx RTSR register.
* See also the comments in sa1100_rtc_interrupt().
*
@ -375,46 +319,33 @@ static int sa1100_rtc_probe(struct platform_device *pdev)
*
* Notice that clearing bit 1 and 0 is accomplished by writting ONES to
* the corresponding bits in RTSR. */
rtc_writel(sa1100_rtc, RTSR, (RTSR_AL | RTSR_HZ));
RTSR = RTSR_AL | RTSR_HZ;
return 0;
err_rtc_reg:
err_clk:
iounmap(sa1100_rtc->base);
err_ress:
err_map:
kfree(sa1100_rtc);
return ret;
}
static int sa1100_rtc_remove(struct platform_device *pdev)
{
struct sa1100_rtc *sa1100_rtc = platform_get_drvdata(pdev);
struct rtc_device *rtc = platform_get_drvdata(pdev);
if (rtc)
rtc_device_unregister(rtc);
rtc_device_unregister(sa1100_rtc->rtc);
clk_disable(sa1100_rtc->clk);
clk_unprepare(sa1100_rtc->clk);
iounmap(sa1100_rtc->base);
return 0;
}
#ifdef CONFIG_PM
static int sa1100_rtc_suspend(struct device *dev)
{
struct sa1100_rtc *sa1100_rtc = dev_get_drvdata(dev);
if (device_may_wakeup(dev))
enable_irq_wake(sa1100_rtc->irq_Alrm);
enable_irq_wake(IRQ_RTCAlrm);
return 0;
}
static int sa1100_rtc_resume(struct device *dev)
{
struct sa1100_rtc *sa1100_rtc = dev_get_drvdata(dev);
if (device_may_wakeup(dev))
disable_irq_wake(sa1100_rtc->irq_Alrm);
disable_irq_wake(IRQ_RTCAlrm);
return 0;
}

12
include/linux/mfd/mcp.h
View file

@ -10,7 +10,6 @@
#ifndef MCP_H
#define MCP_H
#include <linux/mod_devicetable.h>
#include <mach/dma.h>
struct mcp_ops;
@ -27,7 +26,7 @@ struct mcp {
dma_device_t dma_telco_rd;
dma_device_t dma_telco_wr;
struct device attached_device;
const char *codec;
int gpio_base;
};
struct mcp_ops {
@ -45,11 +44,10 @@ void mcp_reg_write(struct mcp *, unsigned int, unsigned int);
unsigned int mcp_reg_read(struct mcp *, unsigned int);
void mcp_enable(struct mcp *);
void mcp_disable(struct mcp *);
const struct mcp_device_id *mcp_get_device_id(const struct mcp *mcp);
#define mcp_get_sclk_rate(mcp) ((mcp)->sclk_rate)
struct mcp *mcp_host_alloc(struct device *, size_t);
int mcp_host_register(struct mcp *, void *);
int mcp_host_register(struct mcp *);
void mcp_host_unregister(struct mcp *);
struct mcp_driver {
@ -58,7 +56,6 @@ struct mcp_driver {
void (*remove)(struct mcp *);
int (*suspend)(struct mcp *, pm_message_t);
int (*resume)(struct mcp *);
const struct mcp_device_id *id_table;
};
int mcp_driver_register(struct mcp_driver *);
@ -67,6 +64,9 @@ void mcp_driver_unregister(struct mcp_driver *);
#define mcp_get_drvdata(mcp) dev_get_drvdata(&(mcp)->attached_device)
#define mcp_set_drvdata(mcp,d) dev_set_drvdata(&(mcp)->attached_device, d)
#define mcp_priv(mcp) ((void *)((mcp)+1))
static inline void *mcp_priv(struct mcp *mcp)
{
return mcp + 1;
}
#endif

5
include/linux/mfd/ucb1x00.h
View file

@ -104,9 +104,6 @@
#define UCB_MODE_DYN_VFLAG_ENA (1 << 12)
#define UCB_MODE_AUD_OFF_CAN (1 << 13)
struct ucb1x00_plat_data {
int gpio_base;
};
struct ucb1x00_irq {
void *devid;
@ -119,7 +116,7 @@ struct ucb1x00 {
unsigned int irq;
struct semaphore adc_sem;
spinlock_t io_lock;
const struct mcp_device_id *id;
u16 id;
u16 io_dir;
u16 io_out;
u16 adc_cr;

11
include/linux/mod_devicetable.h
View file

@ -436,17 +436,6 @@ struct spi_device_id {
__attribute__((aligned(sizeof(kernel_ulong_t))));
};
/* mcp */
#define MCP_NAME_SIZE 20
#define MCP_MODULE_PREFIX "mcp:"
struct mcp_device_id {
char name[MCP_NAME_SIZE];
kernel_ulong_t driver_data /* Data private to the driver */
__attribute__((aligned(sizeof(kernel_ulong_t))));
};
/* dmi */
enum dmi_field {
DMI_NONE,

10
scripts/mod/file2alias.c
View file

@ -823,16 +823,6 @@ static int do_spi_entry(const char *filename, struct spi_device_id *id,
}
ADD_TO_DEVTABLE("spi", struct spi_device_id, do_spi_entry);
/* Looks like: mcp:S */
static int do_mcp_entry(const char *filename, struct mcp_device_id *id,
char *alias)
{
sprintf(alias, MCP_MODULE_PREFIX "%s", id->name);
return 1;
}
ADD_TO_DEVTABLE("mcp", struct mcp_device_id, do_mcp_entry);
static const struct dmifield {
const char *prefix;
int field;