arm: Move chained_irq_(enter|exit) to a generic file
These functions have been introduced by commit 10a8c383
(irq: introduce
entry and exit functions for chained handlers) in asm/mach/irq.h. This
patch moves them to linux/irqchip/chained_irq.h so that generic irqchip
drivers do not rely on architecture specific header files.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Tested-by: Marc Zyngier <marc.zyngier@arm.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Rob Herring <rob.herring@calxeda.com>
This commit is contained in:
parent
f36a3bb1a1
commit
de88cbb7b2
21 changed files with 71 additions and 55 deletions
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@ -30,35 +30,4 @@ do { \
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raw_spin_unlock(&desc->lock); \
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} while(0)
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#ifndef __ASSEMBLY__
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/*
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* Entry/exit functions for chained handlers where the primary IRQ chip
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* may implement either fasteoi or level-trigger flow control.
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*/
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static inline void chained_irq_enter(struct irq_chip *chip,
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struct irq_desc *desc)
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{
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/* FastEOI controllers require no action on entry. */
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if (chip->irq_eoi)
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return;
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if (chip->irq_mask_ack) {
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chip->irq_mask_ack(&desc->irq_data);
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} else {
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chip->irq_mask(&desc->irq_data);
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if (chip->irq_ack)
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chip->irq_ack(&desc->irq_data);
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}
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}
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static inline void chained_irq_exit(struct irq_chip *chip,
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struct irq_desc *desc)
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{
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if (chip->irq_eoi)
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chip->irq_eoi(&desc->irq_data);
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else
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chip->irq_unmask(&desc->irq_data);
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}
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#endif
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#endif
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@ -22,10 +22,9 @@
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#include <linux/module.h>
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#include <linux/io.h>
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#include <linux/irqdomain.h>
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#include <linux/irqchip/chained_irq.h>
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#include <linux/of_address.h>
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#include <asm/mach/irq.h>
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#include <mach/hardware.h>
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#include <mach/at91_pio.h>
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@ -26,6 +26,7 @@
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#include <linux/irqchip.h>
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#include <linux/of_address.h>
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#include <linux/irqchip/arm-gic.h>
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#include <linux/irqchip/chained_irq.h>
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#include <asm/proc-fns.h>
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#include <asm/exception.h>
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@ -25,6 +25,7 @@
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#include <linux/ioport.h>
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#include <linux/device.h>
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#include <linux/irqdomain.h>
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#include <linux/irqchip/chained_irq.h>
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#include <asm/mach/irq.h>
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@ -16,6 +16,7 @@
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#include <linux/kernel.h>
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#include <linux/interrupt.h>
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#include <linux/irq.h>
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#include <linux/irqchip/chained_irq.h>
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#include <linux/io.h>
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#include <mach/map.h>
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@ -23,8 +24,6 @@
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#include <plat/irq-vic-timer.h>
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#include <plat/regs-timer.h>
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#include <asm/mach/irq.h>
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static void s3c_irq_demux_vic_timer(unsigned int irq, struct irq_desc *desc)
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{
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struct irq_chip *chip = irq_get_chip(irq);
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@ -14,6 +14,7 @@
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#include <linux/kernel.h>
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#include <linux/interrupt.h>
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#include <linux/irq.h>
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#include <linux/irqchip/chained_irq.h>
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#include <linux/io.h>
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#include <linux/gpio.h>
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#include <linux/slab.h>
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@ -22,8 +23,6 @@
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#include <plat/gpio-core.h>
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#include <plat/gpio-cfg.h>
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#include <asm/mach/irq.h>
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#define GPIO_BASE(chip) ((void __iomem *)((unsigned long)((chip)->base) & 0xFFFFF000u))
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#define CON_OFFSET 0x700
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@ -23,13 +23,12 @@
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#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <linux/io.h>
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#include <linux/irqchip/chained_irq.h>
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#include <linux/irq.h>
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <linux/spinlock.h>
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#include <asm/mach/irq.h>
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#include <mach/msm_gpiomux.h>
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#include <mach/msm_iomap.h>
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@ -24,6 +24,7 @@
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#include <linux/io.h>
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#include <linux/irq.h>
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#include <linux/irqdomain.h>
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#include <linux/irqchip/chained_irq.h>
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#include <linux/gpio.h>
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#include <linux/platform_device.h>
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#include <linux/slab.h>
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@ -32,7 +33,6 @@
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#include <linux/of_device.h>
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#include <linux/module.h>
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#include <asm-generic/bug.h>
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#include <asm/mach/irq.h>
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enum mxc_gpio_hwtype {
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IMX1_GPIO, /* runs on i.mx1 */
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@ -25,11 +25,10 @@
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#include <linux/of.h>
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#include <linux/of_device.h>
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#include <linux/irqdomain.h>
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#include <linux/irqchip/chained_irq.h>
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#include <linux/gpio.h>
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#include <linux/platform_data/gpio-omap.h>
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#include <asm/mach/irq.h>
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#define OFF_MODE 1
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static LIST_HEAD(omap_gpio_list);
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@ -15,6 +15,7 @@
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#include <linux/io.h>
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#include <linux/ioport.h>
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#include <linux/irq.h>
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#include <linux/irqchip/chained_irq.h>
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#include <linux/bitops.h>
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#include <linux/workqueue.h>
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#include <linux/gpio.h>
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@ -23,7 +24,6 @@
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#include <linux/amba/pl061.h>
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#include <linux/slab.h>
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#include <linux/pm.h>
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#include <asm/mach/irq.h>
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#define GPIODIR 0x400
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#define GPIOIS 0x404
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@ -19,6 +19,7 @@
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#include <linux/init.h>
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#include <linux/irq.h>
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#include <linux/irqdomain.h>
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#include <linux/irqchip/chained_irq.h>
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#include <linux/io.h>
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#include <linux/of.h>
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#include <linux/of_device.h>
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#include <linux/syscore_ops.h>
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#include <linux/slab.h>
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#include <asm/mach/irq.h>
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#include <mach/irqs.h>
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/*
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@ -27,11 +27,10 @@
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#include <linux/platform_device.h>
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#include <linux/module.h>
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#include <linux/irqdomain.h>
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#include <linux/irqchip/chained_irq.h>
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#include <linux/pinctrl/consumer.h>
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#include <linux/pm.h>
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#include <asm/mach/irq.h>
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#define GPIO_BANK(x) ((x) >> 5)
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#define GPIO_PORT(x) (((x) >> 3) & 0x3)
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#define GPIO_BIT(x) ((x) & 0x7)
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@ -13,6 +13,7 @@
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#include <linux/init.h>
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#include <linux/io.h>
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#include <linux/irqdomain.h>
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#include <linux/irqchip/chained_irq.h>
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#include <linux/of_address.h>
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#include <linux/of_irq.h>
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#include <asm/mach/irq.h>
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@ -38,6 +38,7 @@
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#include <linux/interrupt.h>
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#include <linux/percpu.h>
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#include <linux/slab.h>
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#include <linux/irqchip/chained_irq.h>
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#include <linux/irqchip/arm-gic.h>
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#include <asm/irq.h>
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@ -18,6 +18,7 @@
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#include <linux/interrupt.h>
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#include <linux/irq.h>
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#include <linux/irqdomain.h>
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#include <linux/irqchip/chained_irq.h>
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#include <linux/io.h>
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#include <linux/gpio.h>
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#include <linux/pinctrl/machine.h>
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/* Since we request GPIOs from ourself */
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#include <linux/pinctrl/consumer.h>
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#include <asm/mach/irq.h>
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#include <mach/hardware.h>
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#include <mach/at91_pio.h>
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@ -23,13 +23,12 @@
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#include <linux/interrupt.h>
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#include <linux/irqdomain.h>
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#include <linux/irq.h>
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#include <linux/irqchip/chained_irq.h>
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#include <linux/of_irq.h>
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#include <linux/io.h>
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#include <linux/slab.h>
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#include <linux/err.h>
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#include <asm/mach/irq.h>
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#include "pinctrl-samsung.h"
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#include "pinctrl-exynos.h"
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#include <linux/interrupt.h>
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#include <linux/irq.h>
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#include <linux/irqdomain.h>
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#include <linux/irqchip/chained_irq.h>
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#include <linux/slab.h>
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#include <linux/of_device.h>
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#include <linux/of_address.h>
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/* Since we request GPIOs from ourself */
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#include <linux/pinctrl/consumer.h>
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#include <linux/platform_data/pinctrl-nomadik.h>
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#include <asm/mach/irq.h>
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#include "pinctrl-nomadik.h"
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#include "core.h"
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@ -14,6 +14,7 @@
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#include <linux/slab.h>
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#include <linux/err.h>
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#include <linux/irqdomain.h>
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#include <linux/irqchip/chained_irq.h>
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#include <linux/pinctrl/pinctrl.h>
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#include <linux/pinctrl/pinmux.h>
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#include <linux/pinctrl/consumer.h>
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#include <linux/bitops.h>
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#include <linux/gpio.h>
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#include <linux/of_gpio.h>
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#include <asm/mach/irq.h>
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#define DRIVER_NAME "pinmux-sirf"
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@ -15,12 +15,12 @@
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#include <linux/io.h>
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#include <linux/irq.h>
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#include <linux/irqdomain.h>
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#include <linux/irqchip/chained_irq.h>
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#include <linux/module.h>
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#include <linux/pinctrl/consumer.h>
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#include <linux/platform_device.h>
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#include <linux/pm.h>
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#include <linux/spinlock.h>
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#include <asm/mach/irq.h>
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#define MAX_GPIO_PER_REG 32
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#define PIN_OFFSET(pin) (pin % MAX_GPIO_PER_REG)
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#include <linux/clk.h>
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#include <linux/list.h>
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#include <linux/irq.h>
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#include <linux/irqchip/chained_irq.h>
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#include <linux/of_device.h>
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#include <asm/mach/irq.h>
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#include "imx-ipu-v3.h"
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#include "ipu-prv.h"
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52
include/linux/irqchip/chained_irq.h
Normal file
52
include/linux/irqchip/chained_irq.h
Normal file
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/*
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* Chained IRQ handlers support.
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*
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* Copyright (C) 2011 ARM Ltd.
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef __IRQCHIP_CHAINED_IRQ_H
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#define __IRQCHIP_CHAINED_IRQ_H
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#include <linux/irq.h>
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/*
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* Entry/exit functions for chained handlers where the primary IRQ chip
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* may implement either fasteoi or level-trigger flow control.
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*/
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static inline void chained_irq_enter(struct irq_chip *chip,
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struct irq_desc *desc)
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{
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/* FastEOI controllers require no action on entry. */
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if (chip->irq_eoi)
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return;
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if (chip->irq_mask_ack) {
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chip->irq_mask_ack(&desc->irq_data);
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} else {
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chip->irq_mask(&desc->irq_data);
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if (chip->irq_ack)
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chip->irq_ack(&desc->irq_data);
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}
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}
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static inline void chained_irq_exit(struct irq_chip *chip,
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struct irq_desc *desc)
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{
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if (chip->irq_eoi)
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chip->irq_eoi(&desc->irq_data);
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else
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chip->irq_unmask(&desc->irq_data);
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}
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#endif /* __IRQCHIP_CHAINED_IRQ_H */
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