ixgbe: add registers etc. printout code just before resetting adapters
This patch adds registers (,tx/rx rings' status and so on) printout code just before resetting adapters. This will be helpful for detecting the root cause of adapters reset. Signed-off-by: Taku Izumi <izumi.taku@jp.fujitsu.com> Signed-off-by: Koki Sanagi <sanagi.koki@jp.fujitsu.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Taku Izumi
David S. Miller
parent
c97ec42a7a
commit
dcd79aebe7
1 changed files with 341 additions and 0 deletions
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@ -175,6 +175,345 @@ static inline void ixgbe_disable_sriov(struct ixgbe_adapter *adapter)
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adapter->flags &= ~IXGBE_FLAG_SRIOV_ENABLED;
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}
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struct ixgbe_reg_info {
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u32 ofs;
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char *name;
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};
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static const struct ixgbe_reg_info ixgbe_reg_info_tbl[] = {
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/* General Registers */
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{IXGBE_CTRL, "CTRL"},
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{IXGBE_STATUS, "STATUS"},
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{IXGBE_CTRL_EXT, "CTRL_EXT"},
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/* Interrupt Registers */
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{IXGBE_EICR, "EICR"},
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/* RX Registers */
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{IXGBE_SRRCTL(0), "SRRCTL"},
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{IXGBE_DCA_RXCTRL(0), "DRXCTL"},
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{IXGBE_RDLEN(0), "RDLEN"},
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{IXGBE_RDH(0), "RDH"},
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{IXGBE_RDT(0), "RDT"},
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{IXGBE_RXDCTL(0), "RXDCTL"},
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{IXGBE_RDBAL(0), "RDBAL"},
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{IXGBE_RDBAH(0), "RDBAH"},
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/* TX Registers */
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{IXGBE_TDBAL(0), "TDBAL"},
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{IXGBE_TDBAH(0), "TDBAH"},
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{IXGBE_TDLEN(0), "TDLEN"},
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{IXGBE_TDH(0), "TDH"},
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{IXGBE_TDT(0), "TDT"},
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{IXGBE_TXDCTL(0), "TXDCTL"},
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/* List Terminator */
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{}
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};
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/*
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* ixgbe_regdump - register printout routine
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*/
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static void ixgbe_regdump(struct ixgbe_hw *hw, struct ixgbe_reg_info *reginfo)
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{
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int i = 0, j = 0;
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char rname[16];
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u32 regs[64];
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switch (reginfo->ofs) {
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case IXGBE_SRRCTL(0):
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for (i = 0; i < 64; i++)
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regs[i] = IXGBE_READ_REG(hw, IXGBE_SRRCTL(i));
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break;
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case IXGBE_DCA_RXCTRL(0):
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for (i = 0; i < 64; i++)
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regs[i] = IXGBE_READ_REG(hw, IXGBE_DCA_RXCTRL(i));
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break;
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case IXGBE_RDLEN(0):
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for (i = 0; i < 64; i++)
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regs[i] = IXGBE_READ_REG(hw, IXGBE_RDLEN(i));
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break;
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case IXGBE_RDH(0):
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for (i = 0; i < 64; i++)
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regs[i] = IXGBE_READ_REG(hw, IXGBE_RDH(i));
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break;
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case IXGBE_RDT(0):
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for (i = 0; i < 64; i++)
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regs[i] = IXGBE_READ_REG(hw, IXGBE_RDT(i));
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break;
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case IXGBE_RXDCTL(0):
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for (i = 0; i < 64; i++)
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regs[i] = IXGBE_READ_REG(hw, IXGBE_RXDCTL(i));
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break;
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case IXGBE_RDBAL(0):
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for (i = 0; i < 64; i++)
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regs[i] = IXGBE_READ_REG(hw, IXGBE_RDBAL(i));
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break;
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case IXGBE_RDBAH(0):
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for (i = 0; i < 64; i++)
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regs[i] = IXGBE_READ_REG(hw, IXGBE_RDBAH(i));
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break;
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case IXGBE_TDBAL(0):
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for (i = 0; i < 64; i++)
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regs[i] = IXGBE_READ_REG(hw, IXGBE_TDBAL(i));
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break;
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case IXGBE_TDBAH(0):
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for (i = 0; i < 64; i++)
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regs[i] = IXGBE_READ_REG(hw, IXGBE_TDBAH(i));
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break;
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case IXGBE_TDLEN(0):
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for (i = 0; i < 64; i++)
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regs[i] = IXGBE_READ_REG(hw, IXGBE_TDLEN(i));
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break;
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case IXGBE_TDH(0):
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for (i = 0; i < 64; i++)
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regs[i] = IXGBE_READ_REG(hw, IXGBE_TDH(i));
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break;
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case IXGBE_TDT(0):
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for (i = 0; i < 64; i++)
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regs[i] = IXGBE_READ_REG(hw, IXGBE_TDT(i));
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break;
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case IXGBE_TXDCTL(0):
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for (i = 0; i < 64; i++)
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regs[i] = IXGBE_READ_REG(hw, IXGBE_TXDCTL(i));
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break;
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default:
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printk(KERN_INFO "%-15s %08x\n", reginfo->name,
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IXGBE_READ_REG(hw, reginfo->ofs));
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return;
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}
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for (i = 0; i < 8; i++) {
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snprintf(rname, 16, "%s[%d-%d]", reginfo->name, i*8, i*8+7);
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printk(KERN_ERR "%-15s ", rname);
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for (j = 0; j < 8; j++)
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printk(KERN_CONT "%08x ", regs[i*8+j]);
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printk(KERN_CONT "\n");
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}
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}
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/*
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* ixgbe_dump - Print registers, tx-rings and rx-rings
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*/
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static void ixgbe_dump(struct ixgbe_adapter *adapter)
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{
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struct net_device *netdev = adapter->netdev;
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struct ixgbe_hw *hw = &adapter->hw;
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struct ixgbe_reg_info *reginfo;
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int n = 0;
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struct ixgbe_ring *tx_ring;
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struct ixgbe_tx_buffer *tx_buffer_info;
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union ixgbe_adv_tx_desc *tx_desc;
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struct my_u0 { u64 a; u64 b; } *u0;
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struct ixgbe_ring *rx_ring;
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union ixgbe_adv_rx_desc *rx_desc;
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struct ixgbe_rx_buffer *rx_buffer_info;
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u32 staterr;
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int i = 0;
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if (!netif_msg_hw(adapter))
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return;
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/* Print netdevice Info */
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if (netdev) {
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dev_info(&adapter->pdev->dev, "Net device Info\n");
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printk(KERN_INFO "Device Name state "
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"trans_start last_rx\n");
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printk(KERN_INFO "%-15s %016lX %016lX %016lX\n",
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netdev->name,
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netdev->state,
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netdev->trans_start,
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netdev->last_rx);
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}
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/* Print Registers */
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dev_info(&adapter->pdev->dev, "Register Dump\n");
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printk(KERN_INFO " Register Name Value\n");
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for (reginfo = (struct ixgbe_reg_info *)ixgbe_reg_info_tbl;
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reginfo->name; reginfo++) {
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ixgbe_regdump(hw, reginfo);
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}
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/* Print TX Ring Summary */
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if (!netdev || !netif_running(netdev))
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goto exit;
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dev_info(&adapter->pdev->dev, "TX Rings Summary\n");
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printk(KERN_INFO "Queue [NTU] [NTC] [bi(ntc)->dma ] "
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"leng ntw timestamp\n");
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for (n = 0; n < adapter->num_tx_queues; n++) {
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tx_ring = adapter->tx_ring[n];
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tx_buffer_info =
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&tx_ring->tx_buffer_info[tx_ring->next_to_clean];
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printk(KERN_INFO " %5d %5X %5X %016llX %04X %3X %016llX\n",
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n, tx_ring->next_to_use, tx_ring->next_to_clean,
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(u64)tx_buffer_info->dma,
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tx_buffer_info->length,
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tx_buffer_info->next_to_watch,
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(u64)tx_buffer_info->time_stamp);
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}
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/* Print TX Rings */
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if (!netif_msg_tx_done(adapter))
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goto rx_ring_summary;
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dev_info(&adapter->pdev->dev, "TX Rings Dump\n");
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/* Transmit Descriptor Formats
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*
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* Advanced Transmit Descriptor
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* +--------------------------------------------------------------+
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* 0 | Buffer Address [63:0] |
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* +--------------------------------------------------------------+
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* 8 | PAYLEN | PORTS | IDX | STA | DCMD |DTYP | RSV | DTALEN |
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* +--------------------------------------------------------------+
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* 63 46 45 40 39 36 35 32 31 24 23 20 19 0
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*/
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for (n = 0; n < adapter->num_tx_queues; n++) {
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tx_ring = adapter->tx_ring[n];
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printk(KERN_INFO "------------------------------------\n");
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printk(KERN_INFO "TX QUEUE INDEX = %d\n", tx_ring->queue_index);
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printk(KERN_INFO "------------------------------------\n");
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printk(KERN_INFO "T [desc] [address 63:0 ] "
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"[PlPOIdStDDt Ln] [bi->dma ] "
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"leng ntw timestamp bi->skb\n");
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for (i = 0; tx_ring->desc && (i < tx_ring->count); i++) {
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tx_desc = IXGBE_TX_DESC_ADV(*tx_ring, i);
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tx_buffer_info = &tx_ring->tx_buffer_info[i];
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u0 = (struct my_u0 *)tx_desc;
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printk(KERN_INFO "T [0x%03X] %016llX %016llX %016llX"
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" %04X %3X %016llX %p", i,
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le64_to_cpu(u0->a),
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le64_to_cpu(u0->b),
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(u64)tx_buffer_info->dma,
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tx_buffer_info->length,
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tx_buffer_info->next_to_watch,
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(u64)tx_buffer_info->time_stamp,
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tx_buffer_info->skb);
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if (i == tx_ring->next_to_use &&
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i == tx_ring->next_to_clean)
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printk(KERN_CONT " NTC/U\n");
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else if (i == tx_ring->next_to_use)
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printk(KERN_CONT " NTU\n");
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else if (i == tx_ring->next_to_clean)
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printk(KERN_CONT " NTC\n");
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else
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printk(KERN_CONT "\n");
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if (netif_msg_pktdata(adapter) &&
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tx_buffer_info->dma != 0)
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print_hex_dump(KERN_INFO, "",
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DUMP_PREFIX_ADDRESS, 16, 1,
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phys_to_virt(tx_buffer_info->dma),
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tx_buffer_info->length, true);
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}
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}
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/* Print RX Rings Summary */
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rx_ring_summary:
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dev_info(&adapter->pdev->dev, "RX Rings Summary\n");
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printk(KERN_INFO "Queue [NTU] [NTC]\n");
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for (n = 0; n < adapter->num_rx_queues; n++) {
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rx_ring = adapter->rx_ring[n];
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printk(KERN_INFO "%5d %5X %5X\n", n,
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rx_ring->next_to_use, rx_ring->next_to_clean);
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}
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/* Print RX Rings */
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if (!netif_msg_rx_status(adapter))
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goto exit;
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dev_info(&adapter->pdev->dev, "RX Rings Dump\n");
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/* Advanced Receive Descriptor (Read) Format
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* 63 1 0
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* +-----------------------------------------------------+
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* 0 | Packet Buffer Address [63:1] |A0/NSE|
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* +----------------------------------------------+------+
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* 8 | Header Buffer Address [63:1] | DD |
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* +-----------------------------------------------------+
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*
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*
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* Advanced Receive Descriptor (Write-Back) Format
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*
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* 63 48 47 32 31 30 21 20 16 15 4 3 0
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* +------------------------------------------------------+
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* 0 | Packet IP |SPH| HDR_LEN | RSV|Packet| RSS |
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* | Checksum Ident | | | | Type | Type |
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* +------------------------------------------------------+
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* 8 | VLAN Tag | Length | Extended Error | Extended Status |
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* +------------------------------------------------------+
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* 63 48 47 32 31 20 19 0
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*/
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for (n = 0; n < adapter->num_rx_queues; n++) {
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rx_ring = adapter->rx_ring[n];
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printk(KERN_INFO "------------------------------------\n");
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printk(KERN_INFO "RX QUEUE INDEX = %d\n", rx_ring->queue_index);
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printk(KERN_INFO "------------------------------------\n");
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printk(KERN_INFO "R [desc] [ PktBuf A0] "
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"[ HeadBuf DD] [bi->dma ] [bi->skb] "
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"<-- Adv Rx Read format\n");
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printk(KERN_INFO "RWB[desc] [PcsmIpSHl PtRs] "
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"[vl er S cks ln] ---------------- [bi->skb] "
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"<-- Adv Rx Write-Back format\n");
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for (i = 0; i < rx_ring->count; i++) {
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rx_buffer_info = &rx_ring->rx_buffer_info[i];
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rx_desc = IXGBE_RX_DESC_ADV(*rx_ring, i);
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u0 = (struct my_u0 *)rx_desc;
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staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
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if (staterr & IXGBE_RXD_STAT_DD) {
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/* Descriptor Done */
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printk(KERN_INFO "RWB[0x%03X] %016llX "
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"%016llX ---------------- %p", i,
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le64_to_cpu(u0->a),
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le64_to_cpu(u0->b),
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rx_buffer_info->skb);
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} else {
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printk(KERN_INFO "R [0x%03X] %016llX "
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"%016llX %016llX %p", i,
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le64_to_cpu(u0->a),
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le64_to_cpu(u0->b),
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(u64)rx_buffer_info->dma,
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rx_buffer_info->skb);
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if (netif_msg_pktdata(adapter)) {
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print_hex_dump(KERN_INFO, "",
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DUMP_PREFIX_ADDRESS, 16, 1,
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phys_to_virt(rx_buffer_info->dma),
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rx_ring->rx_buf_len, true);
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if (rx_ring->rx_buf_len
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< IXGBE_RXBUFFER_2048)
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print_hex_dump(KERN_INFO, "",
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DUMP_PREFIX_ADDRESS, 16, 1,
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phys_to_virt(
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rx_buffer_info->page_dma +
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rx_buffer_info->page_offset
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),
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PAGE_SIZE/2, true);
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}
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}
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if (i == rx_ring->next_to_use)
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printk(KERN_CONT " NTU\n");
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else if (i == rx_ring->next_to_clean)
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printk(KERN_CONT " NTC\n");
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else
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printk(KERN_CONT "\n");
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}
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}
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exit:
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return;
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}
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static void ixgbe_release_hw_control(struct ixgbe_adapter *adapter)
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{
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u32 ctrl_ext;
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@ -3404,6 +3743,8 @@ static void ixgbe_reset_task(struct work_struct *work)
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adapter->tx_timeout_count++;
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ixgbe_dump(adapter);
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netdev_err(adapter->netdev, "Reset adapter\n");
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ixgbe_reinit_locked(adapter);
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}
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