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Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus

Browse source 
* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus:
  [MIPS] Fix warning by moving do_default_vi into CONFIG_CPU_MIPSR2_SRS
  [MIPS] Fix some minor typoes in arch/mips/Kconfig.
  [MIPS] Remove prototype for deleted function qemu_handle_int
  [MIPS] Fix some system calls with long long arguments
  [MIPS] Make dma_map_sg handle sg elements which are longer than one page
  [MIPS] Drop __ARCH_WANT_SYS_FADVISE64
  [MIPS] Fix VGA corruption on RM300C
  [MIPS] RM300: Fix MMIO problems by marking the PCI INT ACK region busy
  [MIPS] EMMA2RH: remove dead KGDB code
  [MIPS] Remove duplicate fpu enable hazard code.
  [MIPS] Atlas, Malta, SEAD: Remove scroll from interrupt handler.
This commit is contained in:
Linus Torvalds 2007-06-07 17:00:37 -07:00
commit dc31501131
19 changed files with 111 additions and 87 deletions
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6
arch/mips/Kconfig
View file

@ -747,9 +747,9 @@ config EARLY_PRINTK
to print messages very early in the bootup process.
This is useful for kernel debugging when your machine crashes very
early before the console code is initialized. For normal operation
it is not recommended because it looks on some machines ugly and
oesn't cooperate with an X server. You should normally N here,
early before the console code is initialized. For normal operation,
it is not recommended because it looks ugly on some machines and
doesn't cooperate with an X server. You should normally say N here,
unless you want to debug such a crash.
config SYS_HAS_EARLY_PRINTK

24
arch/mips/emma2rh/markeins/setup.c
View file

@ -115,30 +115,6 @@ extern void markeins_irq_setup(void);
static void inline __init markeins_sio_setup(void)
{
#ifdef CONFIG_KGDB_8250
struct uart_port emma_port;
memset(&emma_port, 0, sizeof(emma_port));
emma_port.flags =
UPF_BOOT_AUTOCONF | UPF_SKIP_TEST;
emma_port.iotype = UPIO_MEM;
emma_port.regshift = 4; /* I/O addresses are every 8 bytes */
emma_port.uartclk = 18544000; /* Clock rate of the chip */
emma_port.line = 0;
emma_port.mapbase = KSEG1ADDR(EMMA2RH_PFUR0_BASE + 3);
emma_port.membase = (u8*)emma_port.mapbase;
early_serial_setup(&emma_port);
emma_port.line = 1;
emma_port.mapbase = KSEG1ADDR(EMMA2RH_PFUR1_BASE + 3);
emma_port.membase = (u8*)emma_port.mapbase;
early_serial_setup(&emma_port);
emma_port.irq = EMMA2RH_IRQ_PFUR1;
kgdb8250_add_port(1, &emma_port);
#endif
}
void __init plat_mem_setup(void)

10
arch/mips/kernel/linux32.c
View file

@ -556,6 +556,16 @@ asmlinkage long sys32_sync_file_range(int fd, int __pad,
flags);
}
asmlinkage long sys32_fadvise64_64(int fd, int __pad,
unsigned long a2, unsigned long a3,
unsigned long a4, unsigned long a5,
int flags)
{
return sys_fadvise64_64(fd,
merge_64(a2, a3), merge_64(a4, a5),
flags);
}
save_static_function(sys32_clone);
__attribute_used__ noinline static int
_sys32_clone(nabi_no_regargs struct pt_regs regs)

2
arch/mips/kernel/r4k_switch.S
View file

@ -174,7 +174,7 @@ LEAF(_init_fpu)
or t0, t1
mtc0 t0, CP0_STATUS
#endif /* CONFIG_MIPS_MT_SMTC */
fpu_enable_hazard
enable_fpu_hazard
li t1, FPU_DEFAULT
ctc1 t1, fcr31

2
arch/mips/kernel/scall64-n32.S
View file

@ -299,7 +299,7 @@ EXPORT(sysn32_call_table)
PTR sys_ni_syscall /* res. for afs_syscall */
PTR sys_ni_syscall /* res. for security */
PTR sys_gettid
PTR sys32_readahead
PTR sys_readahead
PTR sys_setxattr /* 6180 */
PTR sys_lsetxattr
PTR sys_fsetxattr

2
arch/mips/kernel/scall64-o32.S
View file

@ -459,7 +459,7 @@ sys_call_table:
PTR sys_remap_file_pages
PTR sys_set_tid_address
PTR sys_restart_syscall
PTR sys_fadvise64_64
PTR sys32_fadvise64_64
PTR compat_sys_statfs64 /* 4255 */
PTR compat_sys_fstatfs64
PTR compat_sys_timer_create

12
arch/mips/kernel/traps.c
View file

@ -927,12 +927,6 @@ asmlinkage void do_reserved(struct pt_regs *regs)
(regs->cp0_cause & 0x7f) >> 2);
}
static asmlinkage void do_default_vi(void)
{
show_regs(get_irq_regs());
panic("Caught unexpected vectored interrupt.");
}
/*
* Some MIPS CPUs can enable/disable for cache parity detection, but do
* it different ways.
@ -1128,6 +1122,12 @@ void mips_srs_free(int set)
clear_bit(set, &sr->sr_allocated);
}
static asmlinkage void do_default_vi(void)
{
show_regs(get_irq_regs());
panic("Caught unexpected vectored interrupt.");
}
static void *set_vi_srs_handler(int n, vi_handler_t addr, int srs)
{
unsigned long handler;

2
arch/mips/mips-boards/atlas/atlas_setup.c
View file

@ -48,6 +48,8 @@ const char *get_system_type(void)
return "MIPS Atlas";
}
const char display_string[] = " LINUX ON ATLAS ";
void __init plat_mem_setup(void)
{
mips_pcibios_init();

24
arch/mips/mips-boards/generic/display.c
View file

@ -19,9 +19,14 @@
*/
#include <linux/compiler.h>
#include <linux/timer.h>
#include <asm/io.h>
#include <asm/mips-boards/generic.h>
extern const char display_string[];
static unsigned int display_count;
static unsigned int max_display_count;
void mips_display_message(const char *str)
{
static unsigned int __iomem *display = NULL;
@ -37,3 +42,22 @@ void mips_display_message(const char *str)
writel(' ', display + i);
}
}
static void scroll_display_message(unsigned long data);
static DEFINE_TIMER(mips_scroll_timer, scroll_display_message, HZ, 0);
static void scroll_display_message(unsigned long data)
{
mips_display_message(&display_string[display_count++]);
if (display_count == max_display_count)
display_count = 0;
mod_timer(&mips_scroll_timer, jiffies + HZ);
}
void mips_scroll_message(void)
{
del_timer_sync(&mips_scroll_timer);
max_display_count = strlen(display_string) + 1 - 8;
mod_timer(&mips_scroll_timer, jiffies + 1);
}

31
arch/mips/mips-boards/generic/time.c
View file

@ -53,37 +53,11 @@
unsigned long cpu_khz;
#if defined(CONFIG_MIPS_ATLAS)
static char display_string[] = " LINUX ON ATLAS ";
#endif
#if defined(CONFIG_MIPS_MALTA)
#if defined(CONFIG_MIPS_MT_SMTC)
static char display_string[] = " SMTC LINUX ON MALTA ";
#else
static char display_string[] = " LINUX ON MALTA ";
#endif /* CONFIG_MIPS_MT_SMTC */
#endif
#if defined(CONFIG_MIPS_SEAD)
static char display_string[] = " LINUX ON SEAD ";
#endif
static unsigned int display_count;
#define MAX_DISPLAY_COUNT (sizeof(display_string) - 8)
#define CPUCTR_IMASKBIT (0x100 << MIPSCPU_INT_CPUCTR)
static unsigned int timer_tick_count;
static int mips_cpu_timer_irq;
extern void smtc_timer_broadcast(int);
static inline void scroll_display_message(void)
{
if ((timer_tick_count++ % HZ) == 0) {
mips_display_message(&display_string[display_count++]);
if (display_count == MAX_DISPLAY_COUNT)
display_count = 0;
}
}
static void mips_timer_dispatch(void)
{
do_IRQ(mips_cpu_timer_irq);
@ -143,7 +117,6 @@ irqreturn_t mips_timer_interrupt(int irq, void *dev_id)
if (cpu_data[cpu].vpe_id == 0) {
timer_interrupt(irq, NULL);
smtc_timer_broadcast(cpu_data[cpu].vpe_id);
scroll_display_message();
} else {
write_c0_compare(read_c0_count() +
(mips_hpt_frequency/HZ));
@ -167,8 +140,6 @@ irqreturn_t mips_timer_interrupt(int irq, void *dev_id)
/* we keep interrupt disabled all the time */
if (!r2 || (read_c0_cause() & (1 << 30)))
timer_interrupt(irq, NULL);
scroll_display_message();
} else {
/* Everyone else needs to reset the timer int here as
ll_local_timer_interrupt doesn't */
@ -262,6 +233,8 @@ void __init mips_time_init(void)
(est_freq%1000000)*100/1000000);
cpu_khz = est_freq / 1000;
mips_scroll_message();
}
void __init plat_timer_setup(struct irqaction *irq)

6
arch/mips/mips-boards/malta/malta_setup.c
View file

@ -56,6 +56,12 @@ const char *get_system_type(void)
return "MIPS Malta";
}
#if defined(CONFIG_MIPS_MT_SMTC)
const char display_string[] = " SMTC LINUX ON MALTA ";
#else
const char display_string[] = " LINUX ON MALTA ";
#endif /* CONFIG_MIPS_MT_SMTC */
#ifdef CONFIG_BLK_DEV_FD
void __init fd_activate(void)
{

2
arch/mips/mips-boards/sead/sead_setup.c
View file

@ -43,6 +43,8 @@ const char *get_system_type(void)
return "MIPS SEAD";
}
const char display_string[] = " LINUX ON SEAD ";
void __init plat_mem_setup(void)
{
ioport_resource.end = 0x7fffffff;

5
arch/mips/mm/dma-default.c
View file

@ -168,8 +168,9 @@ int dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
addr = (unsigned long) page_address(sg->page);
if (!plat_device_is_coherent(dev) && addr)
__dma_sync(addr + sg->offset, sg->length, direction);
sg->dma_address = plat_map_dma_mem_page(dev, sg->page) +
sg->offset;
sg->dma_address = plat_map_dma_mem(dev,
(void *)(addr + sg->offset),
sg->length);
}
return nents;

2
arch/mips/qemu/q-irq.c
View file

@ -7,8 +7,6 @@
#include <asm/system.h>
#include <asm/time.h>
extern asmlinkage void qemu_handle_int(void);
asmlinkage void plat_irq_dispatch(void)
{
unsigned int pending = read_c0_status() & read_c0_cause();

18
arch/mips/sni/pcimt.c
View file

@ -6,7 +6,7 @@
* for more details.
*
* Copyright (C) 1996, 97, 98, 2000, 03, 04, 06 Ralf Baechle (ralf@linux-mips.org)
* Copyright (C) 2006 Thomas Bogendoerfer (tsbogend@alpha.franken.de)
* Copyright (C) 2006,2007 Thomas Bogendoerfer (tsbogend@alpha.franken.de)
*/
#include <linux/init.h>
@ -131,6 +131,19 @@ static struct resource pcimt_io_resources[] = {
}
};
static struct resource pcimt_mem_resources[] = {
{
/*
* this region should only be 4 bytes long,
* but it's 16MB on all RM300C I've checked
*/
.start = 0x1a000000,
.end = 0x1affffff,
.name = "PCI INT ACK",
.flags = IORESOURCE_BUSY
}
};
static struct resource sni_mem_resource = {
.start = 0x18000000UL,
.end = 0x1fbfffffUL,
@ -145,6 +158,9 @@ static void __init sni_pcimt_resource_init(void)
/* request I/O space for devices used on all i[345]86 PCs */
for (i = 0; i < ARRAY_SIZE(pcimt_io_resources); i++)
request_resource(&sni_io_resource, pcimt_io_resources + i);
/* request MEM space for devices used on all i[345]86 PCs */
for (i = 0; i < ARRAY_SIZE(pcimt_mem_resources); i++)
request_resource(&sni_mem_resource, pcimt_mem_resources + i);
}
extern struct pci_ops sni_pcimt_ops;

33
arch/mips/sni/setup.c
View file

@ -6,7 +6,7 @@
* for more details.
*
* Copyright (C) 1996, 97, 98, 2000, 03, 04, 06 Ralf Baechle (ralf@linux-mips.org)
* Copyright (C) 2006 Thomas Bogendoerfer (tsbogend@alpha.franken.de)
* Copyright (C) 2006,2007 Thomas Bogendoerfer (tsbogend@alpha.franken.de)
*/
#include <linux/eisa.h>
#include <linux/init.h>
@ -92,3 +92,34 @@ void __init plat_mem_setup(void)
sni_display_setup();
}
#if CONFIG_PCI
#include <linux/pci.h>
#include <video/vga.h>
#include <video/cirrus.h>
static void __devinit quirk_cirrus_ram_size(struct pci_dev *dev)
{
u16 cmd;
/*
* firmware doesn't set the ram size correct, so we
* need to do it here, otherwise we get screen corruption
* on older Cirrus chips
*/
pci_read_config_word (dev, PCI_COMMAND, &cmd);
if ((cmd & (PCI_COMMAND_IO|PCI_COMMAND_MEMORY))
== (PCI_COMMAND_IO|PCI_COMMAND_MEMORY)) {
vga_wseq (NULL, CL_SEQR6, 0x12); /* unlock all extension registers */
vga_wseq (NULL, CL_SEQRF, 0x18);
}
}
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_CIRRUS, PCI_DEVICE_ID_CIRRUS_5434_8,
quirk_cirrus_ram_size);
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_CIRRUS, PCI_DEVICE_ID_CIRRUS_5436,
quirk_cirrus_ram_size);
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_CIRRUS, PCI_DEVICE_ID_CIRRUS_5446,
quirk_cirrus_ram_size);
#endif

15
include/asm-mips/asmmacro.h
View file

@ -52,21 +52,6 @@
.endm
#endif /* CONFIG_MIPS_MT_SMTC */
#ifdef CONFIG_CPU_SB1
.macro fpu_enable_hazard
.set push
.set noreorder
.set mips2
SSNOP
bnezl $0, .+4
SSNOP
.set pop
.endm
#else
.macro fpu_enable_hazard
.endm
#endif
/*
* Temporary until all gas have MT ASE support
*/

1
include/asm-mips/mips-boards/prom.h
View file

@ -33,6 +33,7 @@ extern void prom_meminit(void);
extern void prom_fixup_mem_map(unsigned long start_mem, unsigned long end_mem);
extern void mips_display_message(const char *str);
extern void mips_display_word(unsigned int num);
extern void mips_scroll_message(void);
extern int get_ethernet_addr(char *ethernet_addr);
/* Memory descriptor management. */

1
include/asm-mips/unistd.h
View file

@ -949,7 +949,6 @@
#define __ARCH_WANT_SYS_UTIME
#define __ARCH_WANT_SYS_WAITPID
#define __ARCH_WANT_SYS_SOCKETCALL
#define __ARCH_WANT_SYS_FADVISE64
#define __ARCH_WANT_SYS_GETPGRP
#define __ARCH_WANT_SYS_LLSEEK
#define __ARCH_WANT_SYS_NICE