stmmac: reorganise class operations.
This patch reorganises the internal stmmac ops structure. The stmmac_ops has been splitted into other three structures named: stmmac_ops stmmac_dma_ops stmmac_desc_ops This makes the code more clear and also helps the next work to make the driver more generic. Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
parent
65818fa744
commit
db98a0b001
7 changed files with 166 additions and 150 deletions
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@ -239,25 +239,11 @@ static inline void stmmac_get_mac_addr(unsigned long ioaddr,
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return;
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}
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struct stmmac_ops {
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/* MAC core initialization */
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void (*core_init) (unsigned long ioaddr) ____cacheline_aligned;
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/* DMA core initialization */
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int (*dma_init) (unsigned long ioaddr, int pbl, u32 dma_tx, u32 dma_rx);
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/* Dump MAC registers */
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void (*dump_mac_regs) (unsigned long ioaddr);
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/* Dump DMA registers */
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void (*dump_dma_regs) (unsigned long ioaddr);
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/* Set tx/rx threshold in the csr6 register
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* An invalid value enables the store-and-forward mode */
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void (*dma_mode) (unsigned long ioaddr, int txmode, int rxmode);
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/* To track extra statistic (if supported) */
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void (*dma_diagnostic_fr) (void *data, struct stmmac_extra_stats *x,
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unsigned long ioaddr);
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/* RX descriptor ring initialization */
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struct stmmac_desc_ops {
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/* DMA RX descriptor ring initialization */
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void (*init_rx_desc) (struct dma_desc *p, unsigned int ring_size,
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int disable_rx_ic);
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/* TX descriptor ring initialization */
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int disable_rx_ic);
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/* DMA TX descriptor ring initialization */
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void (*init_tx_desc) (struct dma_desc *p, unsigned int ring_size);
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/* Invoked by the xmit function to prepare the tx descriptor */
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@ -281,7 +267,6 @@ struct stmmac_ops {
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/* Get the buffer size from the descriptor */
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int (*get_tx_len) (struct dma_desc *p);
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/* Handle extra events on specific interrupts hw dependent */
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void (*host_irq_status) (unsigned long ioaddr);
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int (*get_rx_owner) (struct dma_desc *p);
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void (*set_rx_owner) (struct dma_desc *p);
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/* Get the receive frame size */
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@ -289,6 +274,28 @@ struct stmmac_ops {
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/* Return the reception status looking at the RDES1 */
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int (*rx_status) (void *data, struct stmmac_extra_stats *x,
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struct dma_desc *p);
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};
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struct stmmac_dma_ops {
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/* DMA core initialization */
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int (*init) (unsigned long ioaddr, int pbl, u32 dma_tx, u32 dma_rx);
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/* Dump DMA registers */
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void (*dump_regs) (unsigned long ioaddr);
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/* Set tx/rx threshold in the csr6 register
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* An invalid value enables the store-and-forward mode */
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void (*dma_mode) (unsigned long ioaddr, int txmode, int rxmode);
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/* To track extra statistic (if supported) */
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void (*dma_diagnostic_fr) (void *data, struct stmmac_extra_stats *x,
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unsigned long ioaddr);
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};
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struct stmmac_ops {
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/* MAC core initialization */
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void (*core_init) (unsigned long ioaddr) ____cacheline_aligned;
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/* Dump MAC registers */
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void (*dump_regs) (unsigned long ioaddr);
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/* Handle extra events on specific interrupts hw dependent */
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void (*host_irq_status) (unsigned long ioaddr);
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/* Multicast filter setting */
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void (*set_filter) (struct net_device *dev);
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/* Flow control setting */
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@ -298,9 +305,9 @@ struct stmmac_ops {
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void (*pmt) (unsigned long ioaddr, unsigned long mode);
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/* Set/Get Unicast MAC addresses */
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void (*set_umac_addr) (unsigned long ioaddr, unsigned char *addr,
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unsigned int reg_n);
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unsigned int reg_n);
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void (*get_umac_addr) (unsigned long ioaddr, unsigned char *addr,
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unsigned int reg_n);
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unsigned int reg_n);
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};
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struct mac_link {
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@ -314,16 +321,13 @@ struct mii_regs {
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unsigned int data; /* MII Data */
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};
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struct hw_cap {
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unsigned int version; /* Core Version register (GMAC) */
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unsigned int pmt; /* Power-Down mode (GMAC) */
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struct mac_link link;
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struct mii_regs mii;
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};
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struct mac_device_info {
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struct hw_cap hw;
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struct stmmac_ops *ops;
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struct stmmac_ops *mac;
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struct stmmac_desc_ops *desc;
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struct stmmac_dma_ops *dma;
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unsigned int pmt; /* support Power-Down */
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struct mii_regs mii; /* MII register Addresses */
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struct mac_link link;
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};
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struct mac_device_info *gmac_setup(unsigned long addr);
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@ -630,19 +630,28 @@ static int gmac_get_rx_frame_len(struct dma_desc *p)
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return p->des01.erx.frame_length;
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}
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struct stmmac_ops gmac_driver = {
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struct stmmac_ops gmac_ops = {
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.core_init = gmac_core_init,
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.dump_mac_regs = gmac_dump_regs,
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.dma_init = gmac_dma_init,
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.dump_dma_regs = gmac_dump_dma_regs,
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.dma_mode = gmac_dma_operation_mode,
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.dma_diagnostic_fr = gmac_dma_diagnostic_fr,
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.tx_status = gmac_get_tx_frame_status,
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.rx_status = gmac_get_rx_frame_status,
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.get_tx_len = gmac_get_tx_len,
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.dump_regs = gmac_dump_regs,
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.host_irq_status = gmac_irq_status,
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.set_filter = gmac_set_filter,
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.flow_ctrl = gmac_flow_ctrl,
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.pmt = gmac_pmt,
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.set_umac_addr = gmac_set_umac_addr,
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.get_umac_addr = gmac_get_umac_addr,
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};
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struct stmmac_dma_ops gmac_dma_ops = {
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.init = gmac_dma_init,
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.dump_regs = gmac_dump_dma_regs,
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.dma_mode = gmac_dma_operation_mode,
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.dma_diagnostic_fr = gmac_dma_diagnostic_fr,
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};
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struct stmmac_desc_ops gmac_desc_ops = {
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.tx_status = gmac_get_tx_frame_status,
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.rx_status = gmac_get_rx_frame_status,
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.get_tx_len = gmac_get_tx_len,
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.init_rx_desc = gmac_init_rx_desc,
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.init_tx_desc = gmac_init_tx_desc,
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.get_tx_owner = gmac_get_tx_owner,
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@ -655,9 +664,6 @@ struct stmmac_ops gmac_driver = {
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.set_tx_owner = gmac_set_tx_owner,
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.set_rx_owner = gmac_set_rx_owner,
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.get_rx_frame_len = gmac_get_rx_frame_len,
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.host_irq_status = gmac_irq_status,
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.set_umac_addr = gmac_set_umac_addr,
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.get_umac_addr = gmac_get_umac_addr,
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};
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struct mac_device_info *gmac_setup(unsigned long ioaddr)
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@ -670,13 +676,16 @@ struct mac_device_info *gmac_setup(unsigned long ioaddr)
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mac = kzalloc(sizeof(const struct mac_device_info), GFP_KERNEL);
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mac->ops = &gmac_driver;
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mac->hw.pmt = PMT_SUPPORTED;
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mac->hw.link.port = GMAC_CONTROL_PS;
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mac->hw.link.duplex = GMAC_CONTROL_DM;
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mac->hw.link.speed = GMAC_CONTROL_FES;
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mac->hw.mii.addr = GMAC_MII_ADDR;
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mac->hw.mii.data = GMAC_MII_DATA;
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mac->mac = &gmac_ops;
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mac->desc = &gmac_desc_ops;
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mac->dma = &gmac_dma_ops;
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mac->pmt = PMT_SUPPORTED;
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mac->link.port = GMAC_CONTROL_PS;
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mac->link.duplex = GMAC_CONTROL_DM;
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mac->link.speed = GMAC_CONTROL_FES;
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mac->mii.addr = GMAC_MII_ADDR;
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mac->mii.data = GMAC_MII_DATA;
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return mac;
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}
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@ -467,19 +467,28 @@ static int mac100_get_rx_frame_len(struct dma_desc *p)
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return p->des01.rx.frame_length;
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}
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struct stmmac_ops mac100_driver = {
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struct stmmac_ops mac100_ops = {
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.core_init = mac100_core_init,
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.dump_mac_regs = mac100_dump_mac_regs,
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.dma_init = mac100_dma_init,
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.dump_dma_regs = mac100_dump_dma_regs,
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.dma_mode = mac100_dma_operation_mode,
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.dma_diagnostic_fr = mac100_dma_diagnostic_fr,
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.tx_status = mac100_get_tx_frame_status,
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.rx_status = mac100_get_rx_frame_status,
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.get_tx_len = mac100_get_tx_len,
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.dump_regs = mac100_dump_mac_regs,
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.host_irq_status = mac100_irq_status,
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.set_filter = mac100_set_filter,
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.flow_ctrl = mac100_flow_ctrl,
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.pmt = mac100_pmt,
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.set_umac_addr = mac100_set_umac_addr,
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.get_umac_addr = mac100_get_umac_addr,
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};
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struct stmmac_dma_ops mac100_dma_ops = {
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.init = mac100_dma_init,
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.dump_regs = mac100_dump_dma_regs,
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.dma_mode = mac100_dma_operation_mode,
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.dma_diagnostic_fr = mac100_dma_diagnostic_fr,
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};
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struct stmmac_desc_ops mac100_desc_ops = {
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.tx_status = mac100_get_tx_frame_status,
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.rx_status = mac100_get_rx_frame_status,
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.get_tx_len = mac100_get_tx_len,
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.init_rx_desc = mac100_init_rx_desc,
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.init_tx_desc = mac100_init_tx_desc,
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.get_tx_owner = mac100_get_tx_owner,
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@ -492,9 +501,6 @@ struct stmmac_ops mac100_driver = {
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.set_tx_owner = mac100_set_tx_owner,
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.set_rx_owner = mac100_set_rx_owner,
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.get_rx_frame_len = mac100_get_rx_frame_len,
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.host_irq_status = mac100_irq_status,
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.set_umac_addr = mac100_set_umac_addr,
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.get_umac_addr = mac100_get_umac_addr,
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};
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struct mac_device_info *mac100_setup(unsigned long ioaddr)
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@ -505,13 +511,16 @@ struct mac_device_info *mac100_setup(unsigned long ioaddr)
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pr_info("\tMAC 10/100\n");
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mac->ops = &mac100_driver;
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mac->hw.pmt = PMT_NOT_SUPPORTED;
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mac->hw.link.port = MAC_CONTROL_PS;
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mac->hw.link.duplex = MAC_CONTROL_F;
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mac->hw.link.speed = 0;
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mac->hw.mii.addr = MAC_MII_ADDR;
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mac->hw.mii.data = MAC_MII_DATA;
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mac->mac = &mac100_ops;
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mac->desc = &mac100_desc_ops;
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mac->dma = &mac100_dma_ops;
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mac->pmt = PMT_NOT_SUPPORTED;
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mac->link.port = MAC_CONTROL_PS;
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mac->link.duplex = MAC_CONTROL_F;
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mac->link.speed = 0;
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mac->mii.addr = MAC_MII_ADDR;
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mac->mii.data = MAC_MII_DATA;
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return mac;
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}
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@ -58,7 +58,7 @@ struct stmmac_priv {
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int rx_csum;
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unsigned int dma_buf_sz;
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struct device *device;
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struct mac_device_info *mac_type;
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struct mac_device_info *hw;
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struct stmmac_extra_stats xstats;
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struct napi_struct napi;
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@ -268,8 +268,8 @@ stmmac_set_pauseparam(struct net_device *netdev,
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}
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} else {
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unsigned long ioaddr = netdev->base_addr;
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priv->mac_type->ops->flow_ctrl(ioaddr, phy->duplex,
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priv->flow_ctrl, priv->pause);
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priv->hw->mac->flow_ctrl(ioaddr, phy->duplex,
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priv->flow_ctrl, priv->pause);
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}
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spin_unlock(&priv->lock);
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return ret;
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@ -283,8 +283,8 @@ static void stmmac_get_ethtool_stats(struct net_device *dev,
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int i;
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/* Update HW stats if supported */
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priv->mac_type->ops->dma_diagnostic_fr(&dev->stats, &priv->xstats,
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ioaddr);
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priv->hw->dma->dma_diagnostic_fr(&dev->stats, (void *) &priv->xstats,
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ioaddr);
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for (i = 0; i < STMMAC_STATS_LEN; i++) {
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char *p = (char *)priv + stmmac_gstrings_stats[i].stat_offset;
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@ -225,38 +225,34 @@ static void stmmac_adjust_link(struct net_device *dev)
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if (phydev->duplex != priv->oldduplex) {
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new_state = 1;
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if (!(phydev->duplex))
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ctrl &= ~priv->mac_type->hw.link.duplex;
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ctrl &= ~priv->hw->link.duplex;
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else
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ctrl |= priv->mac_type->hw.link.duplex;
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ctrl |= priv->hw->link.duplex;
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priv->oldduplex = phydev->duplex;
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}
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/* Flow Control operation */
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if (phydev->pause)
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priv->mac_type->ops->flow_ctrl(ioaddr, phydev->duplex,
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fc, pause_time);
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priv->hw->mac->flow_ctrl(ioaddr, phydev->duplex,
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fc, pause_time);
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if (phydev->speed != priv->speed) {
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new_state = 1;
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switch (phydev->speed) {
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case 1000:
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if (likely(priv->is_gmac))
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ctrl &= ~priv->mac_type->hw.link.port;
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ctrl &= ~priv->hw->link.port;
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break;
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case 100:
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case 10:
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if (priv->is_gmac) {
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ctrl |= priv->mac_type->hw.link.port;
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ctrl |= priv->hw->link.port;
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if (phydev->speed == SPEED_100) {
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ctrl |=
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priv->mac_type->hw.link.
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speed;
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ctrl |= priv->hw->link.speed;
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} else {
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ctrl &=
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~(priv->mac_type->hw.
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link.speed);
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ctrl &= ~(priv->hw->link.speed);
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}
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} else {
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ctrl &= ~priv->mac_type->hw.link.port;
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ctrl &= ~priv->hw->link.port;
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}
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if (likely(priv->fix_mac_speed))
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priv->fix_mac_speed(priv->bsp_priv,
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@ -509,8 +505,8 @@ static void init_dma_desc_rings(struct net_device *dev)
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priv->cur_tx = 0;
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/* Clear the Rx/Tx descriptors */
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priv->mac_type->ops->init_rx_desc(priv->dma_rx, rxsize, dis_ic);
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priv->mac_type->ops->init_tx_desc(priv->dma_tx, txsize);
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priv->hw->desc->init_rx_desc(priv->dma_rx, rxsize, dis_ic);
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priv->hw->desc->init_tx_desc(priv->dma_tx, txsize);
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if (netif_msg_hw(priv)) {
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pr_info("RX descriptor ring:\n");
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@ -545,8 +541,8 @@ static void dma_free_tx_skbufs(struct stmmac_priv *priv)
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struct dma_desc *p = priv->dma_tx + i;
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if (p->des2)
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dma_unmap_single(priv->device, p->des2,
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priv->mac_type->ops->get_tx_len(p),
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DMA_TO_DEVICE);
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priv->hw->desc->get_tx_len(p),
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DMA_TO_DEVICE);
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dev_kfree_skb_any(priv->tx_skbuff[i]);
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priv->tx_skbuff[i] = NULL;
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}
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@ -630,18 +626,18 @@ static void stmmac_dma_operation_mode(struct stmmac_priv *priv)
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{
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if (!priv->is_gmac) {
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/* MAC 10/100 */
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priv->mac_type->ops->dma_mode(priv->dev->base_addr, tc, 0);
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priv->hw->dma->dma_mode(priv->dev->base_addr, tc, 0);
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priv->tx_coe = NO_HW_CSUM;
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} else {
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if ((priv->dev->mtu <= ETH_DATA_LEN) && (tx_coe)) {
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priv->mac_type->ops->dma_mode(priv->dev->base_addr,
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SF_DMA_MODE, SF_DMA_MODE);
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priv->hw->dma->dma_mode(priv->dev->base_addr,
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SF_DMA_MODE, SF_DMA_MODE);
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tc = SF_DMA_MODE;
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priv->tx_coe = HW_CSUM;
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} else {
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/* Checksum computation is performed in software. */
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priv->mac_type->ops->dma_mode(priv->dev->base_addr, tc,
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SF_DMA_MODE);
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priv->hw->dma->dma_mode(priv->dev->base_addr, tc,
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SF_DMA_MODE);
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priv->tx_coe = NO_HW_CSUM;
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}
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}
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@ -749,16 +745,16 @@ static void stmmac_tx(struct stmmac_priv *priv)
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struct dma_desc *p = priv->dma_tx + entry;
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/* Check if the descriptor is owned by the DMA. */
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if (priv->mac_type->ops->get_tx_owner(p))
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if (priv->hw->desc->get_tx_owner(p))
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break;
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/* Verify tx error by looking at the last segment */
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last = priv->mac_type->ops->get_tx_ls(p);
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last = priv->hw->desc->get_tx_ls(p);
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if (likely(last)) {
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int tx_error =
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priv->mac_type->ops->tx_status(&priv->dev->stats,
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&priv->xstats,
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p, ioaddr);
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priv->hw->desc->tx_status(&priv->dev->stats,
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&priv->xstats, p,
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ioaddr);
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if (likely(tx_error == 0)) {
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priv->dev->stats.tx_packets++;
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priv->xstats.tx_pkt_n++;
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||||
|
@ -770,7 +766,7 @@ static void stmmac_tx(struct stmmac_priv *priv)
|
|||
|
||||
if (likely(p->des2))
|
||||
dma_unmap_single(priv->device, p->des2,
|
||||
priv->mac_type->ops->get_tx_len(p),
|
||||
priv->hw->desc->get_tx_len(p),
|
||||
DMA_TO_DEVICE);
|
||||
if (unlikely(p->des3))
|
||||
p->des3 = 0;
|
||||
|
@ -791,7 +787,7 @@ static void stmmac_tx(struct stmmac_priv *priv)
|
|||
priv->tx_skbuff[entry] = NULL;
|
||||
}
|
||||
|
||||
priv->mac_type->ops->release_tx_desc(p);
|
||||
priv->hw->desc->release_tx_desc(p);
|
||||
|
||||
entry = (++priv->dirty_tx) % txsize;
|
||||
}
|
||||
|
@ -833,7 +829,7 @@ static int stmmac_has_work(struct stmmac_priv *priv)
|
|||
unsigned int has_work = 0;
|
||||
int rxret, tx_work = 0;
|
||||
|
||||
rxret = priv->mac_type->ops->get_rx_owner(priv->dma_rx +
|
||||
rxret = priv->hw->desc->get_rx_owner(priv->dma_rx +
|
||||
(priv->cur_rx % priv->dma_rx_size));
|
||||
|
||||
if (priv->dirty_tx != priv->cur_tx)
|
||||
|
@ -886,7 +882,7 @@ static void stmmac_tx_err(struct stmmac_priv *priv)
|
|||
|
||||
stmmac_dma_stop_tx(priv->dev->base_addr);
|
||||
dma_free_tx_skbufs(priv);
|
||||
priv->mac_type->ops->init_tx_desc(priv->dma_tx, priv->dma_tx_size);
|
||||
priv->hw->desc->init_tx_desc(priv->dma_tx, priv->dma_tx_size);
|
||||
priv->dirty_tx = 0;
|
||||
priv->cur_tx = 0;
|
||||
stmmac_dma_start_tx(priv->dev->base_addr);
|
||||
|
@ -926,8 +922,8 @@ static void stmmac_dma_interrupt(struct net_device *dev)
|
|||
if (unlikely(tc != SF_DMA_MODE) && (tc <= 256)) {
|
||||
/* Try to bump up the threshold */
|
||||
tc += 64;
|
||||
priv->mac_type->ops->dma_mode(ioaddr, tc,
|
||||
SF_DMA_MODE);
|
||||
priv->hw->dma->dma_mode(ioaddr, tc,
|
||||
SF_DMA_MODE);
|
||||
priv->xstats.threshold = tc;
|
||||
}
|
||||
stmmac_tx_err(priv);
|
||||
|
@ -1059,20 +1055,20 @@ static int stmmac_open(struct net_device *dev)
|
|||
init_dma_desc_rings(dev);
|
||||
|
||||
/* DMA initialization and SW reset */
|
||||
if (unlikely(priv->mac_type->ops->dma_init(ioaddr,
|
||||
priv->pbl, priv->dma_tx_phy, priv->dma_rx_phy) < 0)) {
|
||||
if (unlikely(priv->hw->dma->init(ioaddr, priv->pbl, priv->dma_tx_phy,
|
||||
priv->dma_rx_phy) < 0)) {
|
||||
|
||||
pr_err("%s: DMA initialization failed\n", __func__);
|
||||
return -1;
|
||||
}
|
||||
|
||||
/* Copy the MAC addr into the HW */
|
||||
priv->mac_type->ops->set_umac_addr(ioaddr, dev->dev_addr, 0);
|
||||
priv->hw->mac->set_umac_addr(ioaddr, dev->dev_addr, 0);
|
||||
/* If required, perform hw setup of the bus. */
|
||||
if (priv->bus_setup)
|
||||
priv->bus_setup(ioaddr);
|
||||
/* Initialize the MAC Core */
|
||||
priv->mac_type->ops->core_init(ioaddr);
|
||||
priv->hw->mac->core_init(ioaddr);
|
||||
|
||||
priv->shutdown = 0;
|
||||
|
||||
|
@ -1101,8 +1097,8 @@ static int stmmac_open(struct net_device *dev)
|
|||
#endif
|
||||
/* Dump DMA/MAC registers */
|
||||
if (netif_msg_hw(priv)) {
|
||||
priv->mac_type->ops->dump_mac_regs(ioaddr);
|
||||
priv->mac_type->ops->dump_dma_regs(ioaddr);
|
||||
priv->hw->mac->dump_regs(ioaddr);
|
||||
priv->hw->dma->dump_regs(ioaddr);
|
||||
}
|
||||
|
||||
if (priv->phydev)
|
||||
|
@ -1218,8 +1214,8 @@ static unsigned int stmmac_handle_jumbo_frames(struct sk_buff *skb,
|
|||
desc->des2 = dma_map_single(priv->device, skb->data,
|
||||
BUF_SIZE_8KiB, DMA_TO_DEVICE);
|
||||
desc->des3 = desc->des2 + BUF_SIZE_4KiB;
|
||||
priv->mac_type->ops->prepare_tx_desc(desc, 1, BUF_SIZE_8KiB,
|
||||
csum_insertion);
|
||||
priv->hw->desc->prepare_tx_desc(desc, 1, BUF_SIZE_8KiB,
|
||||
csum_insertion);
|
||||
|
||||
entry = (++priv->cur_tx) % txsize;
|
||||
desc = priv->dma_tx + entry;
|
||||
|
@ -1228,16 +1224,17 @@ static unsigned int stmmac_handle_jumbo_frames(struct sk_buff *skb,
|
|||
skb->data + BUF_SIZE_8KiB,
|
||||
buf2_size, DMA_TO_DEVICE);
|
||||
desc->des3 = desc->des2 + BUF_SIZE_4KiB;
|
||||
priv->mac_type->ops->prepare_tx_desc(desc, 0,
|
||||
buf2_size, csum_insertion);
|
||||
priv->mac_type->ops->set_tx_owner(desc);
|
||||
priv->hw->desc->prepare_tx_desc(desc, 0, buf2_size,
|
||||
csum_insertion);
|
||||
priv->hw->desc->set_tx_owner(desc);
|
||||
|
||||
priv->tx_skbuff[entry] = NULL;
|
||||
} else {
|
||||
desc->des2 = dma_map_single(priv->device, skb->data,
|
||||
nopaged_len, DMA_TO_DEVICE);
|
||||
desc->des3 = desc->des2 + BUF_SIZE_4KiB;
|
||||
priv->mac_type->ops->prepare_tx_desc(desc, 1, nopaged_len,
|
||||
csum_insertion);
|
||||
priv->hw->desc->prepare_tx_desc(desc, 1, nopaged_len,
|
||||
csum_insertion);
|
||||
}
|
||||
return entry;
|
||||
}
|
||||
|
@ -1305,8 +1302,8 @@ static netdev_tx_t stmmac_xmit(struct sk_buff *skb, struct net_device *dev)
|
|||
unsigned int nopaged_len = skb_headlen(skb);
|
||||
desc->des2 = dma_map_single(priv->device, skb->data,
|
||||
nopaged_len, DMA_TO_DEVICE);
|
||||
priv->mac_type->ops->prepare_tx_desc(desc, 1, nopaged_len,
|
||||
csum_insertion);
|
||||
priv->hw->desc->prepare_tx_desc(desc, 1, nopaged_len,
|
||||
csum_insertion);
|
||||
}
|
||||
|
||||
for (i = 0; i < nfrags; i++) {
|
||||
|
@ -1321,21 +1318,20 @@ static netdev_tx_t stmmac_xmit(struct sk_buff *skb, struct net_device *dev)
|
|||
frag->page_offset,
|
||||
len, DMA_TO_DEVICE);
|
||||
priv->tx_skbuff[entry] = NULL;
|
||||
priv->mac_type->ops->prepare_tx_desc(desc, 0, len,
|
||||
csum_insertion);
|
||||
priv->mac_type->ops->set_tx_owner(desc);
|
||||
priv->hw->desc->prepare_tx_desc(desc, 0, len, csum_insertion);
|
||||
priv->hw->desc->set_tx_owner(desc);
|
||||
}
|
||||
|
||||
/* Interrupt on completition only for the latest segment */
|
||||
priv->mac_type->ops->close_tx_desc(desc);
|
||||
priv->hw->desc->close_tx_desc(desc);
|
||||
|
||||
#ifdef CONFIG_STMMAC_TIMER
|
||||
/* Clean IC while using timer */
|
||||
if (likely(priv->tm->enable))
|
||||
priv->mac_type->ops->clear_tx_ic(desc);
|
||||
priv->hw->desc->clear_tx_ic(desc);
|
||||
#endif
|
||||
/* To avoid raise condition */
|
||||
priv->mac_type->ops->set_tx_owner(first);
|
||||
priv->hw->desc->set_tx_owner(first);
|
||||
|
||||
priv->cur_tx++;
|
||||
|
||||
|
@ -1395,7 +1391,7 @@ static inline void stmmac_rx_refill(struct stmmac_priv *priv)
|
|||
}
|
||||
RX_DBG(KERN_INFO "\trefill entry #%d\n", entry);
|
||||
}
|
||||
priv->mac_type->ops->set_rx_owner(p + entry);
|
||||
priv->hw->desc->set_rx_owner(p + entry);
|
||||
}
|
||||
return;
|
||||
}
|
||||
|
@ -1416,7 +1412,7 @@ static int stmmac_rx(struct stmmac_priv *priv, int limit)
|
|||
}
|
||||
#endif
|
||||
count = 0;
|
||||
while (!priv->mac_type->ops->get_rx_owner(p)) {
|
||||
while (!priv->hw->desc->get_rx_owner(p)) {
|
||||
int status;
|
||||
|
||||
if (count >= limit)
|
||||
|
@ -1429,15 +1425,14 @@ static int stmmac_rx(struct stmmac_priv *priv, int limit)
|
|||
prefetch(p_next);
|
||||
|
||||
/* read the status of the incoming frame */
|
||||
status = (priv->mac_type->ops->rx_status(&priv->dev->stats,
|
||||
&priv->xstats, p));
|
||||
status = (priv->hw->desc->rx_status(&priv->dev->stats,
|
||||
&priv->xstats, p));
|
||||
if (unlikely(status == discard_frame))
|
||||
priv->dev->stats.rx_errors++;
|
||||
else {
|
||||
struct sk_buff *skb;
|
||||
/* Length should omit the CRC */
|
||||
int frame_len =
|
||||
priv->mac_type->ops->get_rx_frame_len(p) - 4;
|
||||
int frame_len = priv->hw->desc->get_rx_frame_len(p) - 4;
|
||||
|
||||
#ifdef STMMAC_RX_DEBUG
|
||||
if (frame_len > ETH_FRAME_LEN)
|
||||
|
@ -1573,7 +1568,7 @@ static void stmmac_multicast_list(struct net_device *dev)
|
|||
struct stmmac_priv *priv = netdev_priv(dev);
|
||||
|
||||
spin_lock(&priv->lock);
|
||||
priv->mac_type->ops->set_filter(dev);
|
||||
priv->hw->mac->set_filter(dev);
|
||||
spin_unlock(&priv->lock);
|
||||
return;
|
||||
}
|
||||
|
@ -1627,7 +1622,7 @@ static irqreturn_t stmmac_interrupt(int irq, void *dev_id)
|
|||
if (priv->is_gmac) {
|
||||
unsigned long ioaddr = dev->base_addr;
|
||||
/* To handle GMAC own interrupts */
|
||||
priv->mac_type->ops->host_irq_status(ioaddr);
|
||||
priv->hw->mac->host_irq_status(ioaddr);
|
||||
}
|
||||
stmmac_dma_interrupt(dev);
|
||||
|
||||
|
@ -1748,7 +1743,7 @@ static int stmmac_probe(struct net_device *dev)
|
|||
netif_napi_add(dev, &priv->napi, stmmac_poll, 64);
|
||||
|
||||
/* Get the MAC address */
|
||||
priv->mac_type->ops->get_umac_addr(dev->base_addr, dev->dev_addr, 0);
|
||||
priv->hw->mac->get_umac_addr(dev->base_addr, dev->dev_addr, 0);
|
||||
|
||||
if (!is_valid_ether_addr(dev->dev_addr))
|
||||
pr_warning("\tno valid MAC address;"
|
||||
|
@ -1790,9 +1785,9 @@ static int stmmac_mac_device_setup(struct net_device *dev)
|
|||
if (!device)
|
||||
return -ENOMEM;
|
||||
|
||||
priv->mac_type = device;
|
||||
priv->hw = device;
|
||||
|
||||
priv->wolenabled = priv->mac_type->hw.pmt; /* PMT supported */
|
||||
priv->wolenabled = priv->hw->pmt; /* PMT supported */
|
||||
if (priv->wolenabled == PMT_SUPPORTED)
|
||||
priv->wolopts = WAKE_MAGIC; /* Magic Frame */
|
||||
|
||||
|
@ -2048,18 +2043,17 @@ static int stmmac_suspend(struct platform_device *pdev, pm_message_t state)
|
|||
stmmac_dma_stop_tx(dev->base_addr);
|
||||
stmmac_dma_stop_rx(dev->base_addr);
|
||||
/* Clear the Rx/Tx descriptors */
|
||||
priv->mac_type->ops->init_rx_desc(priv->dma_rx,
|
||||
priv->dma_rx_size, dis_ic);
|
||||
priv->mac_type->ops->init_tx_desc(priv->dma_tx,
|
||||
priv->dma_tx_size);
|
||||
priv->hw->desc->init_rx_desc(priv->dma_rx, priv->dma_rx_size,
|
||||
dis_ic);
|
||||
priv->hw->desc->init_tx_desc(priv->dma_tx, priv->dma_tx_size);
|
||||
|
||||
stmmac_mac_disable_tx(dev->base_addr);
|
||||
|
||||
if (device_may_wakeup(&(pdev->dev))) {
|
||||
/* Enable Power down mode by programming the PMT regs */
|
||||
if (priv->wolenabled == PMT_SUPPORTED)
|
||||
priv->mac_type->ops->pmt(dev->base_addr,
|
||||
priv->wolopts);
|
||||
priv->hw->mac->pmt(dev->base_addr,
|
||||
priv->wolopts);
|
||||
} else {
|
||||
stmmac_mac_disable_rx(dev->base_addr);
|
||||
}
|
||||
|
@ -2100,7 +2094,7 @@ static int stmmac_resume(struct platform_device *pdev)
|
|||
* from another devices (e.g. serial console). */
|
||||
if (device_may_wakeup(&(pdev->dev)))
|
||||
if (priv->wolenabled == PMT_SUPPORTED)
|
||||
priv->mac_type->ops->pmt(dev->base_addr, 0);
|
||||
priv->hw->mac->pmt(dev->base_addr, 0);
|
||||
|
||||
netif_device_attach(dev);
|
||||
|
||||
|
|
|
@ -48,8 +48,8 @@ static int stmmac_mdio_read(struct mii_bus *bus, int phyaddr, int phyreg)
|
|||
struct net_device *ndev = bus->priv;
|
||||
struct stmmac_priv *priv = netdev_priv(ndev);
|
||||
unsigned long ioaddr = ndev->base_addr;
|
||||
unsigned int mii_address = priv->mac_type->hw.mii.addr;
|
||||
unsigned int mii_data = priv->mac_type->hw.mii.data;
|
||||
unsigned int mii_address = priv->hw->mii.addr;
|
||||
unsigned int mii_data = priv->hw->mii.data;
|
||||
|
||||
int data;
|
||||
u16 regValue = (((phyaddr << 11) & (0x0000F800)) |
|
||||
|
@ -80,8 +80,8 @@ static int stmmac_mdio_write(struct mii_bus *bus, int phyaddr, int phyreg,
|
|||
struct net_device *ndev = bus->priv;
|
||||
struct stmmac_priv *priv = netdev_priv(ndev);
|
||||
unsigned long ioaddr = ndev->base_addr;
|
||||
unsigned int mii_address = priv->mac_type->hw.mii.addr;
|
||||
unsigned int mii_data = priv->mac_type->hw.mii.data;
|
||||
unsigned int mii_address = priv->hw->mii.addr;
|
||||
unsigned int mii_data = priv->hw->mii.data;
|
||||
|
||||
u16 value =
|
||||
(((phyaddr << 11) & (0x0000F800)) | ((phyreg << 6) & (0x000007C0)))
|
||||
|
@ -112,7 +112,7 @@ static int stmmac_mdio_reset(struct mii_bus *bus)
|
|||
struct net_device *ndev = bus->priv;
|
||||
struct stmmac_priv *priv = netdev_priv(ndev);
|
||||
unsigned long ioaddr = ndev->base_addr;
|
||||
unsigned int mii_address = priv->mac_type->hw.mii.addr;
|
||||
unsigned int mii_address = priv->hw->mii.addr;
|
||||
|
||||
if (priv->phy_reset) {
|
||||
pr_debug("stmmac_mdio_reset: calling phy_reset\n");
|
||||
|
|
Loading…
Reference in a new issue