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asoc: remove unused audio files

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Update to remove unused driver files
from techpack audio.

CRs-Fixed: 2105780
Change-Id: I1dcf1c6e75838863eee0556f7919068dfc47772d
Signed-off-by: Laxminath Kasam <lkasam@codeaurora.org>
This commit is contained in:
Laxminath Kasam 2017-08-30 22:16:25 +05:30
parent 8f7ccc2e6f
commit da488bf1ff
14 changed files with 8 additions and 7449 deletions

4
asoc/Makefile
View file

@ -11,10 +11,6 @@ obj-$(CONFIG_SND_SOC_QDSP6V2) += snd-soc-qdsp6v2.o
snd-soc-cpe-objs := msm-cpe-lsm.o
obj-$(CONFIG_SND_SOC_CPE) += snd-soc-cpe.o
# for MSM8996 sound card driver
snd-soc-msm8996-objs := msm8996.o
obj-$(CONFIG_SND_SOC_MSM8996) += snd-soc-msm8996.o
# for MSM8998 sound card driver
snd-soc-msm8998-objs := msm8998.o
obj-$(CONFIG_SND_SOC_MACHINE_MSM8998) += snd-soc-msm8998.o

19
asoc/codecs/Makefile
View file

@ -1,4 +1,6 @@
snd-soc-wcd9xxx-v2-objs := wcd9xxx-common-v2.o wcd9xxx-resmgr-v2.o wcdcal-hwdep.o wcd9xxx-soc-init.o
snd-soc-wcd9xxx-objs := wcd9xxx-common-v2.o wcd9xxx-resmgr-v2.o \
wcdcal-hwdep.o wcd9xxx-soc-init.o wcd-dsp-utils.o \
wcd-dsp-mgr.o audio-ext-clk-up.o
snd-soc-wcd-cpe-objs := wcd_cpe_services.o wcd_cpe_core.o
snd-soc-wsa881x-objs := wsa881x.o wsa881x-tables.o wsa881x-regmap.o wsa881x-temp-sensor.o
snd-soc-wcd-mbhc-objs := wcd-mbhc-v2.o
@ -8,8 +10,6 @@ endif
ifneq (,$(filter $(CONFIG_SND_SOC_WCD_MBHC_ADC),y m))
snd-soc-wcd-mbhc-objs += wcd-mbhc-adc.o
endif
snd-soc-wcd-dsp-utils-objs := wcd-dsp-utils.o
snd-soc-wcd-dsp-mgr-objs := wcd-dsp-mgr.o
snd-soc-wcd-spi-objs := wcd-spi.o
snd-soc-wcd9335-objs := wcd9335.o
snd-soc-wcd-cpe-objs := wcd_cpe_services.o wcd_cpe_core.o
@ -19,18 +19,10 @@ obj-$(CONFIG_SND_SOC_WCD_CPE) += snd-soc-wcd-cpe.o
obj-$(CONFIG_SND_SOC_WCD934X) += wcd934x/
obj-$(CONFIG_SND_SOC_SDM660_CDC) += sdm660_cdc/
obj-$(CONFIG_SND_SOC_MSM_SDW) += msm_sdw/
ifeq ($(CONFIG_COMMON_CLK_MSM), y)
obj-$(CONFIG_AUDIO_EXT_CLK) += audio-ext-clk.o
endif
ifeq ($(CONFIG_COMMON_CLK_QCOM), y)
obj-$(CONFIG_AUDIO_EXT_CLK) += audio-ext-clk-up.o
endif
obj-$(CONFIG_SND_SOC_WCD9XXX_V2) += snd-soc-wcd9xxx-v2.o
obj-$(CONFIG_SND_SOC_WCD_CPE) += snd-soc-wcd-cpe.o
obj-$(CONFIG_SND_SOC_WCD9XXX_V2) += snd-soc-wcd9xxx.o
obj-$(CONFIG_SND_SOC_WCD_MBHC) += snd-soc-wcd-mbhc.o
obj-$(CONFIG_SND_SOC_WSA881X) += snd-soc-wsa881x.o
obj-$(CONFIG_SND_SOC_WCD_DSP_MGR) += snd-soc-wcd-dsp-mgr.o snd-soc-wcd-dsp-utils.o
obj-$(CONFIG_SND_SOC_WCD_SPI) += snd-soc-wcd-spi.o
snd-soc-msm-stub-objs := msm_stub.o
@ -41,5 +33,8 @@ wcd-core-objs := wcd9xxx-rst.o wcd9xxx-core-init.o \
wcd9xxx-slimslave.o wcd9xxx-utils.o \
wcd9335-regmap.o wcd9335-tables.o \
msm-cdc-pinctrl.o msm-cdc-supply.o
wcd-core-objs += wcd934x/wcd934x-regmap.o
wcd-core-objs += wcd934x/wcd934x-tables.o
obj-$(CONFIG_WCD9XXX_CODEC_CORE) += wcd-core.o
obj-$(CONFIG_SND_SOC_MSM_HDMI_CODEC_RX) += msm_hdmi_codec_rx.o

3
asoc/codecs/wcd934x/Makefile
View file

@ -2,6 +2,5 @@
# Makefile for wcd934x codec driver.
#
snd-soc-wcd934x-objs := wcd934x.o wcd934x-dsp-cntl.o \
wcd934x-mbhc.o wcd934x-dsd.o \
wcd934x-regmap.o wcd934x-tables.o
wcd934x-mbhc.o wcd934x-dsd.o
obj-$(CONFIG_SND_SOC_WCD934X) += snd-soc-wcd934x.o

1446
asoc/codecs/wsa881x-analog.c
View file

File diff suppressed because it is too large Load diff

50
asoc/codecs/wsa881x-analog.h
View file

@ -1,50 +0,0 @@
/* Copyright (c) 2015, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#ifndef _WSA881X_H
#define _WSA881X_H
#include <linux/regmap.h>
#include "wsa881x-registers-analog.h"
#include <sound/soc.h>
#define WSA881X_I2C_SPK0_SLAVE0_ADDR 0x0E
#define WSA881X_I2C_SPK0_SLAVE1_ADDR 0x44
#define WSA881X_I2C_SPK1_SLAVE0_ADDR 0x0F
#define WSA881X_I2C_SPK1_SLAVE1_ADDR 0x45
#define WSA881X_I2C_SPK0_SLAVE0 0
#define WSA881X_I2C_SPK1_SLAVE0 1
#define MAX_WSA881X_DEVICE 2
#define WSA881X_DIGITAL_SLAVE 0
#define WSA881X_ANALOG_SLAVE 1
enum {
WSA881X_1_X = 0,
WSA881X_2_0,
};
#define WSA881X_IS_2_0(ver) \
((ver == WSA881X_2_0) ? 1 : 0)
extern const u8 wsa881x_ana_reg_readable[WSA881X_CACHE_SIZE];
extern struct reg_default wsa881x_ana_reg_defaults[WSA881X_CACHE_SIZE];
extern struct regmap_config wsa881x_ana_regmap_config[2];
int wsa881x_get_client_index(void);
int wsa881x_get_probing_count(void);
int wsa881x_get_presence_count(void);
int wsa881x_set_mclk_callback(
int (*enable_mclk_callback)(struct snd_soc_card *, bool));
void wsa881x_update_reg_defaults_2_0(void);
void wsa881x_update_regmap_2_0(struct regmap *regmap, int flag);
#endif /* _WSA881X_H */

610
asoc/codecs/wsa881x-irq.c
View file

@ -1,610 +0,0 @@
/* Copyright (c) 2015, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <linux/bitops.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/sched.h>
#include <linux/irq.h>
#include <linux/delay.h>
#include <linux/of.h>
#include <linux/of_irq.h>
#include <linux/slab.h>
#include <linux/ratelimit.h>
#include <linux/pm_qos.h>
#include <soc/qcom/pm.h>
#include "wsa881x-irq.h"
#include "wsa881x-registers-analog.h"
#define BYTE_BIT_MASK(nr) (1UL << ((nr) % BITS_PER_BYTE))
#define BIT_BYTE(nr) ((nr) / BITS_PER_BYTE)
#define WSA_MAX_NUM_IRQS 8
#ifndef NO_IRQ
#define NO_IRQ (-1)
#endif
static int virq_to_phyirq(
struct wsa_resource *wsa_res, int virq);
static int phyirq_to_virq(
struct wsa_resource *wsa_res, int irq);
static unsigned int wsa_irq_get_upstream_irq(
struct wsa_resource *wsa_res);
static void wsa_irq_put_upstream_irq(
struct wsa_resource *wsa_res);
static int wsa_map_irq(
struct wsa_resource *wsa_res, int irq);
static struct snd_soc_codec *ptr_codec;
/**
* wsa_set_codec() - to update codec pointer
* @codec: codec pointer.
*
* To update the codec pointer, which is used to read/write
* wsa register.
*
* Return: void.
*/
void wsa_set_codec(struct snd_soc_codec *codec)
{
if (codec == NULL) {
pr_err("%s: codec pointer is NULL\n", __func__);
ptr_codec = NULL;
return;
}
ptr_codec = codec;
/* Initialize interrupt mask and level registers */
snd_soc_write(codec, WSA881X_INTR_LEVEL, 0x8F);
snd_soc_write(codec, WSA881X_INTR_MASK, 0x8F);
}
static void wsa_irq_lock(struct irq_data *data)
{
struct wsa_resource *wsa_res =
irq_data_get_irq_chip_data(data);
if (wsa_res == NULL) {
pr_err("%s: wsa_res pointer is NULL\n", __func__);
return;
}
mutex_lock(&wsa_res->irq_lock);
}
static void wsa_irq_sync_unlock(struct irq_data *data)
{
struct wsa_resource *wsa_res =
irq_data_get_irq_chip_data(data);
if (wsa_res == NULL) {
pr_err("%s: wsa_res pointer is NULL\n", __func__);
return;
}
if (wsa_res->codec == NULL) {
pr_err("%s: codec pointer not registered\n", __func__);
if (ptr_codec == NULL) {
pr_err("%s: did not receive valid codec pointer\n",
__func__);
goto unlock;
} else {
wsa_res->codec = ptr_codec;
}
}
/*
* If there's been a change in the mask write it back
* to the hardware.
*/
if (wsa_res->irq_masks_cur !=
wsa_res->irq_masks_cache) {
wsa_res->irq_masks_cache =
wsa_res->irq_masks_cur;
snd_soc_write(wsa_res->codec,
WSA881X_INTR_MASK,
wsa_res->irq_masks_cur);
}
unlock:
mutex_unlock(&wsa_res->irq_lock);
}
static void wsa_irq_enable(struct irq_data *data)
{
struct wsa_resource *wsa_res =
irq_data_get_irq_chip_data(data);
int wsa_irq;
if (wsa_res == NULL) {
pr_err("%s: wsa_res pointer is NULL\n", __func__);
return;
}
wsa_irq = virq_to_phyirq(wsa_res, data->irq);
pr_debug("%s: wsa_irq = %d\n", __func__, wsa_irq);
wsa_res->irq_masks_cur &=
~(BYTE_BIT_MASK(wsa_irq));
}
static void wsa_irq_disable(struct irq_data *data)
{
struct wsa_resource *wsa_res =
irq_data_get_irq_chip_data(data);
int wsa_irq;
if (wsa_res == NULL) {
pr_err("%s: wsa_res pointer is NULL\n", __func__);
return;
}
wsa_irq = virq_to_phyirq(wsa_res, data->irq);
pr_debug("%s: wsa_irq = %d\n", __func__, wsa_irq);
wsa_res->irq_masks_cur
|= BYTE_BIT_MASK(wsa_irq);
}
static void wsa_irq_ack(struct irq_data *data)
{
int wsa_irq = 0;
struct wsa_resource *wsa_res =
irq_data_get_irq_chip_data(data);
if (wsa_res == NULL) {
pr_err("%s: wsa_res is NULL\n", __func__);
return;
}
wsa_irq = virq_to_phyirq(wsa_res, data->irq);
pr_debug("%s: IRQ_ACK called for WCD9XXX IRQ: %d\n",
__func__, wsa_irq);
}
static void wsa_irq_mask(struct irq_data *d)
{
/* do nothing but required as linux calls irq_mask without NULL check */
}
static struct irq_chip wsa_irq_chip = {
.name = "wsa",
.irq_bus_lock = wsa_irq_lock,
.irq_bus_sync_unlock = wsa_irq_sync_unlock,
.irq_disable = wsa_irq_disable,
.irq_enable = wsa_irq_enable,
.irq_mask = wsa_irq_mask,
.irq_ack = wsa_irq_ack,
};
static irqreturn_t wsa_irq_thread(int irq, void *data)
{
struct wsa_resource *wsa_res = data;
int i;
u8 status;
if (wsa_res == NULL) {
pr_err("%s: wsa_res is NULL\n", __func__);
return IRQ_HANDLED;
}
if (wsa_res->codec == NULL) {
pr_err("%s: codec pointer not registered\n", __func__);
if (ptr_codec == NULL) {
pr_err("%s: did not receive valid codec pointer\n",
__func__);
return IRQ_HANDLED;
}
wsa_res->codec = ptr_codec;
}
status = snd_soc_read(wsa_res->codec, WSA881X_INTR_STATUS);
/* Apply masking */
status &= ~wsa_res->irq_masks_cur;
for (i = 0; i < wsa_res->num_irqs; i++) {
if (status & BYTE_BIT_MASK(i)) {
mutex_lock(&wsa_res->nested_irq_lock);
handle_nested_irq(phyirq_to_virq(wsa_res, i));
mutex_unlock(&wsa_res->nested_irq_lock);
}
}
return IRQ_HANDLED;
}
/**
* wsa_free_irq() - to free an interrupt
* @irq: interrupt number.
* @data: pointer to wsa resource.
*
* To free already requested interrupt.
*
* Return: void.
*/
void wsa_free_irq(int irq, void *data)
{
struct wsa_resource *wsa_res = data;
if (wsa_res == NULL) {
pr_err("%s: wsa_res is NULL\n", __func__);
return;
}
free_irq(phyirq_to_virq(wsa_res, irq), data);
}
/**
* wsa_enable_irq() - to enable an interrupt
* @wsa_res: pointer to wsa resource.
* @irq: interrupt number.
*
* This function is to enable an interrupt.
*
* Return: void.
*/
void wsa_enable_irq(struct wsa_resource *wsa_res, int irq)
{
if (wsa_res == NULL) {
pr_err("%s: wsa_res is NULL\n", __func__);
return;
}
enable_irq(phyirq_to_virq(wsa_res, irq));
}
/**
* wsa_disable_irq() - to disable an interrupt
* @wsa_res: pointer to wsa resource.
* @irq: interrupt number.
*
* To disable an interrupt without waiting for executing
* handler to complete.
*
* Return: void.
*/
void wsa_disable_irq(struct wsa_resource *wsa_res, int irq)
{
if (wsa_res == NULL) {
pr_err("%s: wsa_res is NULL\n", __func__);
return;
}
disable_irq_nosync(phyirq_to_virq(wsa_res, irq));
}
/**
* wsa_disable_irq_sync() - to disable an interrupt
* @wsa_res: pointer to wsa resource.
* @irq: interrupt number.
*
* To disable an interrupt, wait for executing IRQ
* handler to complete.
*
* Return: void.
*/
void wsa_disable_irq_sync(
struct wsa_resource *wsa_res, int irq)
{
if (wsa_res == NULL) {
pr_err("%s: wsa_res is NULL\n", __func__);
return;
}
disable_irq(phyirq_to_virq(wsa_res, irq));
}
static int wsa_irq_setup_downstream_irq(struct wsa_resource *wsa_res)
{
int irq, virq, ret;
if (wsa_res == NULL) {
pr_err("%s: wsa_res is NULL\n", __func__);
return -EINVAL;
}
pr_debug("%s: enter\n", __func__);
for (irq = 0; irq < wsa_res->num_irqs; irq++) {
/* Map OF irq */
virq = wsa_map_irq(wsa_res, irq);
pr_debug("%s: irq %d -> %d\n", __func__, irq, virq);
if (virq == NO_IRQ) {
pr_err("%s, No interrupt specifier for irq %d\n",
__func__, irq);
return NO_IRQ;
}
ret = irq_set_chip_data(virq, wsa_res);
if (ret) {
pr_err("%s: Failed to configure irq %d (%d)\n",
__func__, irq, ret);
return ret;
}
if (wsa_res->irq_level_high[irq])
irq_set_chip_and_handler(virq, &wsa_irq_chip,
handle_level_irq);
else
irq_set_chip_and_handler(virq, &wsa_irq_chip,
handle_edge_irq);
irq_set_nested_thread(virq, 1);
}
pr_debug("%s: leave\n", __func__);
return 0;
}
static int wsa_irq_init(struct wsa_resource *wsa_res)
{
int i, ret;
if (wsa_res == NULL) {
pr_err("%s: wsa_res is NULL\n", __func__);
return -EINVAL;
}
mutex_init(&wsa_res->irq_lock);
mutex_init(&wsa_res->nested_irq_lock);
wsa_res->irq = wsa_irq_get_upstream_irq(wsa_res);
if (!wsa_res->irq) {
pr_warn("%s: irq driver is not yet initialized\n", __func__);
mutex_destroy(&wsa_res->irq_lock);
mutex_destroy(&wsa_res->nested_irq_lock);
return -EPROBE_DEFER;
}
pr_debug("%s: probed irq %d\n", __func__, wsa_res->irq);
/* Setup downstream IRQs */
ret = wsa_irq_setup_downstream_irq(wsa_res);
if (ret) {
pr_err("%s: Failed to setup downstream IRQ\n", __func__);
goto fail_irq_init;
}
/* mask all the interrupts */
for (i = 0; i < wsa_res->num_irqs; i++) {
wsa_res->irq_masks_cur |= BYTE_BIT_MASK(i);
wsa_res->irq_masks_cache |= BYTE_BIT_MASK(i);
}
ret = request_threaded_irq(wsa_res->irq, NULL, wsa_irq_thread,
IRQF_TRIGGER_HIGH | IRQF_ONESHOT,
"wsa", wsa_res);
if (ret != 0) {
dev_err(wsa_res->dev, "Failed to request IRQ %d: %d\n",
wsa_res->irq, ret);
} else {
ret = enable_irq_wake(wsa_res->irq);
if (ret) {
dev_err(wsa_res->dev,
"Failed to set wake interrupt on IRQ %d: %d\n",
wsa_res->irq, ret);
free_irq(wsa_res->irq, wsa_res);
}
}
if (ret)
goto fail_irq_init;
return ret;
fail_irq_init:
dev_err(wsa_res->dev,
"%s: Failed to init wsa irq\n", __func__);
wsa_irq_put_upstream_irq(wsa_res);
mutex_destroy(&wsa_res->irq_lock);
mutex_destroy(&wsa_res->nested_irq_lock);
return ret;
}
/**
* wsa_request_irq() - to request/register an interrupt
* @wsa_res: pointer to wsa_resource.
* @irq: interrupt number.
* @handler: interrupt handler function pointer.
* @name: interrupt name.
* @data: device info.
*
* Convert physical irq to virtual irq and then
* reguest for threaded handler.
*
* Return: Retuns success/failure.
*/
int wsa_request_irq(struct wsa_resource *wsa_res,
int irq, irq_handler_t handler,
const char *name, void *data)
{
int virq;
if (wsa_res == NULL) {
pr_err("%s: wsa_res is NULL\n", __func__);
return -EINVAL;
}
virq = phyirq_to_virq(wsa_res, irq);
/*
* ARM needs us to explicitly flag the IRQ as valid
* and will set them noprobe when we do so.
*/
#if defined(CONFIG_ARM) || defined(CONFIG_ARM64)
set_irq_flags(virq, IRQF_VALID);
#else
set_irq_noprobe(virq);
#endif
return request_threaded_irq(virq, NULL, handler, IRQF_TRIGGER_RISING,
name, data);
}
/**
* wsa_irq_exit() - to disable/clear interrupt/resources
* @wsa_res: pointer to wsa_resource
*
* Disable and free the interrupts and then release resources.
*
* Return: void.
*/
void wsa_irq_exit(struct wsa_resource *wsa_res)
{
if (wsa_res == NULL) {
pr_err("%s: wsa_res is NULL\n", __func__);
return;
}
dev_dbg(wsa_res->dev, "%s: Cleaning up irq %d\n", __func__,
wsa_res->irq);
if (wsa_res->irq) {
disable_irq_wake(wsa_res->irq);
free_irq(wsa_res->irq, wsa_res);
/* Release parent's of node */
wsa_irq_put_upstream_irq(wsa_res);
}
mutex_destroy(&wsa_res->irq_lock);
mutex_destroy(&wsa_res->nested_irq_lock);
}
static int phyirq_to_virq(struct wsa_resource *wsa_res, int offset)
{
if (wsa_res == NULL) {
pr_err("%s: wsa_res is NULL\n", __func__);
return -EINVAL;
}
return irq_linear_revmap(wsa_res->domain, offset);
}
static int virq_to_phyirq(struct wsa_resource *wsa_res, int virq)
{
struct irq_data *irq_data = irq_get_irq_data(virq);
if (unlikely(!irq_data)) {
pr_err("%s: irq_data is NULL\n", __func__);
return -EINVAL;
}
return irq_data->hwirq;
}
static unsigned int wsa_irq_get_upstream_irq(struct wsa_resource *wsa_res)
{
if (wsa_res == NULL) {
pr_err("%s: wsa_res is NULL\n", __func__);
return -EINVAL;
}
return wsa_res->irq;
}
static void wsa_irq_put_upstream_irq(struct wsa_resource *wsa_res)
{
if (wsa_res == NULL) {
pr_err("%s: wsa_res is NULL\n", __func__);
return;
}
/* Hold parent's of node */
of_node_put(wsa_res->dev->of_node);
}
static int wsa_map_irq(struct wsa_resource *wsa_res, int irq)
{
if (wsa_res == NULL) {
pr_err("%s: wsa_res is NULL\n", __func__);
return -EINVAL;
}
return of_irq_to_resource(wsa_res->dev->of_node, irq, NULL);
}
static int wsa_irq_probe(struct platform_device *pdev)
{
int irq;
struct wsa_resource *wsa_res = NULL;
int ret = -EINVAL;
irq = platform_get_irq_byname(pdev, "wsa-int");
if (irq < 0) {
dev_err(&pdev->dev, "%s: Couldn't find wsa-int node(%d)\n",
__func__, irq);
return -EINVAL;
}
pr_debug("%s: node %s\n", __func__, pdev->name);
wsa_res = kzalloc(sizeof(*wsa_res), GFP_KERNEL);
if (!wsa_res) {
pr_err("%s: could not allocate memory\n", __func__);
return -ENOMEM;
}
/*
* wsa interrupt controller supports N to N irq mapping with
* single cell binding with irq numbers(offsets) only.
* Use irq_domain_simple_ops that has irq_domain_simple_map and
* irq_domain_xlate_onetwocell.
*/
wsa_res->dev = &pdev->dev;
wsa_res->domain = irq_domain_add_linear(wsa_res->dev->of_node,
WSA_MAX_NUM_IRQS, &irq_domain_simple_ops,
wsa_res);
if (!wsa_res->domain) {
dev_err(&pdev->dev, "%s: domain is NULL\n", __func__);
ret = -ENOMEM;
goto err;
}
wsa_res->dev = &pdev->dev;
dev_dbg(&pdev->dev, "%s: virq = %d\n", __func__, irq);
wsa_res->irq = irq;
wsa_res->num_irq_regs = 1;
wsa_res->num_irqs = WSA_NUM_IRQS;
ret = wsa_irq_init(wsa_res);
if (ret < 0) {
dev_err(&pdev->dev, "%s: failed to do irq init %d\n",
__func__, ret);
goto err;
}
return ret;
err:
kfree(wsa_res);
return ret;
}
static int wsa_irq_remove(struct platform_device *pdev)
{
struct irq_domain *domain;
struct wsa_resource *data;
domain = irq_find_host(pdev->dev.of_node);
if (unlikely(!domain)) {
pr_err("%s: domain is NULL\n", __func__);
return -EINVAL;
}
data = (struct wsa_resource *)domain->host_data;
data->irq = 0;
return 0;
}
static const struct of_device_id of_match[] = {
{ .compatible = "qcom,wsa-irq" },
{ }
};
static struct platform_driver wsa_irq_driver = {
.probe = wsa_irq_probe,
.remove = wsa_irq_remove,
.driver = {
.name = "wsa_intc",
.owner = THIS_MODULE,
.of_match_table = of_match_ptr(of_match),
},
};
static int wsa_irq_drv_init(void)
{
return platform_driver_register(&wsa_irq_driver);
}
subsys_initcall(wsa_irq_drv_init);
static void wsa_irq_drv_exit(void)
{
platform_driver_unregister(&wsa_irq_driver);
}
module_exit(wsa_irq_drv_exit);
MODULE_DESCRIPTION("WSA881x IRQ driver");
MODULE_LICENSE("GPL v2");

82
asoc/codecs/wsa881x-irq.h
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@ -1,82 +0,0 @@
/* Copyright (c) 2015, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#ifndef __WSA881X_IRQ_H__
#define __WSA881X_IRQ_H__
#include <linux/irqdomain.h>
#include <linux/interrupt.h>
#include <sound/soc.h>
/**
* enum wsa_interrupts - wsa interrupt number
* @WSA_INT_SAF2WAR: Temp irq interrupt, from safe state to warning state.
* @WSA_INT_WAR2SAF: Temp irq interrupt, from warning state to safe state.
* @WSA_INT_DISABLE: Disable Temp sensor interrupts.
* @WSA_INT_OCP: OCP interrupt.
* @WSA_INT_CLIP: CLIP detect interrupt.
* @WSA_NUM_IRQS: MAX Interrupt number.
*
* WSA IRQ Interrupt numbers.
*/
enum wsa_interrupts {
WSA_INT_SAF2WAR = 0,
WSA_INT_WAR2SAF,
WSA_INT_DISABLE,
WSA_INT_OCP,
WSA_INT_CLIP,
WSA_NUM_IRQS,
};
/**
* struct wsa_resource - the basic wsa_resource structure
* @irq_lock: lock used by irq_chip functions.
* @nested_irq_lock: lock used while handling nested interrupts.
* @irq: interrupt number.
* @irq_masks_cur: current mask value to be written to mask registers.
* @irq_masks_cache: cached mask value.
* @num_irqs: number of supported interrupts.
* @num_irq_regs: number of irq registers.
* @parent: parent pointer.
* @dev: device pointer.
* @domain: irq domain pointer.
* codec: codec pointer.
*
* Contains required members used in wsa irq driver.
*/
struct wsa_resource {
struct mutex irq_lock;
struct mutex nested_irq_lock;
unsigned int irq;
u8 irq_masks_cur;
u8 irq_masks_cache;
bool irq_level_high[8];
int num_irqs;
int num_irq_regs;
void *parent;
struct device *dev;
struct irq_domain *domain;
struct snd_soc_codec *codec;
};
void wsa_set_codec(struct snd_soc_codec *codec);
void wsa_free_irq(int irq, void *data);
void wsa_enable_irq(struct wsa_resource *wsa_res, int irq);
void wsa_disable_irq(struct wsa_resource *wsa_res, int irq);
void wsa_disable_irq_sync(struct wsa_resource *wsa_res, int irq);
int wsa_request_irq(struct wsa_resource *wsa_res,
int irq, irq_handler_t handler,
const char *name, void *data);
void wsa_irq_exit(struct wsa_resource *wsa_res);
#endif /* __WSA881X_IRQ_H__ */

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asoc/codecs/wsa881x-registers-analog.h
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/* Copyright (c) 2015, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#ifndef WSA881X_REGISTERS_H
#define WSA881X_REGISTERS_H
#define WSA881X_DIGITAL_BASE 0x0000
#define WSA881X_ANALOG_BASE 0x0100
#define WSA881X_CHIP_ID0 (WSA881X_DIGITAL_BASE+0x0000)
#define WSA881X_CHIP_ID1 (WSA881X_DIGITAL_BASE+0x0001)
#define WSA881X_CHIP_ID2 (WSA881X_DIGITAL_BASE+0x0002)
#define WSA881X_CHIP_ID3 (WSA881X_DIGITAL_BASE+0x0003)
#define WSA881X_BUS_ID (WSA881X_DIGITAL_BASE+0x0004)
#define WSA881X_CDC_RST_CTL (WSA881X_DIGITAL_BASE+0x0005)
#define WSA881X_CDC_TOP_CLK_CTL (WSA881X_DIGITAL_BASE+0x0006)
#define WSA881X_CDC_ANA_CLK_CTL (WSA881X_DIGITAL_BASE+0x0007)
#define WSA881X_CDC_DIG_CLK_CTL (WSA881X_DIGITAL_BASE+0x0008)
#define WSA881X_CLOCK_CONFIG (WSA881X_DIGITAL_BASE+0x0009)
#define WSA881X_ANA_CTL (WSA881X_DIGITAL_BASE+0x000A)
#define WSA881X_SWR_RESET_EN (WSA881X_DIGITAL_BASE+0x000B)
#define WSA881X_RESET_CTL (WSA881X_DIGITAL_BASE+0x000C)
#define WSA881X_TADC_VALUE_CTL (WSA881X_DIGITAL_BASE+0x000F)
#define WSA881X_TEMP_DETECT_CTL (WSA881X_DIGITAL_BASE+0x0010)
#define WSA881X_TEMP_MSB (WSA881X_DIGITAL_BASE+0x0011)
#define WSA881X_TEMP_LSB (WSA881X_DIGITAL_BASE+0x0012)
#define WSA881X_TEMP_CONFIG0 (WSA881X_DIGITAL_BASE+0x0013)
#define WSA881X_TEMP_CONFIG1 (WSA881X_DIGITAL_BASE+0x0014)
#define WSA881X_CDC_CLIP_CTL (WSA881X_DIGITAL_BASE+0x0015)
#define WSA881X_SDM_PDM9_LSB (WSA881X_DIGITAL_BASE+0x0016)
#define WSA881X_SDM_PDM9_MSB (WSA881X_DIGITAL_BASE+0x0017)
#define WSA881X_CDC_RX_CTL (WSA881X_DIGITAL_BASE+0x0018)
#define WSA881X_DEM_BYPASS_DATA0 (WSA881X_DIGITAL_BASE+0x0019)
#define WSA881X_DEM_BYPASS_DATA1 (WSA881X_DIGITAL_BASE+0x001A)
#define WSA881X_DEM_BYPASS_DATA2 (WSA881X_DIGITAL_BASE+0x001B)
#define WSA881X_DEM_BYPASS_DATA3 (WSA881X_DIGITAL_BASE+0x001C)
#define WSA881X_OTP_CTRL0 (WSA881X_DIGITAL_BASE+0x001D)
#define WSA881X_OTP_CTRL1 (WSA881X_DIGITAL_BASE+0x001E)
#define WSA881X_HDRIVE_CTL_GROUP1 (WSA881X_DIGITAL_BASE+0x001F)
#define WSA881X_INTR_MODE (WSA881X_DIGITAL_BASE+0x0020)
#define WSA881X_INTR_MASK (WSA881X_DIGITAL_BASE+0x0021)
#define WSA881X_INTR_STATUS (WSA881X_DIGITAL_BASE+0x0022)
#define WSA881X_INTR_CLEAR (WSA881X_DIGITAL_BASE+0x0023)
#define WSA881X_INTR_LEVEL (WSA881X_DIGITAL_BASE+0x0024)
#define WSA881X_INTR_SET (WSA881X_DIGITAL_BASE+0x0025)
#define WSA881X_INTR_TEST (WSA881X_DIGITAL_BASE+0x0026)
#define WSA881X_PDM_TEST_MODE (WSA881X_DIGITAL_BASE+0x0030)
#define WSA881X_ATE_TEST_MODE (WSA881X_DIGITAL_BASE+0x0031)
#define WSA881X_PIN_CTL_MODE (WSA881X_DIGITAL_BASE+0x0032)
#define WSA881X_PIN_CTL_OE (WSA881X_DIGITAL_BASE+0x0033)
#define WSA881X_PIN_WDATA_IOPAD (WSA881X_DIGITAL_BASE+0x0034)
#define WSA881X_PIN_STATUS (WSA881X_DIGITAL_BASE+0x0035)
#define WSA881X_DIG_DEBUG_MODE (WSA881X_DIGITAL_BASE+0x0037)
#define WSA881X_DIG_DEBUG_SEL (WSA881X_DIGITAL_BASE+0x0038)
#define WSA881X_DIG_DEBUG_EN (WSA881X_DIGITAL_BASE+0x0039)
#define WSA881X_SWR_HM_TEST1 (WSA881X_DIGITAL_BASE+0x003B)
#define WSA881X_SWR_HM_TEST2 (WSA881X_DIGITAL_BASE+0x003C)
#define WSA881X_TEMP_DETECT_DBG_CTL (WSA881X_DIGITAL_BASE+0x003D)
#define WSA881X_TEMP_DEBUG_MSB (WSA881X_DIGITAL_BASE+0x003E)
#define WSA881X_TEMP_DEBUG_LSB (WSA881X_DIGITAL_BASE+0x003F)
#define WSA881X_SAMPLE_EDGE_SEL (WSA881X_DIGITAL_BASE+0x0044)
#define WSA881X_IOPAD_CTL (WSA881X_DIGITAL_BASE+0x0045)
#define WSA881X_SPARE_0 (WSA881X_DIGITAL_BASE+0x0050)
#define WSA881X_SPARE_1 (WSA881X_DIGITAL_BASE+0x0051)
#define WSA881X_SPARE_2 (WSA881X_DIGITAL_BASE+0x0052)
#define WSA881X_OTP_REG_0 (WSA881X_DIGITAL_BASE+0x0080)
#define WSA881X_OTP_REG_1 (WSA881X_DIGITAL_BASE+0x0081)
#define WSA881X_OTP_REG_2 (WSA881X_DIGITAL_BASE+0x0082)
#define WSA881X_OTP_REG_3 (WSA881X_DIGITAL_BASE+0x0083)
#define WSA881X_OTP_REG_4 (WSA881X_DIGITAL_BASE+0x0084)
#define WSA881X_OTP_REG_5 (WSA881X_DIGITAL_BASE+0x0085)
#define WSA881X_OTP_REG_6 (WSA881X_DIGITAL_BASE+0x0086)
#define WSA881X_OTP_REG_7 (WSA881X_DIGITAL_BASE+0x0087)
#define WSA881X_OTP_REG_8 (WSA881X_DIGITAL_BASE+0x0088)
#define WSA881X_OTP_REG_9 (WSA881X_DIGITAL_BASE+0x0089)
#define WSA881X_OTP_REG_10 (WSA881X_DIGITAL_BASE+0x008A)
#define WSA881X_OTP_REG_11 (WSA881X_DIGITAL_BASE+0x008B)
#define WSA881X_OTP_REG_12 (WSA881X_DIGITAL_BASE+0x008C)
#define WSA881X_OTP_REG_13 (WSA881X_DIGITAL_BASE+0x008D)
#define WSA881X_OTP_REG_14 (WSA881X_DIGITAL_BASE+0x008E)
#define WSA881X_OTP_REG_15 (WSA881X_DIGITAL_BASE+0x008F)
#define WSA881X_OTP_REG_16 (WSA881X_DIGITAL_BASE+0x0090)
#define WSA881X_OTP_REG_17 (WSA881X_DIGITAL_BASE+0x0091)
#define WSA881X_OTP_REG_18 (WSA881X_DIGITAL_BASE+0x0092)
#define WSA881X_OTP_REG_19 (WSA881X_DIGITAL_BASE+0x0093)
#define WSA881X_OTP_REG_20 (WSA881X_DIGITAL_BASE+0x0094)
#define WSA881X_OTP_REG_21 (WSA881X_DIGITAL_BASE+0x0095)
#define WSA881X_OTP_REG_22 (WSA881X_DIGITAL_BASE+0x0096)
#define WSA881X_OTP_REG_23 (WSA881X_DIGITAL_BASE+0x0097)
#define WSA881X_OTP_REG_24 (WSA881X_DIGITAL_BASE+0x0098)
#define WSA881X_OTP_REG_25 (WSA881X_DIGITAL_BASE+0x0099)
#define WSA881X_OTP_REG_26 (WSA881X_DIGITAL_BASE+0x009A)
#define WSA881X_OTP_REG_27 (WSA881X_DIGITAL_BASE+0x009B)
#define WSA881X_OTP_REG_28 (WSA881X_DIGITAL_BASE+0x009C)
#define WSA881X_OTP_REG_29 (WSA881X_DIGITAL_BASE+0x009D)
#define WSA881X_OTP_REG_30 (WSA881X_DIGITAL_BASE+0x009E)
#define WSA881X_OTP_REG_31 (WSA881X_DIGITAL_BASE+0x009F)
#define WSA881X_OTP_REG_32 (WSA881X_DIGITAL_BASE+0x00A0)
#define WSA881X_OTP_REG_33 (WSA881X_DIGITAL_BASE+0x00A1)
#define WSA881X_OTP_REG_34 (WSA881X_DIGITAL_BASE+0x00A2)
#define WSA881X_OTP_REG_35 (WSA881X_DIGITAL_BASE+0x00A3)
#define WSA881X_OTP_REG_36 (WSA881X_DIGITAL_BASE+0x00A4)
#define WSA881X_OTP_REG_37 (WSA881X_DIGITAL_BASE+0x00A5)
#define WSA881X_OTP_REG_38 (WSA881X_DIGITAL_BASE+0x00A6)
#define WSA881X_OTP_REG_39 (WSA881X_DIGITAL_BASE+0x00A7)
#define WSA881X_OTP_REG_40 (WSA881X_DIGITAL_BASE+0x00A8)
#define WSA881X_OTP_REG_41 (WSA881X_DIGITAL_BASE+0x00A9)
#define WSA881X_OTP_REG_42 (WSA881X_DIGITAL_BASE+0x00AA)
#define WSA881X_OTP_REG_43 (WSA881X_DIGITAL_BASE+0x00AB)
#define WSA881X_OTP_REG_44 (WSA881X_DIGITAL_BASE+0x00AC)
#define WSA881X_OTP_REG_45 (WSA881X_DIGITAL_BASE+0x00AD)
#define WSA881X_OTP_REG_46 (WSA881X_DIGITAL_BASE+0x00AE)
#define WSA881X_OTP_REG_47 (WSA881X_DIGITAL_BASE+0x00AF)
#define WSA881X_OTP_REG_48 (WSA881X_DIGITAL_BASE+0x00B0)
#define WSA881X_OTP_REG_49 (WSA881X_DIGITAL_BASE+0x00B1)
#define WSA881X_OTP_REG_50 (WSA881X_DIGITAL_BASE+0x00B2)
#define WSA881X_OTP_REG_51 (WSA881X_DIGITAL_BASE+0x00B3)
#define WSA881X_OTP_REG_52 (WSA881X_DIGITAL_BASE+0x00B4)
#define WSA881X_OTP_REG_53 (WSA881X_DIGITAL_BASE+0x00B5)
#define WSA881X_OTP_REG_54 (WSA881X_DIGITAL_BASE+0x00B6)
#define WSA881X_OTP_REG_55 (WSA881X_DIGITAL_BASE+0x00B7)
#define WSA881X_OTP_REG_56 (WSA881X_DIGITAL_BASE+0x00B8)
#define WSA881X_OTP_REG_57 (WSA881X_DIGITAL_BASE+0x00B9)
#define WSA881X_OTP_REG_58 (WSA881X_DIGITAL_BASE+0x00BA)
#define WSA881X_OTP_REG_59 (WSA881X_DIGITAL_BASE+0x00BB)
#define WSA881X_OTP_REG_60 (WSA881X_DIGITAL_BASE+0x00BC)
#define WSA881X_OTP_REG_61 (WSA881X_DIGITAL_BASE+0x00BD)
#define WSA881X_OTP_REG_62 (WSA881X_DIGITAL_BASE+0x00BE)
#define WSA881X_OTP_REG_63 (WSA881X_DIGITAL_BASE+0x00BF)
/* Analog Register address space */
#define WSA881X_BIAS_REF_CTRL (WSA881X_ANALOG_BASE+0x0000)
#define WSA881X_BIAS_TEST (WSA881X_ANALOG_BASE+0x0001)
#define WSA881X_BIAS_BIAS (WSA881X_ANALOG_BASE+0x0002)
#define WSA881X_TEMP_OP (WSA881X_ANALOG_BASE+0x0003)
#define WSA881X_TEMP_IREF_CTRL (WSA881X_ANALOG_BASE+0x0004)
#define WSA881X_TEMP_ISENS_CTRL (WSA881X_ANALOG_BASE+0x0005)
#define WSA881X_TEMP_CLK_CTRL (WSA881X_ANALOG_BASE+0x0006)
#define WSA881X_TEMP_TEST (WSA881X_ANALOG_BASE+0x0007)
#define WSA881X_TEMP_BIAS (WSA881X_ANALOG_BASE+0x0008)
#define WSA881X_TEMP_ADC_CTRL (WSA881X_ANALOG_BASE+0x0009)
#define WSA881X_TEMP_DOUT_MSB (WSA881X_ANALOG_BASE+0x000A)
#define WSA881X_TEMP_DOUT_LSB (WSA881X_ANALOG_BASE+0x000B)
#define WSA881X_ADC_EN_MODU_V (WSA881X_ANALOG_BASE+0x0010)
#define WSA881X_ADC_EN_MODU_I (WSA881X_ANALOG_BASE+0x0011)
#define WSA881X_ADC_EN_DET_TEST_V (WSA881X_ANALOG_BASE+0x0012)
#define WSA881X_ADC_EN_DET_TEST_I (WSA881X_ANALOG_BASE+0x0013)
#define WSA881X_ADC_SEL_IBIAS (WSA881X_ANALOG_BASE+0x0014)
#define WSA881X_ADC_EN_SEL_IBIAS (WSA881X_ANALOG_BASE+0x0015)
#define WSA881X_SPKR_DRV_EN (WSA881X_ANALOG_BASE+0x001A)
#define WSA881X_SPKR_DRV_GAIN (WSA881X_ANALOG_BASE+0x001B)
#define WSA881X_SPKR_DAC_CTL (WSA881X_ANALOG_BASE+0x001C)
#define WSA881X_SPKR_DRV_DBG (WSA881X_ANALOG_BASE+0x001D)
#define WSA881X_SPKR_PWRSTG_DBG (WSA881X_ANALOG_BASE+0x001E)
#define WSA881X_SPKR_OCP_CTL (WSA881X_ANALOG_BASE+0x001F)
#define WSA881X_SPKR_CLIP_CTL (WSA881X_ANALOG_BASE+0x0020)
#define WSA881X_SPKR_BBM_CTL (WSA881X_ANALOG_BASE+0x0021)
#define WSA881X_SPKR_MISC_CTL1 (WSA881X_ANALOG_BASE+0x0022)
#define WSA881X_SPKR_MISC_CTL2 (WSA881X_ANALOG_BASE+0x0023)
#define WSA881X_SPKR_BIAS_INT (WSA881X_ANALOG_BASE+0x0024)
#define WSA881X_SPKR_PA_INT (WSA881X_ANALOG_BASE+0x0025)
#define WSA881X_SPKR_BIAS_CAL (WSA881X_ANALOG_BASE+0x0026)
#define WSA881X_SPKR_BIAS_PSRR (WSA881X_ANALOG_BASE+0x0027)
#define WSA881X_SPKR_STATUS1 (WSA881X_ANALOG_BASE+0x0028)
#define WSA881X_SPKR_STATUS2 (WSA881X_ANALOG_BASE+0x0029)
#define WSA881X_BOOST_EN_CTL (WSA881X_ANALOG_BASE+0x002A)
#define WSA881X_BOOST_CURRENT_LIMIT (WSA881X_ANALOG_BASE+0x002B)
#define WSA881X_BOOST_PS_CTL (WSA881X_ANALOG_BASE+0x002C)
#define WSA881X_BOOST_PRESET_OUT1 (WSA881X_ANALOG_BASE+0x002D)
#define WSA881X_BOOST_PRESET_OUT2 (WSA881X_ANALOG_BASE+0x002E)
#define WSA881X_BOOST_FORCE_OUT (WSA881X_ANALOG_BASE+0x002F)
#define WSA881X_BOOST_LDO_PROG (WSA881X_ANALOG_BASE+0x0030)
#define WSA881X_BOOST_SLOPE_COMP_ISENSE_FB (WSA881X_ANALOG_BASE+0x0031)
#define WSA881X_BOOST_RON_CTL (WSA881X_ANALOG_BASE+0x0032)
#define WSA881X_BOOST_LOOP_STABILITY (WSA881X_ANALOG_BASE+0x0033)
#define WSA881X_BOOST_ZX_CTL (WSA881X_ANALOG_BASE+0x0034)
#define WSA881X_BOOST_START_CTL (WSA881X_ANALOG_BASE+0x0035)
#define WSA881X_BOOST_MISC1_CTL (WSA881X_ANALOG_BASE+0x0036)
#define WSA881X_BOOST_MISC2_CTL (WSA881X_ANALOG_BASE+0x0037)
#define WSA881X_BOOST_MISC3_CTL (WSA881X_ANALOG_BASE+0x0038)
#define WSA881X_BOOST_ATEST_CTL (WSA881X_ANALOG_BASE+0x0039)
#define WSA881X_SPKR_PROT_FE_GAIN (WSA881X_ANALOG_BASE+0x003A)
#define WSA881X_SPKR_PROT_FE_CM_LDO_SET (WSA881X_ANALOG_BASE+0x003B)
#define WSA881X_SPKR_PROT_FE_ISENSE_BIAS_SET1 (WSA881X_ANALOG_BASE+0x003C)
#define WSA881X_SPKR_PROT_FE_ISENSE_BIAS_SET2 (WSA881X_ANALOG_BASE+0x003D)
#define WSA881X_SPKR_PROT_ATEST1 (WSA881X_ANALOG_BASE+0x003E)
#define WSA881X_SPKR_PROT_ATEST2 (WSA881X_ANALOG_BASE+0x003F)
#define WSA881X_SPKR_PROT_FE_VSENSE_VCM (WSA881X_ANALOG_BASE+0x0040)
#define WSA881X_SPKR_PROT_FE_VSENSE_BIAS_SET1 (WSA881X_ANALOG_BASE+0x0041)
#define WSA881X_BONGO_RESRV_REG1 (WSA881X_ANALOG_BASE+0x0042)
#define WSA881X_BONGO_RESRV_REG2 (WSA881X_ANALOG_BASE+0x0043)
#define WSA881X_SPKR_PROT_SAR (WSA881X_ANALOG_BASE+0x0044)
#define WSA881X_SPKR_STATUS3 (WSA881X_ANALOG_BASE+0x0045)
#define WSA881X_NUM_REGISTERS (WSA881X_SPKR_STATUS3+1)
#define WSA881X_MAX_REGISTER (WSA881X_NUM_REGISTERS-1)
#define WSA881X_CACHE_SIZE WSA881X_NUM_REGISTERS
#endif /* WSA881X_REGISTERS_H */

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asoc/codecs/wsa881x-regmap-analog.c
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/*
* Copyright (c) 2015, 2017 The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <linux/regmap.h>
#include <linux/device.h>
#include "wsa881x-registers-analog.h"
#include "wsa881x-analog.h"
struct reg_default wsa881x_ana_reg_defaults[] = {
{WSA881X_CHIP_ID0, 0x00},
{WSA881X_CHIP_ID1, 0x00},
{WSA881X_CHIP_ID2, 0x00},
{WSA881X_CHIP_ID3, 0x02},
{WSA881X_BUS_ID, 0x00},
{WSA881X_CDC_RST_CTL, 0x00},
{WSA881X_CDC_TOP_CLK_CTL, 0x03},
{WSA881X_CDC_ANA_CLK_CTL, 0x00},
{WSA881X_CDC_DIG_CLK_CTL, 0x00},
{WSA881X_CLOCK_CONFIG, 0x00},
{WSA881X_ANA_CTL, 0x08},
{WSA881X_SWR_RESET_EN, 0x00},
{WSA881X_TEMP_DETECT_CTL, 0x01},
{WSA881X_TEMP_MSB, 0x00},
{WSA881X_TEMP_LSB, 0x00},
{WSA881X_TEMP_CONFIG0, 0x00},
{WSA881X_TEMP_CONFIG1, 0x00},
{WSA881X_CDC_CLIP_CTL, 0x03},
{WSA881X_SDM_PDM9_LSB, 0x00},
{WSA881X_SDM_PDM9_MSB, 0x00},
{WSA881X_CDC_RX_CTL, 0x7E},
{WSA881X_DEM_BYPASS_DATA0, 0x00},
{WSA881X_DEM_BYPASS_DATA1, 0x00},
{WSA881X_DEM_BYPASS_DATA2, 0x00},
{WSA881X_DEM_BYPASS_DATA3, 0x00},
{WSA881X_OTP_CTRL0, 0x00},
{WSA881X_OTP_CTRL1, 0x00},
{WSA881X_HDRIVE_CTL_GROUP1, 0x00},
{WSA881X_INTR_MODE, 0x00},
{WSA881X_INTR_MASK, 0x1F},
{WSA881X_INTR_STATUS, 0x00},
{WSA881X_INTR_CLEAR, 0x00},
{WSA881X_INTR_LEVEL, 0x00},
{WSA881X_INTR_SET, 0x00},
{WSA881X_INTR_TEST, 0x00},
{WSA881X_PDM_TEST_MODE, 0x00},
{WSA881X_ATE_TEST_MODE, 0x00},
{WSA881X_PIN_CTL_MODE, 0x00},
{WSA881X_PIN_CTL_OE, 0x00},
{WSA881X_PIN_WDATA_IOPAD, 0x00},
{WSA881X_PIN_STATUS, 0x00},
{WSA881X_DIG_DEBUG_MODE, 0x00},
{WSA881X_DIG_DEBUG_SEL, 0x00},
{WSA881X_DIG_DEBUG_EN, 0x00},
{WSA881X_SWR_HM_TEST1, 0x08},
{WSA881X_SWR_HM_TEST2, 0x00},
{WSA881X_TEMP_DETECT_DBG_CTL, 0x00},
{WSA881X_TEMP_DEBUG_MSB, 0x00},
{WSA881X_TEMP_DEBUG_LSB, 0x00},
{WSA881X_SAMPLE_EDGE_SEL, 0x0C},
{WSA881X_SPARE_0, 0x00},
{WSA881X_SPARE_1, 0x00},
{WSA881X_SPARE_2, 0x00},
{WSA881X_OTP_REG_0, 0x01},
{WSA881X_OTP_REG_1, 0xFF},
{WSA881X_OTP_REG_2, 0xC0},
{WSA881X_OTP_REG_3, 0xFF},
{WSA881X_OTP_REG_4, 0xC0},
{WSA881X_OTP_REG_5, 0xFF},
{WSA881X_OTP_REG_6, 0xFF},
{WSA881X_OTP_REG_7, 0xFF},
{WSA881X_OTP_REG_8, 0xFF},
{WSA881X_OTP_REG_9, 0xFF},
{WSA881X_OTP_REG_10, 0xFF},
{WSA881X_OTP_REG_11, 0xFF},
{WSA881X_OTP_REG_12, 0xFF},
{WSA881X_OTP_REG_13, 0xFF},
{WSA881X_OTP_REG_14, 0xFF},
{WSA881X_OTP_REG_15, 0xFF},
{WSA881X_OTP_REG_16, 0xFF},
{WSA881X_OTP_REG_17, 0xFF},
{WSA881X_OTP_REG_18, 0xFF},
{WSA881X_OTP_REG_19, 0xFF},
{WSA881X_OTP_REG_20, 0xFF},
{WSA881X_OTP_REG_21, 0xFF},
{WSA881X_OTP_REG_22, 0xFF},
{WSA881X_OTP_REG_23, 0xFF},
{WSA881X_OTP_REG_24, 0x03},
{WSA881X_OTP_REG_25, 0x01},
{WSA881X_OTP_REG_26, 0x03},
{WSA881X_OTP_REG_27, 0x11},
{WSA881X_OTP_REG_28, 0xFF},
{WSA881X_OTP_REG_29, 0xFF},
{WSA881X_OTP_REG_30, 0xFF},
{WSA881X_OTP_REG_31, 0xFF},
{WSA881X_OTP_REG_63, 0x40},
/* WSA881x Analog registers */
{WSA881X_BIAS_REF_CTRL, 0x6C},
{WSA881X_BIAS_TEST, 0x16},
{WSA881X_BIAS_BIAS, 0xF0},
{WSA881X_TEMP_OP, 0x00},
{WSA881X_TEMP_IREF_CTRL, 0x56},
{WSA881X_TEMP_ISENS_CTRL, 0x47},
{WSA881X_TEMP_CLK_CTRL, 0x87},
{WSA881X_TEMP_TEST, 0x00},
{WSA881X_TEMP_BIAS, 0x51},
{WSA881X_TEMP_ADC_CTRL, 0x00},
{WSA881X_TEMP_DOUT_MSB, 0x00},
{WSA881X_TEMP_DOUT_LSB, 0x00},
{WSA881X_ADC_EN_MODU_V, 0x00},
{WSA881X_ADC_EN_MODU_I, 0x00},
{WSA881X_ADC_EN_DET_TEST_V, 0x00},
{WSA881X_ADC_EN_DET_TEST_I, 0x00},
{WSA881X_ADC_SEL_IBIAS, 0x25},
{WSA881X_ADC_EN_SEL_IBIAS, 0x10},
{WSA881X_SPKR_DRV_EN, 0x74},
{WSA881X_SPKR_DRV_GAIN, 0x01},
{WSA881X_SPKR_DAC_CTL, 0x40},
{WSA881X_SPKR_DRV_DBG, 0x15},
{WSA881X_SPKR_PWRSTG_DBG, 0x00},
{WSA881X_SPKR_OCP_CTL, 0xD4},
{WSA881X_SPKR_CLIP_CTL, 0x90},
{WSA881X_SPKR_BBM_CTL, 0x00},
{WSA881X_SPKR_MISC_CTL1, 0x80},
{WSA881X_SPKR_MISC_CTL2, 0x00},
{WSA881X_SPKR_BIAS_INT, 0x56},
{WSA881X_SPKR_PA_INT, 0x54},
{WSA881X_SPKR_BIAS_CAL, 0xAC},
{WSA881X_SPKR_BIAS_PSRR, 0x54},
{WSA881X_SPKR_STATUS1, 0x00},
{WSA881X_SPKR_STATUS2, 0x00},
{WSA881X_BOOST_EN_CTL, 0x18},
{WSA881X_BOOST_CURRENT_LIMIT, 0x7A},
{WSA881X_BOOST_PS_CTL, 0xC0},
{WSA881X_BOOST_PRESET_OUT1, 0x77},
{WSA881X_BOOST_PRESET_OUT2, 0x70},
{WSA881X_BOOST_FORCE_OUT, 0x0E},
{WSA881X_BOOST_LDO_PROG, 0x16},
{WSA881X_BOOST_SLOPE_COMP_ISENSE_FB, 0x71},
{WSA881X_BOOST_RON_CTL, 0x0F},
{WSA881X_BOOST_LOOP_STABILITY, 0xAD},
{WSA881X_BOOST_ZX_CTL, 0x34},
{WSA881X_BOOST_START_CTL, 0x23},
{WSA881X_BOOST_MISC1_CTL, 0x80},
{WSA881X_BOOST_MISC2_CTL, 0x00},
{WSA881X_BOOST_MISC3_CTL, 0x00},
{WSA881X_BOOST_ATEST_CTL, 0x00},
{WSA881X_SPKR_PROT_FE_GAIN, 0x46},
{WSA881X_SPKR_PROT_FE_CM_LDO_SET, 0x3B},
{WSA881X_SPKR_PROT_FE_ISENSE_BIAS_SET1, 0x8D},
{WSA881X_SPKR_PROT_FE_ISENSE_BIAS_SET2, 0x8D},
{WSA881X_SPKR_PROT_ATEST1, 0x01},
{WSA881X_SPKR_PROT_ATEST2, 0x00},
{WSA881X_SPKR_PROT_FE_VSENSE_VCM, 0x8D},
{WSA881X_SPKR_PROT_FE_VSENSE_BIAS_SET1, 0x4D},
{WSA881X_BONGO_RESRV_REG1, 0x00},
{WSA881X_BONGO_RESRV_REG2, 0x00},
{WSA881X_SPKR_PROT_SAR, 0x00},
{WSA881X_SPKR_STATUS3, 0x00},
};
struct reg_default wsa881x_ana_reg_defaults_0[] = {
{WSA881X_CHIP_ID0, 0x00},
{WSA881X_CHIP_ID1, 0x00},
{WSA881X_CHIP_ID2, 0x00},
{WSA881X_CHIP_ID3, 0x02},
{WSA881X_BUS_ID, 0x00},
{WSA881X_CDC_RST_CTL, 0x00},
{WSA881X_CDC_TOP_CLK_CTL, 0x03},
{WSA881X_CDC_ANA_CLK_CTL, 0x00},
{WSA881X_CDC_DIG_CLK_CTL, 0x00},
{WSA881X_CLOCK_CONFIG, 0x00},
{WSA881X_ANA_CTL, 0x08},
{WSA881X_SWR_RESET_EN, 0x00},
{WSA881X_TEMP_DETECT_CTL, 0x01},
{WSA881X_TEMP_MSB, 0x00},
{WSA881X_TEMP_LSB, 0x00},
{WSA881X_TEMP_CONFIG0, 0x00},
{WSA881X_TEMP_CONFIG1, 0x00},
{WSA881X_CDC_CLIP_CTL, 0x03},
{WSA881X_SDM_PDM9_LSB, 0x00},
{WSA881X_SDM_PDM9_MSB, 0x00},
{WSA881X_CDC_RX_CTL, 0x7E},
{WSA881X_DEM_BYPASS_DATA0, 0x00},
{WSA881X_DEM_BYPASS_DATA1, 0x00},
{WSA881X_DEM_BYPASS_DATA2, 0x00},
{WSA881X_DEM_BYPASS_DATA3, 0x00},
{WSA881X_OTP_CTRL0, 0x00},
{WSA881X_OTP_CTRL1, 0x00},
{WSA881X_HDRIVE_CTL_GROUP1, 0x00},
{WSA881X_INTR_MODE, 0x00},
{WSA881X_INTR_MASK, 0x1F},
{WSA881X_INTR_STATUS, 0x00},
{WSA881X_INTR_CLEAR, 0x00},
{WSA881X_INTR_LEVEL, 0x00},
{WSA881X_INTR_SET, 0x00},
{WSA881X_INTR_TEST, 0x00},
{WSA881X_PDM_TEST_MODE, 0x00},
{WSA881X_ATE_TEST_MODE, 0x00},
{WSA881X_PIN_CTL_MODE, 0x00},
{WSA881X_PIN_CTL_OE, 0x00},
{WSA881X_PIN_WDATA_IOPAD, 0x00},
{WSA881X_PIN_STATUS, 0x00},
{WSA881X_DIG_DEBUG_MODE, 0x00},
{WSA881X_DIG_DEBUG_SEL, 0x00},
{WSA881X_DIG_DEBUG_EN, 0x00},
{WSA881X_SWR_HM_TEST1, 0x08},
{WSA881X_SWR_HM_TEST2, 0x00},
{WSA881X_TEMP_DETECT_DBG_CTL, 0x00},
{WSA881X_TEMP_DEBUG_MSB, 0x00},
{WSA881X_TEMP_DEBUG_LSB, 0x00},
{WSA881X_SAMPLE_EDGE_SEL, 0x0C},
{WSA881X_SPARE_0, 0x00},
{WSA881X_SPARE_1, 0x00},
{WSA881X_SPARE_2, 0x00},
{WSA881X_OTP_REG_0, 0x01},
{WSA881X_OTP_REG_1, 0xFF},
{WSA881X_OTP_REG_2, 0xC0},
{WSA881X_OTP_REG_3, 0xFF},
{WSA881X_OTP_REG_4, 0xC0},
{WSA881X_OTP_REG_5, 0xFF},
{WSA881X_OTP_REG_6, 0xFF},
{WSA881X_OTP_REG_7, 0xFF},
{WSA881X_OTP_REG_8, 0xFF},
{WSA881X_OTP_REG_9, 0xFF},
{WSA881X_OTP_REG_10, 0xFF},
{WSA881X_OTP_REG_11, 0xFF},
{WSA881X_OTP_REG_12, 0xFF},
{WSA881X_OTP_REG_13, 0xFF},
{WSA881X_OTP_REG_14, 0xFF},
{WSA881X_OTP_REG_15, 0xFF},
{WSA881X_OTP_REG_16, 0xFF},
{WSA881X_OTP_REG_17, 0xFF},
{WSA881X_OTP_REG_18, 0xFF},
{WSA881X_OTP_REG_19, 0xFF},
{WSA881X_OTP_REG_20, 0xFF},
{WSA881X_OTP_REG_21, 0xFF},
{WSA881X_OTP_REG_22, 0xFF},
{WSA881X_OTP_REG_23, 0xFF},
{WSA881X_OTP_REG_24, 0x03},
{WSA881X_OTP_REG_25, 0x01},
{WSA881X_OTP_REG_26, 0x03},
{WSA881X_OTP_REG_27, 0x11},
{WSA881X_OTP_REG_28, 0xFF},
{WSA881X_OTP_REG_29, 0xFF},
{WSA881X_OTP_REG_30, 0xFF},
{WSA881X_OTP_REG_31, 0xFF},
{WSA881X_OTP_REG_63, 0x40},
};
struct reg_default wsa881x_ana_reg_defaults_1[] = {
{WSA881X_BIAS_REF_CTRL - WSA881X_ANALOG_BASE, 0x6C},
{WSA881X_BIAS_TEST - WSA881X_ANALOG_BASE, 0x16},
{WSA881X_BIAS_BIAS - WSA881X_ANALOG_BASE, 0xF0},
{WSA881X_TEMP_OP - WSA881X_ANALOG_BASE, 0x00},
{WSA881X_TEMP_IREF_CTRL - WSA881X_ANALOG_BASE, 0x56},
{WSA881X_TEMP_ISENS_CTRL - WSA881X_ANALOG_BASE, 0x47},
{WSA881X_TEMP_CLK_CTRL - WSA881X_ANALOG_BASE, 0x87},
{WSA881X_TEMP_TEST - WSA881X_ANALOG_BASE, 0x00},
{WSA881X_TEMP_BIAS - WSA881X_ANALOG_BASE, 0x51},
{WSA881X_TEMP_ADC_CTRL - WSA881X_ANALOG_BASE, 0x00},
{WSA881X_TEMP_DOUT_MSB - WSA881X_ANALOG_BASE, 0x00},
{WSA881X_TEMP_DOUT_LSB - WSA881X_ANALOG_BASE, 0x00},
{WSA881X_ADC_EN_MODU_V - WSA881X_ANALOG_BASE, 0x00},
{WSA881X_ADC_EN_MODU_I - WSA881X_ANALOG_BASE, 0x00},
{WSA881X_ADC_EN_DET_TEST_V - WSA881X_ANALOG_BASE, 0x00},
{WSA881X_ADC_EN_DET_TEST_I - WSA881X_ANALOG_BASE, 0x00},
{WSA881X_ADC_SEL_IBIAS - WSA881X_ANALOG_BASE, 0x25},
{WSA881X_ADC_EN_SEL_IBIAS - WSA881X_ANALOG_BASE, 0x10},
{WSA881X_SPKR_DRV_EN - WSA881X_ANALOG_BASE, 0x74},
{WSA881X_SPKR_DRV_GAIN - WSA881X_ANALOG_BASE, 0x01},
{WSA881X_SPKR_DAC_CTL - WSA881X_ANALOG_BASE, 0x40},
{WSA881X_SPKR_DRV_DBG - WSA881X_ANALOG_BASE, 0x15},
{WSA881X_SPKR_PWRSTG_DBG - WSA881X_ANALOG_BASE, 0x00},
{WSA881X_SPKR_OCP_CTL - WSA881X_ANALOG_BASE, 0xD4},
{WSA881X_SPKR_CLIP_CTL - WSA881X_ANALOG_BASE, 0x90},
{WSA881X_SPKR_BBM_CTL - WSA881X_ANALOG_BASE, 0x00},
{WSA881X_SPKR_MISC_CTL1 - WSA881X_ANALOG_BASE, 0x80},
{WSA881X_SPKR_MISC_CTL2 - WSA881X_ANALOG_BASE, 0x00},
{WSA881X_SPKR_BIAS_INT - WSA881X_ANALOG_BASE, 0x56},
{WSA881X_SPKR_PA_INT - WSA881X_ANALOG_BASE, 0x54},
{WSA881X_SPKR_BIAS_CAL - WSA881X_ANALOG_BASE, 0xAC},
{WSA881X_SPKR_BIAS_PSRR - WSA881X_ANALOG_BASE, 0x54},
{WSA881X_SPKR_STATUS1 - WSA881X_ANALOG_BASE, 0x00},
{WSA881X_SPKR_STATUS2 - WSA881X_ANALOG_BASE, 0x00},
{WSA881X_BOOST_EN_CTL - WSA881X_ANALOG_BASE, 0x18},
{WSA881X_BOOST_CURRENT_LIMIT - WSA881X_ANALOG_BASE, 0x7A},
{WSA881X_BOOST_PS_CTL - WSA881X_ANALOG_BASE, 0xC0},
{WSA881X_BOOST_PRESET_OUT1 - WSA881X_ANALOG_BASE, 0x77},
{WSA881X_BOOST_PRESET_OUT2 - WSA881X_ANALOG_BASE, 0x70},
{WSA881X_BOOST_FORCE_OUT - WSA881X_ANALOG_BASE, 0x0E},
{WSA881X_BOOST_LDO_PROG - WSA881X_ANALOG_BASE, 0x16},
{WSA881X_BOOST_SLOPE_COMP_ISENSE_FB - WSA881X_ANALOG_BASE, 0x71},
{WSA881X_BOOST_RON_CTL - WSA881X_ANALOG_BASE, 0x0F},
{WSA881X_BOOST_LOOP_STABILITY - WSA881X_ANALOG_BASE, 0xAD},
{WSA881X_BOOST_ZX_CTL - WSA881X_ANALOG_BASE, 0x34},
{WSA881X_BOOST_START_CTL - WSA881X_ANALOG_BASE, 0x23},
{WSA881X_BOOST_MISC1_CTL - WSA881X_ANALOG_BASE, 0x80},
{WSA881X_BOOST_MISC2_CTL - WSA881X_ANALOG_BASE, 0x00},
{WSA881X_BOOST_MISC3_CTL - WSA881X_ANALOG_BASE, 0x00},
{WSA881X_BOOST_ATEST_CTL - WSA881X_ANALOG_BASE, 0x00},
{WSA881X_SPKR_PROT_FE_GAIN - WSA881X_ANALOG_BASE, 0x46},
{WSA881X_SPKR_PROT_FE_CM_LDO_SET - WSA881X_ANALOG_BASE, 0x3B},
{WSA881X_SPKR_PROT_FE_ISENSE_BIAS_SET1 - WSA881X_ANALOG_BASE, 0x8D},
{WSA881X_SPKR_PROT_FE_ISENSE_BIAS_SET2 - WSA881X_ANALOG_BASE, 0x8D},
{WSA881X_SPKR_PROT_ATEST1 - WSA881X_ANALOG_BASE, 0x01},
{WSA881X_SPKR_PROT_ATEST2 - WSA881X_ANALOG_BASE, 0x00},
{WSA881X_SPKR_PROT_FE_VSENSE_VCM - WSA881X_ANALOG_BASE, 0x8D},
{WSA881X_SPKR_PROT_FE_VSENSE_BIAS_SET1 - WSA881X_ANALOG_BASE, 0x4D},
{WSA881X_BONGO_RESRV_REG1 - WSA881X_ANALOG_BASE, 0x00},
{WSA881X_BONGO_RESRV_REG2 - WSA881X_ANALOG_BASE, 0x00},
{WSA881X_SPKR_PROT_SAR - WSA881X_ANALOG_BASE, 0x00},
{WSA881X_SPKR_STATUS3 - WSA881X_ANALOG_BASE, 0x00},
};
struct reg_default wsa881x_rev_2_0_dig[] = {
{WSA881X_RESET_CTL, 0x00},
{WSA881X_TADC_VALUE_CTL, 0x01},
{WSA881X_INTR_MASK, 0x1B},
{WSA881X_IOPAD_CTL, 0x00},
{WSA881X_OTP_REG_28, 0x3F},
{WSA881X_OTP_REG_29, 0x3F},
{WSA881X_OTP_REG_30, 0x01},
{WSA881X_OTP_REG_31, 0x01},
};
struct reg_default wsa881x_rev_2_0_ana[] = {
{WSA881X_TEMP_ADC_CTRL, 0x03},
{WSA881X_ADC_SEL_IBIAS, 0x45},
{WSA881X_SPKR_DRV_GAIN, 0xC1},
{WSA881X_SPKR_DAC_CTL, 0x42},
{WSA881X_SPKR_BBM_CTL, 0x02},
{WSA881X_SPKR_MISC_CTL1, 0x40},
{WSA881X_SPKR_MISC_CTL2, 0x07},
{WSA881X_SPKR_BIAS_INT, 0x5F},
{WSA881X_SPKR_BIAS_PSRR, 0x44},
{WSA881X_BOOST_PS_CTL, 0xA0},
{WSA881X_BOOST_PRESET_OUT1, 0xB7},
{WSA881X_BOOST_LOOP_STABILITY, 0x8D},
{WSA881X_SPKR_PROT_ATEST2, 0x02},
{WSA881X_BONGO_RESRV_REG1, 0x5E},
{WSA881X_BONGO_RESRV_REG2, 0x07},
};
struct reg_default wsa881x_rev_2_0_regmap_ana[] = {
{WSA881X_TEMP_ADC_CTRL - WSA881X_ANALOG_BASE, 0x03},
{WSA881X_ADC_SEL_IBIAS - WSA881X_ANALOG_BASE, 0x45},
{WSA881X_SPKR_DRV_GAIN - WSA881X_ANALOG_BASE, 0xC1},
{WSA881X_SPKR_DAC_CTL - WSA881X_ANALOG_BASE, 0x42},
{WSA881X_SPKR_BBM_CTL - WSA881X_ANALOG_BASE, 0x02},
{WSA881X_SPKR_MISC_CTL1 - WSA881X_ANALOG_BASE, 0x40},
{WSA881X_SPKR_MISC_CTL2 - WSA881X_ANALOG_BASE, 0x07},
{WSA881X_SPKR_BIAS_INT - WSA881X_ANALOG_BASE, 0x5F},
{WSA881X_SPKR_BIAS_PSRR - WSA881X_ANALOG_BASE, 0x44},
{WSA881X_BOOST_PS_CTL - WSA881X_ANALOG_BASE, 0xA0},
{WSA881X_BOOST_PRESET_OUT1 - WSA881X_ANALOG_BASE, 0xB7},
{WSA881X_BOOST_LOOP_STABILITY - WSA881X_ANALOG_BASE, 0x8D},
{WSA881X_SPKR_PROT_ATEST2 - WSA881X_ANALOG_BASE, 0x02},
{WSA881X_BONGO_RESRV_REG1 - WSA881X_ANALOG_BASE, 0x5E},
{WSA881X_BONGO_RESRV_REG2 - WSA881X_ANALOG_BASE, 0x07},
};
/**
* wsa881x_update_reg_defaults_2_0 - update default values of regs for v2.0
*
* WSA881x v2.0 has different default values for certain analog and digital
* registers compared to v1.x. Therefore, update the values of these registers
* with the values from tables defined above for v2.0.
*/
void wsa881x_update_reg_defaults_2_0(void)
{
int i, j;
for (i = 0; i < ARRAY_SIZE(wsa881x_rev_2_0_dig); i++) {
for (j = 0; j < ARRAY_SIZE(wsa881x_ana_reg_defaults); j++)
if (wsa881x_ana_reg_defaults[j].reg ==
wsa881x_rev_2_0_dig[i].reg)
wsa881x_ana_reg_defaults[j].def =
wsa881x_rev_2_0_dig[i].def;
}
for (i = 0; i < ARRAY_SIZE(wsa881x_rev_2_0_ana); i++) {
for (j = 0; j < ARRAY_SIZE(wsa881x_ana_reg_defaults); j++)
if (wsa881x_ana_reg_defaults[j].reg ==
wsa881x_rev_2_0_ana[i].reg)
wsa881x_ana_reg_defaults[j].def =
wsa881x_rev_2_0_ana[i].def;
}
}
EXPORT_SYMBOL(wsa881x_update_reg_defaults_2_0);
/**
* wsa881x_update_regmap_2_0 - update regmap framework with new tables
* @regmap: pointer to WSA881x regmap structure
* @flag: indicates digital or analog WSA881x slave
*
* WSA881x v2.0 has some new registers for both analog and digital slaves.
* Update the regmap framework with all the new registers.
*/
void wsa881x_update_regmap_2_0(struct regmap *regmap, int flag)
{
u16 ret = 0;
switch (flag) {
case WSA881X_DIGITAL_SLAVE:
ret = regmap_register_patch(regmap, wsa881x_rev_2_0_dig,
ARRAY_SIZE(wsa881x_rev_2_0_dig));
break;
case WSA881X_ANALOG_SLAVE:
ret = regmap_register_patch(regmap, wsa881x_rev_2_0_ana,
ARRAY_SIZE(wsa881x_rev_2_0_ana));
break;
default:
pr_debug("%s: unknown version", __func__);
ret = -EINVAL;
break;
}
if (ret)
pr_err("%s: Failed to update regmap defaults ret= %d\n",
__func__, ret);
}
EXPORT_SYMBOL(wsa881x_update_regmap_2_0);
static bool wsa881x_readable_register(struct device *dev, unsigned int reg)
{
return wsa881x_ana_reg_readable[reg];
}
static bool wsa881x_volatile_register(struct device *dev, unsigned int reg)
{
switch (reg) {
case WSA881X_CHIP_ID0:
case WSA881X_CHIP_ID1:
case WSA881X_CHIP_ID2:
case WSA881X_CHIP_ID3:
case WSA881X_BUS_ID:
case WSA881X_TEMP_MSB:
case WSA881X_TEMP_LSB:
case WSA881X_SDM_PDM9_LSB:
case WSA881X_SDM_PDM9_MSB:
case WSA881X_OTP_REG_0:
case WSA881X_OTP_REG_1:
case WSA881X_OTP_REG_2:
case WSA881X_OTP_REG_3:
case WSA881X_OTP_REG_4:
case WSA881X_OTP_REG_5:
case WSA881X_OTP_REG_31:
case WSA881X_TEMP_DOUT_MSB:
case WSA881X_TEMP_DOUT_LSB:
case WSA881X_TEMP_OP:
case WSA881X_OTP_CTRL1:
case WSA881X_INTR_STATUS:
case WSA881X_ATE_TEST_MODE:
case WSA881X_PIN_STATUS:
case WSA881X_SWR_HM_TEST2:
case WSA881X_SPKR_STATUS1:
case WSA881X_SPKR_STATUS2:
case WSA881X_SPKR_STATUS3:
case WSA881X_SPKR_PROT_SAR:
return true;
default:
return false;
}
}
struct regmap_config wsa881x_ana_regmap_config[] = {
{
.reg_bits = 8,
.val_bits = 8,
.cache_type = REGCACHE_NONE,
.reg_defaults = wsa881x_ana_reg_defaults_0,
.num_reg_defaults = ARRAY_SIZE(wsa881x_ana_reg_defaults_0),
.max_register = WSA881X_MAX_REGISTER,
.volatile_reg = wsa881x_volatile_register,
.readable_reg = wsa881x_readable_register,
.reg_format_endian = REGMAP_ENDIAN_NATIVE,
.val_format_endian = REGMAP_ENDIAN_NATIVE,
},
{
.reg_bits = 8,
.val_bits = 8,
.cache_type = REGCACHE_NONE,
.reg_defaults = wsa881x_ana_reg_defaults_1,
.num_reg_defaults = ARRAY_SIZE(wsa881x_ana_reg_defaults_1),
.max_register = WSA881X_MAX_REGISTER,
.volatile_reg = wsa881x_volatile_register,
.readable_reg = wsa881x_readable_register,
.reg_format_endian = REGMAP_ENDIAN_NATIVE,
.val_format_endian = REGMAP_ENDIAN_NATIVE,
}
};

171
asoc/codecs/wsa881x-tables-analog.c
View file

@ -1,171 +0,0 @@
/*
* Copyright (c) 2015, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <linux/regmap.h>
#include <linux/device.h>
#include "wsa881x-registers-analog.h"
const u8 wsa881x_ana_reg_readable[WSA881X_CACHE_SIZE] = {
[WSA881X_CHIP_ID0] = 1,
[WSA881X_CHIP_ID1] = 1,
[WSA881X_CHIP_ID2] = 1,
[WSA881X_CHIP_ID3] = 1,
[WSA881X_BUS_ID] = 1,
[WSA881X_CDC_RST_CTL] = 1,
[WSA881X_CDC_TOP_CLK_CTL] = 1,
[WSA881X_CDC_ANA_CLK_CTL] = 1,
[WSA881X_CDC_DIG_CLK_CTL] = 1,
[WSA881X_CLOCK_CONFIG] = 1,
[WSA881X_ANA_CTL] = 1,
[WSA881X_SWR_RESET_EN] = 1,
[WSA881X_RESET_CTL] = 1,
[WSA881X_TADC_VALUE_CTL] = 1,
[WSA881X_TEMP_DETECT_CTL] = 1,
[WSA881X_TEMP_MSB] = 1,
[WSA881X_TEMP_LSB] = 1,
[WSA881X_TEMP_CONFIG0] = 1,
[WSA881X_TEMP_CONFIG1] = 1,
[WSA881X_CDC_CLIP_CTL] = 1,
[WSA881X_SDM_PDM9_LSB] = 1,
[WSA881X_SDM_PDM9_MSB] = 1,
[WSA881X_CDC_RX_CTL] = 1,
[WSA881X_DEM_BYPASS_DATA0] = 1,
[WSA881X_DEM_BYPASS_DATA1] = 1,
[WSA881X_DEM_BYPASS_DATA2] = 1,
[WSA881X_DEM_BYPASS_DATA3] = 1,
[WSA881X_OTP_CTRL0] = 1,
[WSA881X_OTP_CTRL1] = 1,
[WSA881X_HDRIVE_CTL_GROUP1] = 1,
[WSA881X_INTR_MODE] = 1,
[WSA881X_INTR_MASK] = 1,
[WSA881X_INTR_STATUS] = 1,
[WSA881X_INTR_CLEAR] = 1,
[WSA881X_INTR_LEVEL] = 1,
[WSA881X_INTR_SET] = 1,
[WSA881X_INTR_TEST] = 1,
[WSA881X_PDM_TEST_MODE] = 1,
[WSA881X_ATE_TEST_MODE] = 1,
[WSA881X_PIN_CTL_MODE] = 1,
[WSA881X_PIN_CTL_OE] = 1,
[WSA881X_PIN_WDATA_IOPAD] = 1,
[WSA881X_PIN_STATUS] = 1,
[WSA881X_DIG_DEBUG_MODE] = 1,
[WSA881X_DIG_DEBUG_SEL] = 1,
[WSA881X_DIG_DEBUG_EN] = 1,
[WSA881X_SWR_HM_TEST1] = 1,
[WSA881X_SWR_HM_TEST2] = 1,
[WSA881X_TEMP_DETECT_DBG_CTL] = 1,
[WSA881X_TEMP_DEBUG_MSB] = 1,
[WSA881X_TEMP_DEBUG_LSB] = 1,
[WSA881X_SAMPLE_EDGE_SEL] = 1,
[WSA881X_IOPAD_CTL] = 1,
[WSA881X_SPARE_0] = 1,
[WSA881X_SPARE_1] = 1,
[WSA881X_SPARE_2] = 1,
[WSA881X_OTP_REG_0] = 1,
[WSA881X_OTP_REG_1] = 1,
[WSA881X_OTP_REG_2] = 1,
[WSA881X_OTP_REG_3] = 1,
[WSA881X_OTP_REG_4] = 1,
[WSA881X_OTP_REG_5] = 1,
[WSA881X_OTP_REG_6] = 1,
[WSA881X_OTP_REG_7] = 1,
[WSA881X_OTP_REG_8] = 1,
[WSA881X_OTP_REG_9] = 1,
[WSA881X_OTP_REG_10] = 1,
[WSA881X_OTP_REG_11] = 1,
[WSA881X_OTP_REG_12] = 1,
[WSA881X_OTP_REG_13] = 1,
[WSA881X_OTP_REG_14] = 1,
[WSA881X_OTP_REG_15] = 1,
[WSA881X_OTP_REG_16] = 1,
[WSA881X_OTP_REG_17] = 1,
[WSA881X_OTP_REG_18] = 1,
[WSA881X_OTP_REG_19] = 1,
[WSA881X_OTP_REG_20] = 1,
[WSA881X_OTP_REG_21] = 1,
[WSA881X_OTP_REG_22] = 1,
[WSA881X_OTP_REG_23] = 1,
[WSA881X_OTP_REG_24] = 1,
[WSA881X_OTP_REG_25] = 1,
[WSA881X_OTP_REG_26] = 1,
[WSA881X_OTP_REG_27] = 1,
[WSA881X_OTP_REG_28] = 1,
[WSA881X_OTP_REG_29] = 1,
[WSA881X_OTP_REG_30] = 1,
[WSA881X_OTP_REG_31] = 1,
[WSA881X_OTP_REG_63] = 1,
/* Analog Registers */
[WSA881X_BIAS_REF_CTRL] = 1,
[WSA881X_BIAS_TEST] = 1,
[WSA881X_BIAS_BIAS] = 1,
[WSA881X_TEMP_OP] = 1,
[WSA881X_TEMP_IREF_CTRL] = 1,
[WSA881X_TEMP_ISENS_CTRL] = 1,
[WSA881X_TEMP_CLK_CTRL] = 1,
[WSA881X_TEMP_TEST] = 1,
[WSA881X_TEMP_BIAS] = 1,
[WSA881X_TEMP_ADC_CTRL] = 1,
[WSA881X_TEMP_DOUT_MSB] = 1,
[WSA881X_TEMP_DOUT_LSB] = 1,
[WSA881X_ADC_EN_MODU_V] = 1,
[WSA881X_ADC_EN_MODU_I] = 1,
[WSA881X_ADC_EN_DET_TEST_V] = 1,
[WSA881X_ADC_EN_DET_TEST_I] = 1,
[WSA881X_ADC_SEL_IBIAS] = 1,
[WSA881X_ADC_EN_SEL_IBIAS] = 1,
[WSA881X_SPKR_DRV_EN] = 1,
[WSA881X_SPKR_DRV_GAIN] = 1,
[WSA881X_SPKR_DAC_CTL] = 1,
[WSA881X_SPKR_DRV_DBG] = 1,
[WSA881X_SPKR_PWRSTG_DBG] = 1,
[WSA881X_SPKR_OCP_CTL] = 1,
[WSA881X_SPKR_CLIP_CTL] = 1,
[WSA881X_SPKR_BBM_CTL] = 1,
[WSA881X_SPKR_MISC_CTL1] = 1,
[WSA881X_SPKR_MISC_CTL2] = 1,
[WSA881X_SPKR_BIAS_INT] = 1,
[WSA881X_SPKR_PA_INT] = 1,
[WSA881X_SPKR_BIAS_CAL] = 1,
[WSA881X_SPKR_BIAS_PSRR] = 1,
[WSA881X_SPKR_STATUS1] = 1,
[WSA881X_SPKR_STATUS2] = 1,
[WSA881X_BOOST_EN_CTL] = 1,
[WSA881X_BOOST_CURRENT_LIMIT] = 1,
[WSA881X_BOOST_PS_CTL] = 1,
[WSA881X_BOOST_PRESET_OUT1] = 1,
[WSA881X_BOOST_PRESET_OUT2] = 1,
[WSA881X_BOOST_FORCE_OUT] = 1,
[WSA881X_BOOST_LDO_PROG] = 1,
[WSA881X_BOOST_SLOPE_COMP_ISENSE_FB] = 1,
[WSA881X_BOOST_RON_CTL] = 1,
[WSA881X_BOOST_LOOP_STABILITY] = 1,
[WSA881X_BOOST_ZX_CTL] = 1,
[WSA881X_BOOST_START_CTL] = 1,
[WSA881X_BOOST_MISC1_CTL] = 1,
[WSA881X_BOOST_MISC2_CTL] = 1,
[WSA881X_BOOST_MISC3_CTL] = 1,
[WSA881X_BOOST_ATEST_CTL] = 1,
[WSA881X_SPKR_PROT_FE_GAIN] = 1,
[WSA881X_SPKR_PROT_FE_CM_LDO_SET] = 1,
[WSA881X_SPKR_PROT_FE_ISENSE_BIAS_SET1] = 1,
[WSA881X_SPKR_PROT_FE_ISENSE_BIAS_SET2] = 1,
[WSA881X_SPKR_PROT_ATEST1] = 1,
[WSA881X_SPKR_PROT_ATEST2] = 1,
[WSA881X_SPKR_PROT_FE_VSENSE_VCM] = 1,
[WSA881X_SPKR_PROT_FE_VSENSE_BIAS_SET1] = 1,
[WSA881X_BONGO_RESRV_REG1] = 1,
[WSA881X_BONGO_RESRV_REG2] = 1,
[WSA881X_SPKR_PROT_SAR] = 1,
[WSA881X_SPKR_STATUS3] = 1,
};

316
asoc/msm-audio-pinctrl.c
View file

@ -1,316 +0,0 @@
/* Copyright (c) 2015-2017, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <linux/gpio.h>
#include <linux/of_gpio.h>
#include <linux/platform_device.h>
#include "msm-audio-pinctrl.h"
/*
* pinctrl -- handle to query pinctrl apis
* cdc lines -- stores pinctrl handles for pinctrl states
* active_set -- maintain the overall pinctrl state
*/
struct cdc_pinctrl_info {
struct pinctrl *pinctrl;
struct pinctrl_state **cdc_lines;
int active_set;
};
/*
* gpiosets -- stores all gpiosets mentioned in dtsi file
* gpiosets_comb_names -- stores all possible gpioset combinations
* gpioset_state -- maintains counter for each gpioset
* gpiosets_max -- maintain the total supported gpiosets
* gpiosets_comb_max -- maintain the total gpiosets combinations
*/
struct cdc_gpioset_info {
char **gpiosets;
char **gpiosets_comb_names;
uint8_t *gpioset_state;
int gpiosets_max;
int gpiosets_comb_max;
};
static struct cdc_pinctrl_info pinctrl_info[MAX_PINCTRL_CLIENT];
static struct cdc_gpioset_info gpioset_info[MAX_PINCTRL_CLIENT];
/* Finds the index for the gpio set in the dtsi file */
int msm_get_gpioset_index(enum pinctrl_client client, char *keyword)
{
int i;
for (i = 0; i < gpioset_info[client].gpiosets_max; i++) {
if (!(strcmp(gpioset_info[client].gpiosets[i], keyword)))
break;
}
/* Checking if the keyword is present in dtsi or not */
if (i != gpioset_info[client].gpiosets_max)
return i;
else
return -EINVAL;
}
/*
* This function reads the following from dtsi file
* 1. All gpio sets
* 2. All combinations of gpio sets
* 3. Pinctrl handles to gpio sets
*
* Returns error if there is
* 1. Problem reading from dtsi file
* 2. Memory allocation failure
*/
int msm_gpioset_initialize(enum pinctrl_client client,
struct device *dev)
{
struct pinctrl *pinctrl;
const char *gpioset_names = "qcom,msm-gpios";
const char *gpioset_combinations = "qcom,pinctrl-names";
const char *gpioset_names_str = NULL;
const char *gpioset_comb_str = NULL;
int num_strings = 0;
int ret = 0;
int i = 0;
pr_debug("%s\n", __func__);
pinctrl = devm_pinctrl_get(dev);
if (IS_ERR(pinctrl)) {
pr_err("%s: Unable to get pinctrl handle\n",
__func__);
return -EINVAL;
}
pinctrl_info[client].pinctrl = pinctrl;
/* Reading of gpio sets */
num_strings = of_property_count_strings(dev->of_node,
gpioset_names);
if (num_strings < 0) {
dev_err(dev,
"%s: missing %s in dt node or length is incorrect\n",
__func__, gpioset_names);
goto err;
}
gpioset_info[client].gpiosets_max = num_strings;
gpioset_info[client].gpiosets = devm_kzalloc(dev,
gpioset_info[client].gpiosets_max *
sizeof(char *), GFP_KERNEL);
if (!gpioset_info[client].gpiosets) {
dev_err(dev, "Can't allocate memory for gpio set names\n");
ret = -ENOMEM;
goto err;
}
for (i = 0; i < num_strings; i++) {
ret = of_property_read_string_index(dev->of_node,
gpioset_names, i, &gpioset_names_str);
gpioset_info[client].gpiosets[i] = devm_kzalloc(dev,
(strlen(gpioset_names_str) + 1), GFP_KERNEL);
if (!gpioset_info[client].gpiosets[i]) {
dev_err(dev, "%s: Can't allocate gpiosets[%d] data\n",
__func__, i);
ret = -ENOMEM;
goto err;
}
strlcpy(gpioset_info[client].gpiosets[i],
gpioset_names_str, strlen(gpioset_names_str)+1);
gpioset_names_str = NULL;
}
num_strings = 0;
/* Allocating memory for gpio set counter */
gpioset_info[client].gpioset_state = devm_kzalloc(dev,
gpioset_info[client].gpiosets_max *
sizeof(uint8_t), GFP_KERNEL);
if (!gpioset_info[client].gpioset_state) {
dev_err(dev, "Can't allocate memory for gpio set counter\n");
ret = -ENOMEM;
goto err;
}
/* Reading of all combinations of gpio sets */
num_strings = of_property_count_strings(dev->of_node,
gpioset_combinations);
if (num_strings < 0) {
dev_err(dev,
"%s: missing %s in dt node or length is incorrect\n",
__func__, gpioset_combinations);
goto err;
}
gpioset_info[client].gpiosets_comb_max = num_strings;
gpioset_info[client].gpiosets_comb_names = devm_kzalloc(dev,
num_strings * sizeof(char *), GFP_KERNEL);
if (!gpioset_info[client].gpiosets_comb_names) {
ret = -ENOMEM;
goto err;
}
for (i = 0; i < gpioset_info[client].gpiosets_comb_max; i++) {
ret = of_property_read_string_index(dev->of_node,
gpioset_combinations, i, &gpioset_comb_str);
gpioset_info[client].gpiosets_comb_names[i] = devm_kzalloc(dev,
(strlen(gpioset_comb_str) + 1), GFP_KERNEL);
if (!gpioset_info[client].gpiosets_comb_names[i]) {
ret = -ENOMEM;
goto err;
}
strlcpy(gpioset_info[client].gpiosets_comb_names[i],
gpioset_comb_str,
strlen(gpioset_comb_str)+1);
pr_debug("%s: GPIO configuration %s\n",
__func__,
gpioset_info[client].gpiosets_comb_names[i]);
gpioset_comb_str = NULL;
}
/* Allocating memory for handles to pinctrl states */
pinctrl_info[client].cdc_lines = devm_kzalloc(dev,
num_strings * sizeof(char *), GFP_KERNEL);
if (!pinctrl_info[client].cdc_lines) {
ret = -ENOMEM;
goto err;
}
/* Get pinctrl handles for gpio sets in dtsi file */
for (i = 0; i < num_strings; i++) {
pinctrl_info[client].cdc_lines[i] = pinctrl_lookup_state(
pinctrl,
(const char *)gpioset_info[client].
gpiosets_comb_names[i]);
if (IS_ERR(pinctrl_info[client].cdc_lines[i]))
pr_err("%s: Unable to get pinctrl handle for %s\n",
__func__, gpioset_info[client].
gpiosets_comb_names[i]);
}
goto success;
err:
/* Free up memory allocated for gpio set combinations */
for (i = 0; i < gpioset_info[client].gpiosets_max; i++) {
if (gpioset_info[client].gpiosets[i] != NULL) {
devm_kfree(dev, gpioset_info[client].gpiosets[i]);
gpioset_info[client].gpiosets[i] = NULL;
}
}
if (gpioset_info[client].gpiosets != NULL) {
devm_kfree(dev, gpioset_info[client].gpiosets);
gpioset_info[client].gpiosets = NULL;
}
/* Free up memory allocated for gpio set combinations */
for (i = 0; i < gpioset_info[client].gpiosets_comb_max; i++) {
if (gpioset_info[client].gpiosets_comb_names[i] != NULL) {
devm_kfree(dev,
gpioset_info[client].gpiosets_comb_names[i]);
gpioset_info[client].gpiosets_comb_names[i] = NULL;
}
}
if (gpioset_info[client].gpiosets_comb_names != NULL) {
devm_kfree(dev, gpioset_info[client].gpiosets_comb_names);
gpioset_info[client].gpiosets_comb_names = NULL;
}
/* Free up memory allocated for handles to pinctrl states */
if (pinctrl_info[client].cdc_lines != NULL) {
devm_kfree(dev, pinctrl_info[client].cdc_lines);
pinctrl_info[client].cdc_lines = NULL;
}
/* Free up memory allocated for counter of gpio sets */
if (gpioset_info[client].gpioset_state != NULL) {
devm_kfree(dev, gpioset_info[client].gpioset_state);
gpioset_info[client].gpioset_state = NULL;
}
success:
return ret;
}
int msm_gpioset_activate(enum pinctrl_client client, char *keyword)
{
int ret = 0;
int gp_set = 0;
int active_set = 0;
gp_set = msm_get_gpioset_index(client, keyword);
if (gp_set < 0) {
pr_err("%s: gpio set name does not exist\n",
__func__);
return gp_set;
}
if (!gpioset_info[client].gpioset_state[gp_set]) {
/*
* If pinctrl pointer is not valid,
* no need to proceed further
*/
active_set = pinctrl_info[client].active_set;
if (IS_ERR(pinctrl_info[client].cdc_lines[active_set]))
return 0;
pinctrl_info[client].active_set |= (1 << gp_set);
active_set = pinctrl_info[client].active_set;
pr_debug("%s: pinctrl.active_set: %d\n", __func__, active_set);
/* Select the appropriate pinctrl state */
ret = pinctrl_select_state(pinctrl_info[client].pinctrl,
pinctrl_info[client].cdc_lines[active_set]);
}
gpioset_info[client].gpioset_state[gp_set]++;
return ret;
}
int msm_gpioset_suspend(enum pinctrl_client client, char *keyword)
{
int ret = 0;
int gp_set = 0;
int active_set = 0;
gp_set = msm_get_gpioset_index(client, keyword);
if (gp_set < 0) {
pr_err("%s: gpio set name does not exist\n",
__func__);
return gp_set;
}
if (gpioset_info[client].gpioset_state[gp_set] == 1) {
pinctrl_info[client].active_set &= ~(1 << gp_set);
/*
* If pinctrl pointer is not valid,
* no need to proceed further
*/
active_set = pinctrl_info[client].active_set;
if (IS_ERR(pinctrl_info[client].cdc_lines[active_set]))
return -EINVAL;
pr_debug("%s: pinctrl.active_set: %d\n", __func__,
pinctrl_info[client].active_set);
/* Select the appropriate pinctrl state */
ret = pinctrl_select_state(pinctrl_info[client].pinctrl,
pinctrl_info[client].cdc_lines[pinctrl_info[client].
active_set]);
}
if (!(gpioset_info[client].gpioset_state[gp_set])) {
pr_err("%s: Invalid call to de activate gpios: %d\n", __func__,
gpioset_info[client].gpioset_state[gp_set]);
return -EINVAL;
}
gpioset_info[client].gpioset_state[gp_set]--;
return ret;
}

43
asoc/msm-audio-pinctrl.h
View file

@ -1,43 +0,0 @@
/* Copyright (c) 2015-2017, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#ifndef __MSM_AUDIO_PINCTRL_H
#define __MSM_AUDIO_PINCTRL_H
enum pinctrl_client {
CLIENT_WCD,
CLIENT_WSA_BONGO_1,
CLIENT_WSA_BONGO_2,
MAX_PINCTRL_CLIENT,
};
/* finds the index for the gpio set in the dtsi file */
int msm_get_gpioset_index(enum pinctrl_client client, char *keyword);
/*
* this function reads the following from dtsi file
* 1. all gpio sets
* 2. all combinations of gpio sets
* 3. pinctrl handles to gpio sets
*
* returns error if there is
* 1. problem reading from dtsi file
* 2. memory allocation failure
*/
int msm_gpioset_initialize(enum pinctrl_client client, struct device *dev);
int msm_gpioset_activate(enum pinctrl_client client, char *keyword);
int msm_gpioset_suspend(enum pinctrl_client client, char *keyword);
#endif /* __MSM_AUDIO_PINCTRL_H */

4007
asoc/msm8996.c
View file

File diff suppressed because it is too large Load diff

1
asoc/sdm660-external.c
View file

@ -20,7 +20,6 @@
#include <dsp/q6core.h>
#include <dsp/audio_notifier.h>
#include "msm-pcm-routing-v2.h"
#include "msm-audio-pinctrl.h"
#include "sdm660-common.h"
#include "sdm660-external.h"
#include "codecs/wcd9335.h"