From d7ec18ce76066da3280b31f6ce0b1faf00f0f08b Mon Sep 17 00:00:00 2001
From: Aditya Bavanari <abavanar@codeaurora.org>
Date: Wed, 13 Jun 2018 20:34:10 +0530
Subject: [PATCH] soc: pinctrl-lpi: Add support to read lpi offset from device
 tree

In order to support variable lpi offsets from different chipsets
read the lpi offset values of gpio groups from device tree. Any
target which uses LPI has to define this gpio offset table
in device tree.

Change-Id: I3bd54017e4571deb9a189cfd6903698887a6413a
Signed-off-by: Aditya Bavanari <abavanar@codeaurora.org>
---
 soc/pinctrl-lpi.c | 43 +++++++++----------------------------------
 1 file changed, 9 insertions(+), 34 deletions(-)

diff --git a/soc/pinctrl-lpi.c b/soc/pinctrl-lpi.c
index 07a582e2e4de..f5ba3d64ad67 100644
--- a/soc/pinctrl-lpi.c
+++ b/soc/pinctrl-lpi.c
@@ -105,40 +105,8 @@ static const char *const lpi_gpio_groups[] = {
 	"gpio29", "gpio30", "gpio31",
 };
 
-static const u32 lpi_offset[] = {
-	0x00000000,
-	0x00001000,
-	0x00002000,
-	0x00003000,
-	0x00004000,
-	0x00005000,
-	0x00006000,
-	0x00007000,
-	0x00008000,
-	0x00009000,
-	0x0000A000,
-	0x0000B000,
-	0x0000C000,
-	0x0000D000,
-	0x0000E000,
-	0x0000F000,
-	0x00010000,
-	0x00011000,
-	0x00012000,
-	0x00013000,
-	0x00014000,
-	0x00015000,
-	0x00016000,
-	0x00017000,
-	0x00018000,
-	0x00019000,
-	0x0001A000,
-	0x0001B000,
-	0x0001C000,
-	0x0001D000,
-	0x0001E000,
-	0x0001F000,
-};
+#define LPI_TLMM_MAX_PINS 100
+static u32 lpi_offset[LPI_TLMM_MAX_PINS];
 
 static const char *const lpi_gpio_functions[] = {
 	[LPI_GPIO_FUNC_INDEX_GPIO]	= LPI_GPIO_FUNC_GPIO,
@@ -531,6 +499,13 @@ static int lpi_pinctrl_probe(struct platform_device *pdev)
 
 	WARN_ON(npins > ARRAY_SIZE(lpi_gpio_groups));
 
+	ret = of_property_read_u32_array(dev->of_node, "qcom,lpi-offset-tbl",
+					 lpi_offset, npins);
+	if (ret < 0) {
+		dev_err(dev, "error in reading lpi offset table: %d\n", ret);
+		return ret;
+	}
+
 	state = devm_kzalloc(dev, sizeof(*state), GFP_KERNEL);
 	if (!state)
 		return -ENOMEM;