sata_mv: increase PIO IORDY timeout

The old value (0xbc) in cycles of the IORDY timeout is suitable for
devices with core clock of 166 MHz, but some SoC controllers have
faster core clocks. The new value will make the IORDY timeout large
enough also for all SoC devices.

Signed-off-by: Saeed Bishara <saeed@marvell.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
This commit is contained in:
Saeed Bishara 2009-12-06 18:26:17 +02:00 committed by Jeff Garzik
parent 718deb6b61
commit d7b0c14369

View file

@ -3393,7 +3393,7 @@ static void mv_soc_reset_hc_port(struct mv_host_priv *hpriv,
ZERO(0x024); /* respq outp */
ZERO(0x020); /* respq inp */
ZERO(0x02c); /* test control */
writel(0xbc, port_mmio + EDMA_IORDY_TMOUT);
writel(0x800, port_mmio + EDMA_IORDY_TMOUT);
}
#undef ZERO