Merge branch 'linux-next' of git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci-2.6
* 'linux-next' of git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci-2.6: PCI/PM: Report wakeup events before resuming devices PCI/PM: Use pm_wakeup_event() directly for reporting wakeup events PCI: sysfs: Update ROM to include default owner write access x86/PCI: make Broadcom CNB20LE driver EMBEDDED and EXPERIMENTAL x86/PCI: don't use native Broadcom CNB20LE driver when ACPI is available PCI/ACPI: Request _OSC control once for each root bridge (v3) PCI: enable pci=bfsort by default on future Dell systems PCI/PCIe: Clear Root PME Status bits early during system resume PCI: pci-stub: ignore zero-length id parameters x86/PCI: irq and pci_ids patch for Intel Patsburg PCI: Skip id checking if no id is passed PCI: fix __pci_device_probe kernel-doc warning PCI: make pci_restore_state return void PCI: Disable ASPM if BIOS asks us to PCI: Add mask bit definition for MSI-X table PCI: MSI: Move MSI-X entry definition to pci_regs.h Fix up trivial conflicts in drivers/net/{skge.c,sky2.c} that had in the meantime been converted to not use legacy PCI power management, and thus no longer use pci_restore_state() at all (and that caused trivial conflicts with the "make pci_restore_state return void" patch)
This commit is contained in:
commit
d73b388459
36 changed files with 259 additions and 187 deletions
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@ -1934,13 +1934,19 @@ config PCI_MMCONFIG
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depends on X86_64 && PCI && ACPI
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depends on X86_64 && PCI && ACPI
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config PCI_CNB20LE_QUIRK
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config PCI_CNB20LE_QUIRK
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bool "Read CNB20LE Host Bridge Windows"
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bool "Read CNB20LE Host Bridge Windows" if EMBEDDED
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depends on PCI
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default n
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depends on PCI && EXPERIMENTAL
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help
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help
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Read the PCI windows out of the CNB20LE host bridge. This allows
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Read the PCI windows out of the CNB20LE host bridge. This allows
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PCI hotplug to work on systems with the CNB20LE chipset which do
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PCI hotplug to work on systems with the CNB20LE chipset which do
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not have ACPI.
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not have ACPI.
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There's no public spec for this chipset, and this functionality
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is known to be incomplete.
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You should say N unless you know you need this.
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config DMAR
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config DMAR
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bool "Support for DMA Remapping Devices (EXPERIMENTAL)"
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bool "Support for DMA Remapping Devices (EXPERIMENTAL)"
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depends on PCI_MSI && ACPI && EXPERIMENTAL
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depends on PCI_MSI && ACPI && EXPERIMENTAL
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@ -9,6 +9,7 @@
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* option) any later version.
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* option) any later version.
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*/
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*/
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#include <linux/acpi.h>
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#include <linux/delay.h>
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#include <linux/delay.h>
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#include <linux/dmi.h>
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#include <linux/dmi.h>
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#include <linux/pci.h>
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#include <linux/pci.h>
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@ -25,12 +26,14 @@ static void __devinit cnb20le_res(struct pci_dev *dev)
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u8 fbus, lbus;
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u8 fbus, lbus;
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int i;
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int i;
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#ifdef CONFIG_ACPI
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/*
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/*
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* The x86_pci_root_bus_res_quirks() function already refuses to use
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* We should get host bridge information from ACPI unless the BIOS
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* this information if ACPI _CRS was used. Therefore, we don't bother
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* doesn't support it.
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* checking if ACPI is enabled, and just generate the information
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* for both the ACPI _CRS and no ACPI cases.
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*/
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*/
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if (acpi_os_get_root_pointer())
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return;
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#endif
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info = &pci_root_info[pci_root_num];
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info = &pci_root_info[pci_root_num];
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pci_root_num++;
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pci_root_num++;
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@ -22,6 +22,7 @@ unsigned int pci_probe = PCI_PROBE_BIOS | PCI_PROBE_CONF1 | PCI_PROBE_CONF2 |
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unsigned int pci_early_dump_regs;
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unsigned int pci_early_dump_regs;
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static int pci_bf_sort;
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static int pci_bf_sort;
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static int smbios_type_b1_flag;
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int pci_routeirq;
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int pci_routeirq;
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int noioapicquirk;
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int noioapicquirk;
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#ifdef CONFIG_X86_REROUTE_FOR_BROKEN_BOOT_IRQS
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#ifdef CONFIG_X86_REROUTE_FOR_BROKEN_BOOT_IRQS
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@ -185,6 +186,39 @@ static int __devinit set_bf_sort(const struct dmi_system_id *d)
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return 0;
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return 0;
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}
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}
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static void __devinit read_dmi_type_b1(const struct dmi_header *dm,
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void *private_data)
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{
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u8 *d = (u8 *)dm + 4;
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if (dm->type != 0xB1)
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return;
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switch (((*(u32 *)d) >> 9) & 0x03) {
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case 0x00:
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printk(KERN_INFO "dmi type 0xB1 record - unknown flag\n");
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break;
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case 0x01: /* set pci=bfsort */
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smbios_type_b1_flag = 1;
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break;
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case 0x02: /* do not set pci=bfsort */
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smbios_type_b1_flag = 2;
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break;
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default:
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break;
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}
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}
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static int __devinit find_sort_method(const struct dmi_system_id *d)
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{
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dmi_walk(read_dmi_type_b1, NULL);
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if (smbios_type_b1_flag == 1) {
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set_bf_sort(d);
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return 0;
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}
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return -1;
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}
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/*
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/*
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* Enable renumbering of PCI bus# ranges to reach all PCI busses (Cardbus)
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* Enable renumbering of PCI bus# ranges to reach all PCI busses (Cardbus)
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*/
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*/
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@ -212,6 +246,13 @@ static const struct dmi_system_id __devinitconst pciprobe_dmi_table[] = {
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},
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},
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},
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},
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#endif /* __i386__ */
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#endif /* __i386__ */
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{
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.callback = find_sort_method,
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.ident = "Dell System",
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.matches = {
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DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc"),
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},
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},
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{
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{
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.callback = set_bf_sort,
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.callback = set_bf_sort,
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.ident = "Dell PowerEdge 1950",
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.ident = "Dell PowerEdge 1950",
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|
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@ -589,7 +589,8 @@ static __init int intel_router_probe(struct irq_router *r, struct pci_dev *route
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case PCI_DEVICE_ID_INTEL_ICH10_1:
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case PCI_DEVICE_ID_INTEL_ICH10_1:
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case PCI_DEVICE_ID_INTEL_ICH10_2:
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case PCI_DEVICE_ID_INTEL_ICH10_2:
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case PCI_DEVICE_ID_INTEL_ICH10_3:
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case PCI_DEVICE_ID_INTEL_ICH10_3:
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case PCI_DEVICE_ID_INTEL_PATSBURG_LPC:
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case PCI_DEVICE_ID_INTEL_PATSBURG_LPC_0:
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case PCI_DEVICE_ID_INTEL_PATSBURG_LPC_1:
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r->name = "PIIX/ICH";
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r->name = "PIIX/ICH";
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r->get = pirq_piix_get;
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r->get = pirq_piix_get;
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r->set = pirq_piix_set;
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r->set = pirq_piix_set;
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@ -195,24 +195,24 @@ static int __init setup_hest_disable(char *str)
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__setup("hest_disable", setup_hest_disable);
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__setup("hest_disable", setup_hest_disable);
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static int __init hest_init(void)
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void __init acpi_hest_init(void)
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{
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{
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acpi_status status;
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acpi_status status;
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int rc = -ENODEV;
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int rc = -ENODEV;
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unsigned int ghes_count = 0;
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unsigned int ghes_count = 0;
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if (acpi_disabled)
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if (acpi_disabled)
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goto err;
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return;
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if (hest_disable) {
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if (hest_disable) {
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pr_info(HEST_PFX "HEST tabling parsing is disabled.\n");
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pr_info(HEST_PFX "Table parsing disabled.\n");
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goto err;
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return;
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}
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}
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status = acpi_get_table(ACPI_SIG_HEST, 0,
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status = acpi_get_table(ACPI_SIG_HEST, 0,
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(struct acpi_table_header **)&hest_tab);
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(struct acpi_table_header **)&hest_tab);
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if (status == AE_NOT_FOUND) {
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if (status == AE_NOT_FOUND) {
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pr_info(HEST_PFX "Table is not found!\n");
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pr_info(HEST_PFX "Table not found.\n");
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goto err;
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goto err;
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} else if (ACPI_FAILURE(status)) {
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} else if (ACPI_FAILURE(status)) {
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const char *msg = acpi_format_exception(status);
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const char *msg = acpi_format_exception(status);
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@ -226,15 +226,11 @@ static int __init hest_init(void)
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goto err;
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goto err;
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rc = hest_ghes_dev_register(ghes_count);
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rc = hest_ghes_dev_register(ghes_count);
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if (rc)
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if (!rc) {
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goto err;
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pr_info(HEST_PFX "Table parsing has been initialized.\n");
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return;
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}
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pr_info(HEST_PFX "HEST table parsing is initialized.\n");
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return 0;
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err:
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err:
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hest_disable = 1;
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hest_disable = 1;
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return rc;
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}
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}
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subsys_initcall(hest_init);
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|
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@ -36,6 +36,7 @@
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#include <linux/slab.h>
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#include <linux/slab.h>
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#include <acpi/acpi_bus.h>
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#include <acpi/acpi_bus.h>
|
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#include <acpi/acpi_drivers.h>
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#include <acpi/acpi_drivers.h>
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||||||
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#include <acpi/apei.h>
|
||||||
|
|
||||||
#define PREFIX "ACPI: "
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#define PREFIX "ACPI: "
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||||||
|
|
||||||
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@ -47,6 +48,11 @@ static int acpi_pci_root_add(struct acpi_device *device);
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static int acpi_pci_root_remove(struct acpi_device *device, int type);
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static int acpi_pci_root_remove(struct acpi_device *device, int type);
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||||||
static int acpi_pci_root_start(struct acpi_device *device);
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static int acpi_pci_root_start(struct acpi_device *device);
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||||||
|
|
||||||
|
#define ACPI_PCIE_REQ_SUPPORT (OSC_EXT_PCI_CONFIG_SUPPORT \
|
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|
| OSC_ACTIVE_STATE_PWR_SUPPORT \
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|
| OSC_CLOCK_PWR_CAPABILITY_SUPPORT \
|
||||||
|
| OSC_MSI_SUPPORT)
|
||||||
|
|
||||||
static const struct acpi_device_id root_device_ids[] = {
|
static const struct acpi_device_id root_device_ids[] = {
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{"PNP0A03", 0},
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{"PNP0A03", 0},
|
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{"", 0},
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{"", 0},
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||||||
|
@ -566,6 +572,33 @@ static int __devinit acpi_pci_root_add(struct acpi_device *device)
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||||||
if (flags != base_flags)
|
if (flags != base_flags)
|
||||||
acpi_pci_osc_support(root, flags);
|
acpi_pci_osc_support(root, flags);
|
||||||
|
|
||||||
|
if (!pcie_ports_disabled
|
||||||
|
&& (flags & ACPI_PCIE_REQ_SUPPORT) == ACPI_PCIE_REQ_SUPPORT) {
|
||||||
|
flags = OSC_PCI_EXPRESS_CAP_STRUCTURE_CONTROL
|
||||||
|
| OSC_PCI_EXPRESS_NATIVE_HP_CONTROL
|
||||||
|
| OSC_PCI_EXPRESS_PME_CONTROL;
|
||||||
|
|
||||||
|
if (pci_aer_available()) {
|
||||||
|
if (aer_acpi_firmware_first())
|
||||||
|
dev_dbg(root->bus->bridge,
|
||||||
|
"PCIe errors handled by BIOS.\n");
|
||||||
|
else
|
||||||
|
flags |= OSC_PCI_EXPRESS_AER_CONTROL;
|
||||||
|
}
|
||||||
|
|
||||||
|
dev_info(root->bus->bridge,
|
||||||
|
"Requesting ACPI _OSC control (0x%02x)\n", flags);
|
||||||
|
|
||||||
|
status = acpi_pci_osc_control_set(device->handle, &flags,
|
||||||
|
OSC_PCI_EXPRESS_CAP_STRUCTURE_CONTROL);
|
||||||
|
if (ACPI_SUCCESS(status))
|
||||||
|
dev_info(root->bus->bridge,
|
||||||
|
"ACPI _OSC control (0x%02x) granted\n", flags);
|
||||||
|
else
|
||||||
|
dev_dbg(root->bus->bridge,
|
||||||
|
"ACPI _OSC request failed (code %d)\n", status);
|
||||||
|
}
|
||||||
|
|
||||||
pci_acpi_add_bus_pm_notifier(device, root->bus);
|
pci_acpi_add_bus_pm_notifier(device, root->bus);
|
||||||
if (device->wakeup.flags.run_wake)
|
if (device->wakeup.flags.run_wake)
|
||||||
device_set_run_wake(root->bus->bridge, true);
|
device_set_run_wake(root->bus->bridge, true);
|
||||||
|
@ -603,6 +636,8 @@ static int __init acpi_pci_root_init(void)
|
||||||
if (acpi_pci_disabled)
|
if (acpi_pci_disabled)
|
||||||
return 0;
|
return 0;
|
||||||
|
|
||||||
|
acpi_hest_init();
|
||||||
|
|
||||||
pci_acpi_crs_quirks();
|
pci_acpi_crs_quirks();
|
||||||
if (acpi_bus_register_driver(&acpi_pci_root_driver) < 0)
|
if (acpi_bus_register_driver(&acpi_pci_root_driver) < 0)
|
||||||
return -ENODEV;
|
return -ENODEV;
|
||||||
|
|
|
@ -2184,9 +2184,7 @@ static int cafe_pci_resume(struct pci_dev *pdev)
|
||||||
struct cafe_camera *cam = to_cam(v4l2_dev);
|
struct cafe_camera *cam = to_cam(v4l2_dev);
|
||||||
int ret = 0;
|
int ret = 0;
|
||||||
|
|
||||||
ret = pci_restore_state(pdev);
|
pci_restore_state(pdev);
|
||||||
if (ret)
|
|
||||||
return ret;
|
|
||||||
ret = pci_enable_device(pdev);
|
ret = pci_enable_device(pdev);
|
||||||
|
|
||||||
if (ret) {
|
if (ret) {
|
||||||
|
|
|
@ -3403,9 +3403,7 @@ static int myri10ge_resume(struct pci_dev *pdev)
|
||||||
return -EIO;
|
return -EIO;
|
||||||
}
|
}
|
||||||
|
|
||||||
status = pci_restore_state(pdev);
|
pci_restore_state(pdev);
|
||||||
if (status)
|
|
||||||
return status;
|
|
||||||
|
|
||||||
status = pci_enable_device(pdev);
|
status = pci_enable_device(pdev);
|
||||||
if (status) {
|
if (status) {
|
||||||
|
|
|
@ -1107,22 +1107,9 @@ static int __falcon_reset_hw(struct efx_nic *efx, enum reset_type method)
|
||||||
|
|
||||||
/* Restore PCI configuration if needed */
|
/* Restore PCI configuration if needed */
|
||||||
if (method == RESET_TYPE_WORLD) {
|
if (method == RESET_TYPE_WORLD) {
|
||||||
if (efx_nic_is_dual_func(efx)) {
|
if (efx_nic_is_dual_func(efx))
|
||||||
rc = pci_restore_state(nic_data->pci_dev2);
|
pci_restore_state(nic_data->pci_dev2);
|
||||||
if (rc) {
|
pci_restore_state(efx->pci_dev);
|
||||||
netif_err(efx, drv, efx->net_dev,
|
|
||||||
"failed to restore PCI config for "
|
|
||||||
"the secondary function\n");
|
|
||||||
goto fail3;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
rc = pci_restore_state(efx->pci_dev);
|
|
||||||
if (rc) {
|
|
||||||
netif_err(efx, drv, efx->net_dev,
|
|
||||||
"failed to restore PCI config for the "
|
|
||||||
"primary function\n");
|
|
||||||
goto fail4;
|
|
||||||
}
|
|
||||||
netif_dbg(efx, drv, efx->net_dev,
|
netif_dbg(efx, drv, efx->net_dev,
|
||||||
"successfully restored PCI config\n");
|
"successfully restored PCI config\n");
|
||||||
}
|
}
|
||||||
|
@ -1133,7 +1120,7 @@ static int __falcon_reset_hw(struct efx_nic *efx, enum reset_type method)
|
||||||
rc = -ETIMEDOUT;
|
rc = -ETIMEDOUT;
|
||||||
netif_err(efx, hw, efx->net_dev,
|
netif_err(efx, hw, efx->net_dev,
|
||||||
"timed out waiting for hardware reset\n");
|
"timed out waiting for hardware reset\n");
|
||||||
goto fail5;
|
goto fail3;
|
||||||
}
|
}
|
||||||
netif_dbg(efx, hw, efx->net_dev, "hardware reset complete\n");
|
netif_dbg(efx, hw, efx->net_dev, "hardware reset complete\n");
|
||||||
|
|
||||||
|
@ -1141,11 +1128,9 @@ static int __falcon_reset_hw(struct efx_nic *efx, enum reset_type method)
|
||||||
|
|
||||||
/* pci_save_state() and pci_restore_state() MUST be called in pairs */
|
/* pci_save_state() and pci_restore_state() MUST be called in pairs */
|
||||||
fail2:
|
fail2:
|
||||||
fail3:
|
|
||||||
pci_restore_state(efx->pci_dev);
|
pci_restore_state(efx->pci_dev);
|
||||||
fail1:
|
fail1:
|
||||||
fail4:
|
fail3:
|
||||||
fail5:
|
|
||||||
return rc;
|
return rc;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
|
@ -363,12 +363,12 @@ int rt2x00pci_resume(struct pci_dev *pci_dev)
|
||||||
struct rt2x00_dev *rt2x00dev = hw->priv;
|
struct rt2x00_dev *rt2x00dev = hw->priv;
|
||||||
|
|
||||||
if (pci_set_power_state(pci_dev, PCI_D0) ||
|
if (pci_set_power_state(pci_dev, PCI_D0) ||
|
||||||
pci_enable_device(pci_dev) ||
|
pci_enable_device(pci_dev)) {
|
||||||
pci_restore_state(pci_dev)) {
|
|
||||||
ERROR(rt2x00dev, "Failed to resume device.\n");
|
ERROR(rt2x00dev, "Failed to resume device.\n");
|
||||||
return -EIO;
|
return -EIO;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
pci_restore_state(pci_dev);
|
||||||
return rt2x00lib_resume(rt2x00dev);
|
return rt2x00lib_resume(rt2x00dev);
|
||||||
}
|
}
|
||||||
EXPORT_SYMBOL_GPL(rt2x00pci_resume);
|
EXPORT_SYMBOL_GPL(rt2x00pci_resume);
|
||||||
|
|
|
@ -168,8 +168,9 @@ static u32 __msix_mask_irq(struct msi_desc *desc, u32 flag)
|
||||||
u32 mask_bits = desc->masked;
|
u32 mask_bits = desc->masked;
|
||||||
unsigned offset = desc->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE +
|
unsigned offset = desc->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE +
|
||||||
PCI_MSIX_ENTRY_VECTOR_CTRL;
|
PCI_MSIX_ENTRY_VECTOR_CTRL;
|
||||||
mask_bits &= ~1;
|
mask_bits &= ~PCI_MSIX_ENTRY_CTRL_MASKBIT;
|
||||||
mask_bits |= flag;
|
if (flag)
|
||||||
|
mask_bits |= PCI_MSIX_ENTRY_CTRL_MASKBIT;
|
||||||
writel(mask_bits, desc->mask_base + offset);
|
writel(mask_bits, desc->mask_base + offset);
|
||||||
|
|
||||||
return mask_bits;
|
return mask_bits;
|
||||||
|
|
|
@ -6,12 +6,6 @@
|
||||||
#ifndef MSI_H
|
#ifndef MSI_H
|
||||||
#define MSI_H
|
#define MSI_H
|
||||||
|
|
||||||
#define PCI_MSIX_ENTRY_SIZE 16
|
|
||||||
#define PCI_MSIX_ENTRY_LOWER_ADDR 0
|
|
||||||
#define PCI_MSIX_ENTRY_UPPER_ADDR 4
|
|
||||||
#define PCI_MSIX_ENTRY_DATA 8
|
|
||||||
#define PCI_MSIX_ENTRY_VECTOR_CTRL 12
|
|
||||||
|
|
||||||
#define msi_control_reg(base) (base + PCI_MSI_FLAGS)
|
#define msi_control_reg(base) (base + PCI_MSI_FLAGS)
|
||||||
#define msi_lower_address_reg(base) (base + PCI_MSI_ADDRESS_LO)
|
#define msi_lower_address_reg(base) (base + PCI_MSI_ADDRESS_LO)
|
||||||
#define msi_upper_address_reg(base) (base + PCI_MSI_ADDRESS_HI)
|
#define msi_upper_address_reg(base) (base + PCI_MSI_ADDRESS_HI)
|
||||||
|
|
|
@ -46,9 +46,9 @@ static void pci_acpi_wake_dev(acpi_handle handle, u32 event, void *context)
|
||||||
struct pci_dev *pci_dev = context;
|
struct pci_dev *pci_dev = context;
|
||||||
|
|
||||||
if (event == ACPI_NOTIFY_DEVICE_WAKE && pci_dev) {
|
if (event == ACPI_NOTIFY_DEVICE_WAKE && pci_dev) {
|
||||||
|
pci_wakeup_event(pci_dev);
|
||||||
pci_check_pme_status(pci_dev);
|
pci_check_pme_status(pci_dev);
|
||||||
pm_runtime_resume(&pci_dev->dev);
|
pm_runtime_resume(&pci_dev->dev);
|
||||||
pci_wakeup_event(pci_dev);
|
|
||||||
if (pci_dev->subordinate)
|
if (pci_dev->subordinate)
|
||||||
pci_pme_wakeup_bus(pci_dev->subordinate);
|
pci_pme_wakeup_bus(pci_dev->subordinate);
|
||||||
}
|
}
|
||||||
|
@ -399,6 +399,7 @@ static int __init acpi_pci_init(void)
|
||||||
|
|
||||||
if (acpi_gbl_FADT.boot_flags & ACPI_FADT_NO_ASPM) {
|
if (acpi_gbl_FADT.boot_flags & ACPI_FADT_NO_ASPM) {
|
||||||
printk(KERN_INFO"ACPI FADT declares the system doesn't support PCIe ASPM, so disable it\n");
|
printk(KERN_INFO"ACPI FADT declares the system doesn't support PCIe ASPM, so disable it\n");
|
||||||
|
pcie_clear_aspm();
|
||||||
pcie_no_aspm();
|
pcie_no_aspm();
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
|
@ -338,7 +338,7 @@ static int pci_call_probe(struct pci_driver *drv, struct pci_dev *dev,
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* __pci_device_probe()
|
* __pci_device_probe - check if a driver wants to claim a specific PCI device
|
||||||
* @drv: driver to call to check if it wants the PCI device
|
* @drv: driver to call to check if it wants the PCI device
|
||||||
* @pci_dev: PCI device being probed
|
* @pci_dev: PCI device being probed
|
||||||
*
|
*
|
||||||
|
@ -449,7 +449,8 @@ static int pci_restore_standard_config(struct pci_dev *pci_dev)
|
||||||
return error;
|
return error;
|
||||||
}
|
}
|
||||||
|
|
||||||
return pci_restore_state(pci_dev);
|
pci_restore_state(pci_dev);
|
||||||
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
static void pci_pm_default_resume_early(struct pci_dev *pci_dev)
|
static void pci_pm_default_resume_early(struct pci_dev *pci_dev)
|
||||||
|
|
|
@ -47,6 +47,10 @@ static int __init pci_stub_init(void)
|
||||||
if (rc)
|
if (rc)
|
||||||
return rc;
|
return rc;
|
||||||
|
|
||||||
|
/* no ids passed actually */
|
||||||
|
if (ids[0] == '\0')
|
||||||
|
return 0;
|
||||||
|
|
||||||
/* add ids specified in the module parameter */
|
/* add ids specified in the module parameter */
|
||||||
p = ids;
|
p = ids;
|
||||||
while ((id = strsep(&p, ","))) {
|
while ((id = strsep(&p, ","))) {
|
||||||
|
@ -54,6 +58,9 @@ static int __init pci_stub_init(void)
|
||||||
subdevice = PCI_ANY_ID, class=0, class_mask=0;
|
subdevice = PCI_ANY_ID, class=0, class_mask=0;
|
||||||
int fields;
|
int fields;
|
||||||
|
|
||||||
|
if (!strlen(id))
|
||||||
|
continue;
|
||||||
|
|
||||||
fields = sscanf(id, "%x:%x:%x:%x:%x:%x",
|
fields = sscanf(id, "%x:%x:%x:%x:%x:%x",
|
||||||
&vendor, &device, &subvendor, &subdevice,
|
&vendor, &device, &subvendor, &subdevice,
|
||||||
&class, &class_mask);
|
&class, &class_mask);
|
||||||
|
|
|
@ -1149,7 +1149,7 @@ int __must_check pci_create_sysfs_dev_files (struct pci_dev *pdev)
|
||||||
sysfs_bin_attr_init(attr);
|
sysfs_bin_attr_init(attr);
|
||||||
attr->size = rom_size;
|
attr->size = rom_size;
|
||||||
attr->attr.name = "rom";
|
attr->attr.name = "rom";
|
||||||
attr->attr.mode = S_IRUSR;
|
attr->attr.mode = S_IRUSR | S_IWUSR;
|
||||||
attr->read = pci_read_rom;
|
attr->read = pci_read_rom;
|
||||||
attr->write = pci_write_rom;
|
attr->write = pci_write_rom;
|
||||||
retval = sysfs_create_bin_file(&pdev->dev.kobj, attr);
|
retval = sysfs_create_bin_file(&pdev->dev.kobj, attr);
|
||||||
|
|
|
@ -937,14 +937,13 @@ pci_save_state(struct pci_dev *dev)
|
||||||
* pci_restore_state - Restore the saved state of a PCI device
|
* pci_restore_state - Restore the saved state of a PCI device
|
||||||
* @dev: - PCI device that we're dealing with
|
* @dev: - PCI device that we're dealing with
|
||||||
*/
|
*/
|
||||||
int
|
void pci_restore_state(struct pci_dev *dev)
|
||||||
pci_restore_state(struct pci_dev *dev)
|
|
||||||
{
|
{
|
||||||
int i;
|
int i;
|
||||||
u32 val;
|
u32 val;
|
||||||
|
|
||||||
if (!dev->state_saved)
|
if (!dev->state_saved)
|
||||||
return 0;
|
return;
|
||||||
|
|
||||||
/* PCI Express register must be restored first */
|
/* PCI Express register must be restored first */
|
||||||
pci_restore_pcie_state(dev);
|
pci_restore_pcie_state(dev);
|
||||||
|
@ -968,8 +967,6 @@ pci_restore_state(struct pci_dev *dev)
|
||||||
pci_restore_iov_state(dev);
|
pci_restore_iov_state(dev);
|
||||||
|
|
||||||
dev->state_saved = false;
|
dev->state_saved = false;
|
||||||
|
|
||||||
return 0;
|
|
||||||
}
|
}
|
||||||
|
|
||||||
static int do_pci_enable_device(struct pci_dev *dev, int bars)
|
static int do_pci_enable_device(struct pci_dev *dev, int bars)
|
||||||
|
@ -1300,22 +1297,6 @@ bool pci_check_pme_status(struct pci_dev *dev)
|
||||||
return ret;
|
return ret;
|
||||||
}
|
}
|
||||||
|
|
||||||
/*
|
|
||||||
* Time to wait before the system can be put into a sleep state after reporting
|
|
||||||
* a wakeup event signaled by a PCI device.
|
|
||||||
*/
|
|
||||||
#define PCI_WAKEUP_COOLDOWN 100
|
|
||||||
|
|
||||||
/**
|
|
||||||
* pci_wakeup_event - Report a wakeup event related to a given PCI device.
|
|
||||||
* @dev: Device to report the wakeup event for.
|
|
||||||
*/
|
|
||||||
void pci_wakeup_event(struct pci_dev *dev)
|
|
||||||
{
|
|
||||||
if (device_may_wakeup(&dev->dev))
|
|
||||||
pm_wakeup_event(&dev->dev, PCI_WAKEUP_COOLDOWN);
|
|
||||||
}
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* pci_pme_wakeup - Wake up a PCI device if its PME Status bit is set.
|
* pci_pme_wakeup - Wake up a PCI device if its PME Status bit is set.
|
||||||
* @dev: Device to handle.
|
* @dev: Device to handle.
|
||||||
|
@ -1327,8 +1308,8 @@ void pci_wakeup_event(struct pci_dev *dev)
|
||||||
static int pci_pme_wakeup(struct pci_dev *dev, void *ign)
|
static int pci_pme_wakeup(struct pci_dev *dev, void *ign)
|
||||||
{
|
{
|
||||||
if (pci_check_pme_status(dev)) {
|
if (pci_check_pme_status(dev)) {
|
||||||
pm_request_resume(&dev->dev);
|
|
||||||
pci_wakeup_event(dev);
|
pci_wakeup_event(dev);
|
||||||
|
pm_request_resume(&dev->dev);
|
||||||
}
|
}
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
|
@ -74,6 +74,12 @@ extern void pci_pm_init(struct pci_dev *dev);
|
||||||
extern void platform_pci_wakeup_init(struct pci_dev *dev);
|
extern void platform_pci_wakeup_init(struct pci_dev *dev);
|
||||||
extern void pci_allocate_cap_save_buffers(struct pci_dev *dev);
|
extern void pci_allocate_cap_save_buffers(struct pci_dev *dev);
|
||||||
|
|
||||||
|
static inline void pci_wakeup_event(struct pci_dev *dev)
|
||||||
|
{
|
||||||
|
/* Wait 100 ms before the system can be put into a sleep state. */
|
||||||
|
pm_wakeup_event(&dev->dev, 100);
|
||||||
|
}
|
||||||
|
|
||||||
static inline bool pci_is_bridge(struct pci_dev *pci_dev)
|
static inline bool pci_is_bridge(struct pci_dev *pci_dev)
|
||||||
{
|
{
|
||||||
return !!(pci_dev->subordinate);
|
return !!(pci_dev->subordinate);
|
||||||
|
@ -140,14 +146,6 @@ static inline void pci_no_msi(void) { }
|
||||||
static inline void pci_msi_init_pci_dev(struct pci_dev *dev) { }
|
static inline void pci_msi_init_pci_dev(struct pci_dev *dev) { }
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#ifdef CONFIG_PCIEAER
|
|
||||||
void pci_no_aer(void);
|
|
||||||
bool pci_aer_available(void);
|
|
||||||
#else
|
|
||||||
static inline void pci_no_aer(void) { }
|
|
||||||
static inline bool pci_aer_available(void) { return false; }
|
|
||||||
#endif
|
|
||||||
|
|
||||||
static inline int pci_no_d1d2(struct pci_dev *dev)
|
static inline int pci_no_d1d2(struct pci_dev *dev)
|
||||||
{
|
{
|
||||||
unsigned int parent_dstates = 0;
|
unsigned int parent_dstates = 0;
|
||||||
|
|
|
@ -17,6 +17,7 @@
|
||||||
|
|
||||||
#include <linux/module.h>
|
#include <linux/module.h>
|
||||||
#include <linux/pci.h>
|
#include <linux/pci.h>
|
||||||
|
#include <linux/pci-acpi.h>
|
||||||
#include <linux/sched.h>
|
#include <linux/sched.h>
|
||||||
#include <linux/kernel.h>
|
#include <linux/kernel.h>
|
||||||
#include <linux/errno.h>
|
#include <linux/errno.h>
|
||||||
|
|
|
@ -132,7 +132,6 @@ static inline int aer_osc_setup(struct pcie_device *pciedev)
|
||||||
|
|
||||||
#ifdef CONFIG_ACPI_APEI
|
#ifdef CONFIG_ACPI_APEI
|
||||||
extern int pcie_aer_get_firmware_first(struct pci_dev *pci_dev);
|
extern int pcie_aer_get_firmware_first(struct pci_dev *pci_dev);
|
||||||
extern bool aer_acpi_firmware_first(void);
|
|
||||||
#else
|
#else
|
||||||
static inline int pcie_aer_get_firmware_first(struct pci_dev *pci_dev)
|
static inline int pcie_aer_get_firmware_first(struct pci_dev *pci_dev)
|
||||||
{
|
{
|
||||||
|
@ -140,8 +139,6 @@ static inline int pcie_aer_get_firmware_first(struct pci_dev *pci_dev)
|
||||||
return pci_dev->__aer_firmware_first;
|
return pci_dev->__aer_firmware_first;
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
static inline bool aer_acpi_firmware_first(void) { return false; }
|
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
static inline void pcie_aer_force_firmware_first(struct pci_dev *pci_dev,
|
static inline void pcie_aer_force_firmware_first(struct pci_dev *pci_dev,
|
||||||
|
|
|
@ -68,7 +68,7 @@ struct pcie_link_state {
|
||||||
struct aspm_latency acceptable[8];
|
struct aspm_latency acceptable[8];
|
||||||
};
|
};
|
||||||
|
|
||||||
static int aspm_disabled, aspm_force;
|
static int aspm_disabled, aspm_force, aspm_clear_state;
|
||||||
static DEFINE_MUTEX(aspm_lock);
|
static DEFINE_MUTEX(aspm_lock);
|
||||||
static LIST_HEAD(link_list);
|
static LIST_HEAD(link_list);
|
||||||
|
|
||||||
|
@ -139,7 +139,7 @@ static void pcie_set_clkpm(struct pcie_link_state *link, int enable)
|
||||||
{
|
{
|
||||||
/* Don't enable Clock PM if the link is not Clock PM capable */
|
/* Don't enable Clock PM if the link is not Clock PM capable */
|
||||||
if (!link->clkpm_capable && enable)
|
if (!link->clkpm_capable && enable)
|
||||||
return;
|
enable = 0;
|
||||||
/* Need nothing if the specified equals to current state */
|
/* Need nothing if the specified equals to current state */
|
||||||
if (link->clkpm_enabled == enable)
|
if (link->clkpm_enabled == enable)
|
||||||
return;
|
return;
|
||||||
|
@ -498,6 +498,10 @@ static int pcie_aspm_sanity_check(struct pci_dev *pdev)
|
||||||
struct pci_dev *child;
|
struct pci_dev *child;
|
||||||
int pos;
|
int pos;
|
||||||
u32 reg32;
|
u32 reg32;
|
||||||
|
|
||||||
|
if (aspm_clear_state)
|
||||||
|
return -EINVAL;
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Some functions in a slot might not all be PCIe functions,
|
* Some functions in a slot might not all be PCIe functions,
|
||||||
* very strange. Disable ASPM for the whole slot
|
* very strange. Disable ASPM for the whole slot
|
||||||
|
@ -563,12 +567,15 @@ void pcie_aspm_init_link_state(struct pci_dev *pdev)
|
||||||
struct pcie_link_state *link;
|
struct pcie_link_state *link;
|
||||||
int blacklist = !!pcie_aspm_sanity_check(pdev);
|
int blacklist = !!pcie_aspm_sanity_check(pdev);
|
||||||
|
|
||||||
if (aspm_disabled || !pci_is_pcie(pdev) || pdev->link_state)
|
if (!pci_is_pcie(pdev) || pdev->link_state)
|
||||||
return;
|
return;
|
||||||
if (pdev->pcie_type != PCI_EXP_TYPE_ROOT_PORT &&
|
if (pdev->pcie_type != PCI_EXP_TYPE_ROOT_PORT &&
|
||||||
pdev->pcie_type != PCI_EXP_TYPE_DOWNSTREAM)
|
pdev->pcie_type != PCI_EXP_TYPE_DOWNSTREAM)
|
||||||
return;
|
return;
|
||||||
|
|
||||||
|
if (aspm_disabled && !aspm_clear_state)
|
||||||
|
return;
|
||||||
|
|
||||||
/* VIA has a strange chipset, root port is under a bridge */
|
/* VIA has a strange chipset, root port is under a bridge */
|
||||||
if (pdev->pcie_type == PCI_EXP_TYPE_ROOT_PORT &&
|
if (pdev->pcie_type == PCI_EXP_TYPE_ROOT_PORT &&
|
||||||
pdev->bus->self)
|
pdev->bus->self)
|
||||||
|
@ -641,7 +648,7 @@ void pcie_aspm_exit_link_state(struct pci_dev *pdev)
|
||||||
struct pci_dev *parent = pdev->bus->self;
|
struct pci_dev *parent = pdev->bus->self;
|
||||||
struct pcie_link_state *link, *root, *parent_link;
|
struct pcie_link_state *link, *root, *parent_link;
|
||||||
|
|
||||||
if (aspm_disabled || !pci_is_pcie(pdev) ||
|
if ((aspm_disabled && !aspm_clear_state) || !pci_is_pcie(pdev) ||
|
||||||
!parent || !parent->link_state)
|
!parent || !parent->link_state)
|
||||||
return;
|
return;
|
||||||
if ((parent->pcie_type != PCI_EXP_TYPE_ROOT_PORT) &&
|
if ((parent->pcie_type != PCI_EXP_TYPE_ROOT_PORT) &&
|
||||||
|
@ -899,6 +906,12 @@ static int __init pcie_aspm_disable(char *str)
|
||||||
|
|
||||||
__setup("pcie_aspm=", pcie_aspm_disable);
|
__setup("pcie_aspm=", pcie_aspm_disable);
|
||||||
|
|
||||||
|
void pcie_clear_aspm(void)
|
||||||
|
{
|
||||||
|
if (!aspm_force)
|
||||||
|
aspm_clear_state = 1;
|
||||||
|
}
|
||||||
|
|
||||||
void pcie_no_aspm(void)
|
void pcie_no_aspm(void)
|
||||||
{
|
{
|
||||||
if (!aspm_force)
|
if (!aspm_force)
|
||||||
|
|
|
@ -26,9 +26,6 @@
|
||||||
#include "../pci.h"
|
#include "../pci.h"
|
||||||
#include "portdrv.h"
|
#include "portdrv.h"
|
||||||
|
|
||||||
#define PCI_EXP_RTSTA_PME 0x10000 /* PME status */
|
|
||||||
#define PCI_EXP_RTSTA_PENDING 0x20000 /* PME pending */
|
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* If this switch is set, MSI will not be used for PCIe PME signaling. This
|
* If this switch is set, MSI will not be used for PCIe PME signaling. This
|
||||||
* causes the PCIe port driver to use INTx interrupts only, but it turns out
|
* causes the PCIe port driver to use INTx interrupts only, but it turns out
|
||||||
|
@ -73,22 +70,6 @@ void pcie_pme_interrupt_enable(struct pci_dev *dev, bool enable)
|
||||||
pci_write_config_word(dev, rtctl_pos, rtctl);
|
pci_write_config_word(dev, rtctl_pos, rtctl);
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
|
||||||
* pcie_pme_clear_status - Clear root port PME interrupt status.
|
|
||||||
* @dev: PCIe root port or event collector.
|
|
||||||
*/
|
|
||||||
static void pcie_pme_clear_status(struct pci_dev *dev)
|
|
||||||
{
|
|
||||||
int rtsta_pos;
|
|
||||||
u32 rtsta;
|
|
||||||
|
|
||||||
rtsta_pos = pci_pcie_cap(dev) + PCI_EXP_RTSTA;
|
|
||||||
|
|
||||||
pci_read_config_dword(dev, rtsta_pos, &rtsta);
|
|
||||||
rtsta |= PCI_EXP_RTSTA_PME;
|
|
||||||
pci_write_config_dword(dev, rtsta_pos, rtsta);
|
|
||||||
}
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* pcie_pme_walk_bus - Scan a PCI bus for devices asserting PME#.
|
* pcie_pme_walk_bus - Scan a PCI bus for devices asserting PME#.
|
||||||
* @bus: PCI bus to scan.
|
* @bus: PCI bus to scan.
|
||||||
|
@ -103,8 +84,8 @@ static bool pcie_pme_walk_bus(struct pci_bus *bus)
|
||||||
list_for_each_entry(dev, &bus->devices, bus_list) {
|
list_for_each_entry(dev, &bus->devices, bus_list) {
|
||||||
/* Skip PCIe devices in case we started from a root port. */
|
/* Skip PCIe devices in case we started from a root port. */
|
||||||
if (!pci_is_pcie(dev) && pci_check_pme_status(dev)) {
|
if (!pci_is_pcie(dev) && pci_check_pme_status(dev)) {
|
||||||
pm_request_resume(&dev->dev);
|
|
||||||
pci_wakeup_event(dev);
|
pci_wakeup_event(dev);
|
||||||
|
pm_request_resume(&dev->dev);
|
||||||
ret = true;
|
ret = true;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -206,8 +187,8 @@ static void pcie_pme_handle_request(struct pci_dev *port, u16 req_id)
|
||||||
/* The device is there, but we have to check its PME status. */
|
/* The device is there, but we have to check its PME status. */
|
||||||
found = pci_check_pme_status(dev);
|
found = pci_check_pme_status(dev);
|
||||||
if (found) {
|
if (found) {
|
||||||
pm_request_resume(&dev->dev);
|
|
||||||
pci_wakeup_event(dev);
|
pci_wakeup_event(dev);
|
||||||
|
pm_request_resume(&dev->dev);
|
||||||
}
|
}
|
||||||
pci_dev_put(dev);
|
pci_dev_put(dev);
|
||||||
} else if (devfn) {
|
} else if (devfn) {
|
||||||
|
@ -253,7 +234,7 @@ static void pcie_pme_work_fn(struct work_struct *work)
|
||||||
* Clear PME status of the port. If there are other
|
* Clear PME status of the port. If there are other
|
||||||
* pending PMEs, the status will be set again.
|
* pending PMEs, the status will be set again.
|
||||||
*/
|
*/
|
||||||
pcie_pme_clear_status(port);
|
pcie_clear_root_pme_status(port);
|
||||||
|
|
||||||
spin_unlock_irq(&data->lock);
|
spin_unlock_irq(&data->lock);
|
||||||
pcie_pme_handle_request(port, rtsta & 0xffff);
|
pcie_pme_handle_request(port, rtsta & 0xffff);
|
||||||
|
@ -378,7 +359,7 @@ static int pcie_pme_probe(struct pcie_device *srv)
|
||||||
|
|
||||||
port = srv->port;
|
port = srv->port;
|
||||||
pcie_pme_interrupt_enable(port, false);
|
pcie_pme_interrupt_enable(port, false);
|
||||||
pcie_pme_clear_status(port);
|
pcie_clear_root_pme_status(port);
|
||||||
|
|
||||||
ret = request_irq(srv->irq, pcie_pme_irq, IRQF_SHARED, "PCIe PME", srv);
|
ret = request_irq(srv->irq, pcie_pme_irq, IRQF_SHARED, "PCIe PME", srv);
|
||||||
if (ret) {
|
if (ret) {
|
||||||
|
@ -402,7 +383,7 @@ static int pcie_pme_suspend(struct pcie_device *srv)
|
||||||
|
|
||||||
spin_lock_irq(&data->lock);
|
spin_lock_irq(&data->lock);
|
||||||
pcie_pme_interrupt_enable(port, false);
|
pcie_pme_interrupt_enable(port, false);
|
||||||
pcie_pme_clear_status(port);
|
pcie_clear_root_pme_status(port);
|
||||||
data->noirq = true;
|
data->noirq = true;
|
||||||
spin_unlock_irq(&data->lock);
|
spin_unlock_irq(&data->lock);
|
||||||
|
|
||||||
|
@ -422,7 +403,7 @@ static int pcie_pme_resume(struct pcie_device *srv)
|
||||||
|
|
||||||
spin_lock_irq(&data->lock);
|
spin_lock_irq(&data->lock);
|
||||||
data->noirq = false;
|
data->noirq = false;
|
||||||
pcie_pme_clear_status(port);
|
pcie_clear_root_pme_status(port);
|
||||||
pcie_pme_interrupt_enable(port, true);
|
pcie_pme_interrupt_enable(port, true);
|
||||||
spin_unlock_irq(&data->lock);
|
spin_unlock_irq(&data->lock);
|
||||||
|
|
||||||
|
|
|
@ -20,9 +20,6 @@
|
||||||
|
|
||||||
#define get_descriptor_id(type, service) (((type - 4) << 4) | service)
|
#define get_descriptor_id(type, service) (((type - 4) << 4) | service)
|
||||||
|
|
||||||
extern bool pcie_ports_disabled;
|
|
||||||
extern bool pcie_ports_auto;
|
|
||||||
|
|
||||||
extern struct bus_type pcie_port_bus_type;
|
extern struct bus_type pcie_port_bus_type;
|
||||||
extern int pcie_port_device_register(struct pci_dev *dev);
|
extern int pcie_port_device_register(struct pci_dev *dev);
|
||||||
#ifdef CONFIG_PM
|
#ifdef CONFIG_PM
|
||||||
|
@ -35,6 +32,8 @@ extern void pcie_port_bus_unregister(void);
|
||||||
|
|
||||||
struct pci_dev;
|
struct pci_dev;
|
||||||
|
|
||||||
|
extern void pcie_clear_root_pme_status(struct pci_dev *dev);
|
||||||
|
|
||||||
#ifdef CONFIG_PCIE_PME
|
#ifdef CONFIG_PCIE_PME
|
||||||
extern bool pcie_pme_msi_disabled;
|
extern bool pcie_pme_msi_disabled;
|
||||||
|
|
||||||
|
|
|
@ -33,7 +33,7 @@
|
||||||
*/
|
*/
|
||||||
int pcie_port_acpi_setup(struct pci_dev *port, int *srv_mask)
|
int pcie_port_acpi_setup(struct pci_dev *port, int *srv_mask)
|
||||||
{
|
{
|
||||||
acpi_status status;
|
struct acpi_pci_root *root;
|
||||||
acpi_handle handle;
|
acpi_handle handle;
|
||||||
u32 flags;
|
u32 flags;
|
||||||
|
|
||||||
|
@ -44,26 +44,11 @@ int pcie_port_acpi_setup(struct pci_dev *port, int *srv_mask)
|
||||||
if (!handle)
|
if (!handle)
|
||||||
return -EINVAL;
|
return -EINVAL;
|
||||||
|
|
||||||
flags = OSC_PCI_EXPRESS_CAP_STRUCTURE_CONTROL
|
root = acpi_pci_find_root(handle);
|
||||||
| OSC_PCI_EXPRESS_NATIVE_HP_CONTROL
|
if (!root)
|
||||||
| OSC_PCI_EXPRESS_PME_CONTROL;
|
|
||||||
|
|
||||||
if (pci_aer_available()) {
|
|
||||||
if (aer_acpi_firmware_first())
|
|
||||||
dev_dbg(&port->dev, "PCIe errors handled by BIOS.\n");
|
|
||||||
else
|
|
||||||
flags |= OSC_PCI_EXPRESS_AER_CONTROL;
|
|
||||||
}
|
|
||||||
|
|
||||||
status = acpi_pci_osc_control_set(handle, &flags,
|
|
||||||
OSC_PCI_EXPRESS_CAP_STRUCTURE_CONTROL);
|
|
||||||
if (ACPI_FAILURE(status)) {
|
|
||||||
dev_dbg(&port->dev, "ACPI _OSC request failed (code %d)\n",
|
|
||||||
status);
|
|
||||||
return -ENODEV;
|
return -ENODEV;
|
||||||
}
|
|
||||||
|
|
||||||
dev_info(&port->dev, "ACPI _OSC control granted for 0x%02x\n", flags);
|
flags = root->osc_control_set;
|
||||||
|
|
||||||
*srv_mask = PCIE_PORT_SERVICE_VC;
|
*srv_mask = PCIE_PORT_SERVICE_VC;
|
||||||
if (flags & OSC_PCI_EXPRESS_NATIVE_HP_CONTROL)
|
if (flags & OSC_PCI_EXPRESS_NATIVE_HP_CONTROL)
|
||||||
|
|
|
@ -241,17 +241,17 @@ static int get_port_device_capability(struct pci_dev *dev)
|
||||||
int cap_mask;
|
int cap_mask;
|
||||||
int err;
|
int err;
|
||||||
|
|
||||||
|
if (pcie_ports_disabled)
|
||||||
|
return 0;
|
||||||
|
|
||||||
err = pcie_port_platform_notify(dev, &cap_mask);
|
err = pcie_port_platform_notify(dev, &cap_mask);
|
||||||
if (pcie_ports_auto) {
|
if (!pcie_ports_auto) {
|
||||||
if (err) {
|
|
||||||
pcie_no_aspm();
|
|
||||||
return 0;
|
|
||||||
}
|
|
||||||
} else {
|
|
||||||
cap_mask = PCIE_PORT_SERVICE_PME | PCIE_PORT_SERVICE_HP
|
cap_mask = PCIE_PORT_SERVICE_PME | PCIE_PORT_SERVICE_HP
|
||||||
| PCIE_PORT_SERVICE_VC;
|
| PCIE_PORT_SERVICE_VC;
|
||||||
if (pci_aer_available())
|
if (pci_aer_available())
|
||||||
cap_mask |= PCIE_PORT_SERVICE_AER;
|
cap_mask |= PCIE_PORT_SERVICE_AER;
|
||||||
|
} else if (err) {
|
||||||
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
pos = pci_pcie_cap(dev);
|
pos = pci_pcie_cap(dev);
|
||||||
|
@ -349,15 +349,18 @@ int pcie_port_device_register(struct pci_dev *dev)
|
||||||
int status, capabilities, i, nr_service;
|
int status, capabilities, i, nr_service;
|
||||||
int irqs[PCIE_PORT_DEVICE_MAXSERVICES];
|
int irqs[PCIE_PORT_DEVICE_MAXSERVICES];
|
||||||
|
|
||||||
/* Get and check PCI Express port services */
|
|
||||||
capabilities = get_port_device_capability(dev);
|
|
||||||
if (!capabilities)
|
|
||||||
return -ENODEV;
|
|
||||||
|
|
||||||
/* Enable PCI Express port device */
|
/* Enable PCI Express port device */
|
||||||
status = pci_enable_device(dev);
|
status = pci_enable_device(dev);
|
||||||
if (status)
|
if (status)
|
||||||
return status;
|
return status;
|
||||||
|
|
||||||
|
/* Get and check PCI Express port services */
|
||||||
|
capabilities = get_port_device_capability(dev);
|
||||||
|
if (!capabilities) {
|
||||||
|
pcie_no_aspm();
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
pci_set_master(dev);
|
pci_set_master(dev);
|
||||||
/*
|
/*
|
||||||
* Initialize service irqs. Don't use service devices that
|
* Initialize service irqs. Don't use service devices that
|
||||||
|
|
|
@ -57,6 +57,22 @@ __setup("pcie_ports=", pcie_port_setup);
|
||||||
|
|
||||||
/* global data */
|
/* global data */
|
||||||
|
|
||||||
|
/**
|
||||||
|
* pcie_clear_root_pme_status - Clear root port PME interrupt status.
|
||||||
|
* @dev: PCIe root port or event collector.
|
||||||
|
*/
|
||||||
|
void pcie_clear_root_pme_status(struct pci_dev *dev)
|
||||||
|
{
|
||||||
|
int rtsta_pos;
|
||||||
|
u32 rtsta;
|
||||||
|
|
||||||
|
rtsta_pos = pci_pcie_cap(dev) + PCI_EXP_RTSTA;
|
||||||
|
|
||||||
|
pci_read_config_dword(dev, rtsta_pos, &rtsta);
|
||||||
|
rtsta |= PCI_EXP_RTSTA_PME;
|
||||||
|
pci_write_config_dword(dev, rtsta_pos, rtsta);
|
||||||
|
}
|
||||||
|
|
||||||
static int pcie_portdrv_restore_config(struct pci_dev *dev)
|
static int pcie_portdrv_restore_config(struct pci_dev *dev)
|
||||||
{
|
{
|
||||||
int retval;
|
int retval;
|
||||||
|
@ -69,6 +85,20 @@ static int pcie_portdrv_restore_config(struct pci_dev *dev)
|
||||||
}
|
}
|
||||||
|
|
||||||
#ifdef CONFIG_PM
|
#ifdef CONFIG_PM
|
||||||
|
static int pcie_port_resume_noirq(struct device *dev)
|
||||||
|
{
|
||||||
|
struct pci_dev *pdev = to_pci_dev(dev);
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Some BIOSes forget to clear Root PME Status bits after system wakeup
|
||||||
|
* which breaks ACPI-based runtime wakeup on PCI Express, so clear those
|
||||||
|
* bits now just in case (shouldn't hurt).
|
||||||
|
*/
|
||||||
|
if(pdev->pcie_type == PCI_EXP_TYPE_ROOT_PORT)
|
||||||
|
pcie_clear_root_pme_status(pdev);
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
static const struct dev_pm_ops pcie_portdrv_pm_ops = {
|
static const struct dev_pm_ops pcie_portdrv_pm_ops = {
|
||||||
.suspend = pcie_port_device_suspend,
|
.suspend = pcie_port_device_suspend,
|
||||||
.resume = pcie_port_device_resume,
|
.resume = pcie_port_device_resume,
|
||||||
|
@ -76,6 +106,7 @@ static const struct dev_pm_ops pcie_portdrv_pm_ops = {
|
||||||
.thaw = pcie_port_device_resume,
|
.thaw = pcie_port_device_resume,
|
||||||
.poweroff = pcie_port_device_suspend,
|
.poweroff = pcie_port_device_suspend,
|
||||||
.restore = pcie_port_device_resume,
|
.restore = pcie_port_device_resume,
|
||||||
|
.resume_noirq = pcie_port_resume_noirq,
|
||||||
};
|
};
|
||||||
|
|
||||||
#define PCIE_PORTDRV_PM_OPS (&pcie_portdrv_pm_ops)
|
#define PCIE_PORTDRV_PM_OPS (&pcie_portdrv_pm_ops)
|
||||||
|
@ -327,10 +358,8 @@ static int __init pcie_portdrv_init(void)
|
||||||
{
|
{
|
||||||
int retval;
|
int retval;
|
||||||
|
|
||||||
if (pcie_ports_disabled) {
|
if (pcie_ports_disabled)
|
||||||
pcie_no_aspm();
|
return pci_register_driver(&pcie_portdriver);
|
||||||
return -EACCES;
|
|
||||||
}
|
|
||||||
|
|
||||||
dmi_check_system(pcie_portdrv_dmi_table);
|
dmi_check_system(pcie_portdrv_dmi_table);
|
||||||
|
|
||||||
|
|
|
@ -7515,16 +7515,10 @@ static int ipr_reset_restore_cfg_space(struct ipr_cmnd *ipr_cmd)
|
||||||
{
|
{
|
||||||
struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
|
struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
|
||||||
volatile u32 int_reg;
|
volatile u32 int_reg;
|
||||||
int rc;
|
|
||||||
|
|
||||||
ENTER;
|
ENTER;
|
||||||
ioa_cfg->pdev->state_saved = true;
|
ioa_cfg->pdev->state_saved = true;
|
||||||
rc = pci_restore_state(ioa_cfg->pdev);
|
pci_restore_state(ioa_cfg->pdev);
|
||||||
|
|
||||||
if (rc != PCIBIOS_SUCCESSFUL) {
|
|
||||||
ipr_cmd->s.ioasa.hdr.ioasc = cpu_to_be32(IPR_IOASC_PCI_ACCESS_ERROR);
|
|
||||||
return IPR_RC_JOB_CONTINUE;
|
|
||||||
}
|
|
||||||
|
|
||||||
if (ipr_set_pcix_cmd_reg(ioa_cfg)) {
|
if (ipr_set_pcix_cmd_reg(ioa_cfg)) {
|
||||||
ipr_cmd->s.ioasa.hdr.ioasc = cpu_to_be32(IPR_IOASC_PCI_ACCESS_ERROR);
|
ipr_cmd->s.ioasa.hdr.ioasc = cpu_to_be32(IPR_IOASC_PCI_ACCESS_ERROR);
|
||||||
|
|
|
@ -2228,12 +2228,7 @@ static void pmcraid_ioa_reset(struct pmcraid_cmd *cmd)
|
||||||
/* Once either bist or pci reset is done, restore PCI config
|
/* Once either bist or pci reset is done, restore PCI config
|
||||||
* space. If this fails, proceed with hard reset again
|
* space. If this fails, proceed with hard reset again
|
||||||
*/
|
*/
|
||||||
if (pci_restore_state(pinstance->pdev)) {
|
pci_restore_state(pinstance->pdev);
|
||||||
pmcraid_info("config-space error resetting again\n");
|
|
||||||
pinstance->ioa_state = IOA_STATE_IN_RESET_ALERT;
|
|
||||||
pmcraid_reset_alert(cmd);
|
|
||||||
break;
|
|
||||||
}
|
|
||||||
|
|
||||||
/* fail all pending commands */
|
/* fail all pending commands */
|
||||||
pmcraid_fail_outstanding_cmds(pinstance);
|
pmcraid_fail_outstanding_cmds(pinstance);
|
||||||
|
|
|
@ -1071,7 +1071,7 @@ static int __maybe_unused smtcfb_resume(struct pci_dev *pdev)
|
||||||
/* when resuming, restore pci data and fb cursor */
|
/* when resuming, restore pci data and fb cursor */
|
||||||
if (pdev->dev.power.power_state.event != PM_EVENT_FREEZE) {
|
if (pdev->dev.power.power_state.event != PM_EVENT_FREEZE) {
|
||||||
retv = pci_set_power_state(pdev, PCI_D0);
|
retv = pci_set_power_state(pdev, PCI_D0);
|
||||||
retv = pci_restore_state(pdev);
|
pci_restore_state(pdev);
|
||||||
if (pci_enable_device(pdev))
|
if (pci_enable_device(pdev))
|
||||||
return -1;
|
return -1;
|
||||||
pci_set_master(pdev);
|
pci_set_master(pdev);
|
||||||
|
|
|
@ -19,6 +19,12 @@
|
||||||
extern int hest_disable;
|
extern int hest_disable;
|
||||||
extern int erst_disable;
|
extern int erst_disable;
|
||||||
|
|
||||||
|
#ifdef CONFIG_ACPI_APEI
|
||||||
|
void __init acpi_hest_init(void);
|
||||||
|
#else
|
||||||
|
static inline void acpi_hest_init(void) { return; }
|
||||||
|
#endif
|
||||||
|
|
||||||
typedef int (*apei_hest_func_t)(struct acpi_hest_header *hest_hdr, void *data);
|
typedef int (*apei_hest_func_t)(struct acpi_hest_header *hest_hdr, void *data);
|
||||||
int apei_hest_parse(apei_hest_func_t func, void *data);
|
int apei_hest_parse(apei_hest_func_t func, void *data);
|
||||||
|
|
||||||
|
|
|
@ -40,4 +40,10 @@ static inline acpi_handle acpi_find_root_bridge_handle(struct pci_dev *pdev)
|
||||||
{ return NULL; }
|
{ return NULL; }
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
#ifdef CONFIG_ACPI_APEI
|
||||||
|
extern bool aer_acpi_firmware_first(void);
|
||||||
|
#else
|
||||||
|
static inline bool aer_acpi_firmware_first(void) { return false; }
|
||||||
|
#endif
|
||||||
|
|
||||||
#endif /* _PCI_ACPI_H_ */
|
#endif /* _PCI_ACPI_H_ */
|
||||||
|
|
|
@ -27,6 +27,7 @@ extern void pcie_aspm_init_link_state(struct pci_dev *pdev);
|
||||||
extern void pcie_aspm_exit_link_state(struct pci_dev *pdev);
|
extern void pcie_aspm_exit_link_state(struct pci_dev *pdev);
|
||||||
extern void pcie_aspm_pm_state_change(struct pci_dev *pdev);
|
extern void pcie_aspm_pm_state_change(struct pci_dev *pdev);
|
||||||
extern void pci_disable_link_state(struct pci_dev *pdev, int state);
|
extern void pci_disable_link_state(struct pci_dev *pdev, int state);
|
||||||
|
extern void pcie_clear_aspm(void);
|
||||||
extern void pcie_no_aspm(void);
|
extern void pcie_no_aspm(void);
|
||||||
#else
|
#else
|
||||||
static inline void pcie_aspm_init_link_state(struct pci_dev *pdev)
|
static inline void pcie_aspm_init_link_state(struct pci_dev *pdev)
|
||||||
|
@ -41,7 +42,9 @@ static inline void pcie_aspm_pm_state_change(struct pci_dev *pdev)
|
||||||
static inline void pci_disable_link_state(struct pci_dev *pdev, int state)
|
static inline void pci_disable_link_state(struct pci_dev *pdev, int state)
|
||||||
{
|
{
|
||||||
}
|
}
|
||||||
|
static inline void pcie_clear_aspm(void)
|
||||||
|
{
|
||||||
|
}
|
||||||
static inline void pcie_no_aspm(void)
|
static inline void pcie_no_aspm(void)
|
||||||
{
|
{
|
||||||
}
|
}
|
||||||
|
|
|
@ -806,7 +806,7 @@ size_t pci_get_rom_size(struct pci_dev *pdev, void __iomem *rom, size_t size);
|
||||||
|
|
||||||
/* Power management related routines */
|
/* Power management related routines */
|
||||||
int pci_save_state(struct pci_dev *dev);
|
int pci_save_state(struct pci_dev *dev);
|
||||||
int pci_restore_state(struct pci_dev *dev);
|
void pci_restore_state(struct pci_dev *dev);
|
||||||
int __pci_complete_power_transition(struct pci_dev *dev, pci_power_t state);
|
int __pci_complete_power_transition(struct pci_dev *dev, pci_power_t state);
|
||||||
int pci_set_power_state(struct pci_dev *dev, pci_power_t state);
|
int pci_set_power_state(struct pci_dev *dev, pci_power_t state);
|
||||||
pci_power_t pci_choose_state(struct pci_dev *dev, pm_message_t state);
|
pci_power_t pci_choose_state(struct pci_dev *dev, pm_message_t state);
|
||||||
|
@ -820,7 +820,6 @@ int pci_prepare_to_sleep(struct pci_dev *dev);
|
||||||
int pci_back_from_sleep(struct pci_dev *dev);
|
int pci_back_from_sleep(struct pci_dev *dev);
|
||||||
bool pci_dev_run_wake(struct pci_dev *dev);
|
bool pci_dev_run_wake(struct pci_dev *dev);
|
||||||
bool pci_check_pme_status(struct pci_dev *dev);
|
bool pci_check_pme_status(struct pci_dev *dev);
|
||||||
void pci_wakeup_event(struct pci_dev *dev);
|
|
||||||
void pci_pme_wakeup_bus(struct pci_bus *bus);
|
void pci_pme_wakeup_bus(struct pci_bus *bus);
|
||||||
|
|
||||||
static inline int pci_enable_wake(struct pci_dev *dev, pci_power_t state,
|
static inline int pci_enable_wake(struct pci_dev *dev, pci_power_t state,
|
||||||
|
@ -994,6 +993,9 @@ extern void pci_restore_msi_state(struct pci_dev *dev);
|
||||||
extern int pci_msi_enabled(void);
|
extern int pci_msi_enabled(void);
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
extern bool pcie_ports_disabled;
|
||||||
|
extern bool pcie_ports_auto;
|
||||||
|
|
||||||
#ifndef CONFIG_PCIEASPM
|
#ifndef CONFIG_PCIEASPM
|
||||||
static inline int pcie_aspm_enabled(void)
|
static inline int pcie_aspm_enabled(void)
|
||||||
{
|
{
|
||||||
|
@ -1003,6 +1005,14 @@ static inline int pcie_aspm_enabled(void)
|
||||||
extern int pcie_aspm_enabled(void);
|
extern int pcie_aspm_enabled(void);
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
#ifdef CONFIG_PCIEAER
|
||||||
|
void pci_no_aer(void);
|
||||||
|
bool pci_aer_available(void);
|
||||||
|
#else
|
||||||
|
static inline void pci_no_aer(void) { }
|
||||||
|
static inline bool pci_aer_available(void) { return false; }
|
||||||
|
#endif
|
||||||
|
|
||||||
#ifndef CONFIG_PCIE_ECRC
|
#ifndef CONFIG_PCIE_ECRC
|
||||||
static inline void pcie_set_ecrc_checking(struct pci_dev *dev)
|
static inline void pcie_set_ecrc_checking(struct pci_dev *dev)
|
||||||
{
|
{
|
||||||
|
@ -1168,10 +1178,8 @@ static inline int pci_save_state(struct pci_dev *dev)
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
static inline int pci_restore_state(struct pci_dev *dev)
|
static inline void pci_restore_state(struct pci_dev *dev)
|
||||||
{
|
{ }
|
||||||
return 0;
|
|
||||||
}
|
|
||||||
|
|
||||||
static inline int pci_set_power_state(struct pci_dev *dev, pci_power_t state)
|
static inline int pci_set_power_state(struct pci_dev *dev, pci_power_t state)
|
||||||
{
|
{
|
||||||
|
|
|
@ -2478,7 +2478,8 @@
|
||||||
#define PCI_DEVICE_ID_INTEL_COUGARPOINT_LPC_MIN 0x1c41
|
#define PCI_DEVICE_ID_INTEL_COUGARPOINT_LPC_MIN 0x1c41
|
||||||
#define PCI_DEVICE_ID_INTEL_COUGARPOINT_LPC_MAX 0x1c5f
|
#define PCI_DEVICE_ID_INTEL_COUGARPOINT_LPC_MAX 0x1c5f
|
||||||
#define PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS 0x1d22
|
#define PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS 0x1d22
|
||||||
#define PCI_DEVICE_ID_INTEL_PATSBURG_LPC 0x1d40
|
#define PCI_DEVICE_ID_INTEL_PATSBURG_LPC_0 0x1d40
|
||||||
|
#define PCI_DEVICE_ID_INTEL_PATSBURG_LPC_1 0x1d41
|
||||||
#define PCI_DEVICE_ID_INTEL_82801AA_0 0x2410
|
#define PCI_DEVICE_ID_INTEL_82801AA_0 0x2410
|
||||||
#define PCI_DEVICE_ID_INTEL_82801AA_1 0x2411
|
#define PCI_DEVICE_ID_INTEL_82801AA_1 0x2411
|
||||||
#define PCI_DEVICE_ID_INTEL_82801AA_3 0x2413
|
#define PCI_DEVICE_ID_INTEL_82801AA_3 0x2413
|
||||||
|
|
|
@ -309,6 +309,14 @@
|
||||||
#define PCI_MSIX_PBA 8
|
#define PCI_MSIX_PBA 8
|
||||||
#define PCI_MSIX_FLAGS_BIRMASK (7 << 0)
|
#define PCI_MSIX_FLAGS_BIRMASK (7 << 0)
|
||||||
|
|
||||||
|
/* MSI-X entry's format */
|
||||||
|
#define PCI_MSIX_ENTRY_SIZE 16
|
||||||
|
#define PCI_MSIX_ENTRY_LOWER_ADDR 0
|
||||||
|
#define PCI_MSIX_ENTRY_UPPER_ADDR 4
|
||||||
|
#define PCI_MSIX_ENTRY_DATA 8
|
||||||
|
#define PCI_MSIX_ENTRY_VECTOR_CTRL 12
|
||||||
|
#define PCI_MSIX_ENTRY_CTRL_MASKBIT 1
|
||||||
|
|
||||||
/* CompactPCI Hotswap Register */
|
/* CompactPCI Hotswap Register */
|
||||||
|
|
||||||
#define PCI_CHSWP_CSR 2 /* Control and Status Register */
|
#define PCI_CHSWP_CSR 2 /* Control and Status Register */
|
||||||
|
@ -496,6 +504,8 @@
|
||||||
#define PCI_EXP_RTCTL_CRSSVE 0x10 /* CRS Software Visibility Enable */
|
#define PCI_EXP_RTCTL_CRSSVE 0x10 /* CRS Software Visibility Enable */
|
||||||
#define PCI_EXP_RTCAP 30 /* Root Capabilities */
|
#define PCI_EXP_RTCAP 30 /* Root Capabilities */
|
||||||
#define PCI_EXP_RTSTA 32 /* Root Status */
|
#define PCI_EXP_RTSTA 32 /* Root Status */
|
||||||
|
#define PCI_EXP_RTSTA_PME 0x10000 /* PME status */
|
||||||
|
#define PCI_EXP_RTSTA_PENDING 0x20000 /* PME pending */
|
||||||
#define PCI_EXP_DEVCAP2 36 /* Device Capabilities 2 */
|
#define PCI_EXP_DEVCAP2 36 /* Device Capabilities 2 */
|
||||||
#define PCI_EXP_DEVCAP2_ARI 0x20 /* Alternative Routing-ID */
|
#define PCI_EXP_DEVCAP2_ARI 0x20 /* Alternative Routing-ID */
|
||||||
#define PCI_EXP_DEVCTL2 40 /* Device Control 2 */
|
#define PCI_EXP_DEVCTL2 40 /* Device Control 2 */
|
||||||
|
|
|
@ -90,12 +90,7 @@ int snd_cs5535audio_resume(struct pci_dev *pci)
|
||||||
int i;
|
int i;
|
||||||
|
|
||||||
pci_set_power_state(pci, PCI_D0);
|
pci_set_power_state(pci, PCI_D0);
|
||||||
if (pci_restore_state(pci) < 0) {
|
pci_restore_state(pci);
|
||||||
printk(KERN_ERR "cs5535audio: pci_restore_state failed, "
|
|
||||||
"disabling device\n");
|
|
||||||
snd_card_disconnect(card);
|
|
||||||
return -EIO;
|
|
||||||
}
|
|
||||||
if (pci_enable_device(pci) < 0) {
|
if (pci_enable_device(pci) < 0) {
|
||||||
printk(KERN_ERR "cs5535audio: pci_enable_device failed, "
|
printk(KERN_ERR "cs5535audio: pci_enable_device failed, "
|
||||||
"disabling device\n");
|
"disabling device\n");
|
||||||
|
|
Loading…
Reference in a new issue