GPIO: clps711x: Fix direction logic for PORTD
PORTD have different direction logic, i.e. "0" is output and "1" is input. This patch fix this issue. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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41b3996e3b
commit
d6a2fa0424
1 changed files with 51 additions and 14 deletions
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@ -65,7 +65,7 @@ static void gpio_clps711x_set(struct gpio_chip *chip, unsigned offset,
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spin_unlock_irqrestore(&gpio->lock, flags);
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}
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static int gpio_clps711x_direction_in(struct gpio_chip *chip, unsigned offset)
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static int gpio_clps711x_dir_in(struct gpio_chip *chip, unsigned offset)
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{
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int tmp;
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unsigned long flags;
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@ -79,8 +79,8 @@ static int gpio_clps711x_direction_in(struct gpio_chip *chip, unsigned offset)
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return 0;
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}
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static int gpio_clps711x_direction_out(struct gpio_chip *chip, unsigned offset,
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int value)
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static int gpio_clps711x_dir_out(struct gpio_chip *chip, unsigned offset,
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int value)
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{
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int tmp;
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unsigned long flags;
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@ -98,17 +98,49 @@ static int gpio_clps711x_direction_out(struct gpio_chip *chip, unsigned offset,
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return 0;
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}
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struct clps711x_gpio_port {
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static int gpio_clps711x_dir_in_inv(struct gpio_chip *chip, unsigned offset)
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{
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int tmp;
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unsigned long flags;
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struct clps711x_gpio *gpio = dev_get_drvdata(chip->dev);
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spin_lock_irqsave(&gpio->lock, flags);
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tmp = readb(clps711x_pdir(chip)) | (1 << offset);
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writeb(tmp, clps711x_pdir(chip));
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spin_unlock_irqrestore(&gpio->lock, flags);
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return 0;
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}
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static int gpio_clps711x_dir_out_inv(struct gpio_chip *chip, unsigned offset,
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int value)
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{
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int tmp;
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unsigned long flags;
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struct clps711x_gpio *gpio = dev_get_drvdata(chip->dev);
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spin_lock_irqsave(&gpio->lock, flags);
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tmp = readb(clps711x_pdir(chip)) & ~(1 << offset);
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writeb(tmp, clps711x_pdir(chip));
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tmp = readb(clps711x_port(chip)) & ~(1 << offset);
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if (value)
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tmp |= 1 << offset;
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writeb(tmp, clps711x_port(chip));
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spin_unlock_irqrestore(&gpio->lock, flags);
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return 0;
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}
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static struct {
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char *name;
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int nr;
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};
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static const struct clps711x_gpio_port clps711x_gpio_ports[] __initconst = {
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{ "PORTA", 8, },
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{ "PORTB", 8, },
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{ "PORTC", 8, },
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{ "PORTD", 8, },
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{ "PORTE", 3, },
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int inv_dir;
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} clps711x_gpio_ports[] __initconst = {
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{ "PORTA", 8, 0, },
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{ "PORTB", 8, 0, },
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{ "PORTC", 8, 0, },
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{ "PORTD", 8, 1, },
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{ "PORTE", 3, 0, },
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};
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static int __init gpio_clps711x_init(void)
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@ -145,10 +177,15 @@ static int __init gpio_clps711x_init(void)
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gpio->chip[i].label = clps711x_gpio_ports[i].name;
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gpio->chip[i].base = i * 8;
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gpio->chip[i].ngpio = clps711x_gpio_ports[i].nr;
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gpio->chip[i].direction_input = gpio_clps711x_direction_in;
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gpio->chip[i].get = gpio_clps711x_get;
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gpio->chip[i].direction_output = gpio_clps711x_direction_out;
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gpio->chip[i].set = gpio_clps711x_set;
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if (!clps711x_gpio_ports[i].inv_dir) {
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gpio->chip[i].direction_input = gpio_clps711x_dir_in;
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gpio->chip[i].direction_output = gpio_clps711x_dir_out;
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} else {
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gpio->chip[i].direction_input = gpio_clps711x_dir_in_inv;
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gpio->chip[i].direction_output = gpio_clps711x_dir_out_inv;
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}
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WARN_ON(gpiochip_add(&gpio->chip[i]));
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}
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