genirq: Introduce IRQD_SINGLE_TARGET flag
Many interrupt chips allow only a single CPU as interrupt target. The core code has no knowledge about that. That's unfortunate as it could avoid trying to readd a newly online CPU to the effective affinity mask. Add the status flag and the necessary accessors. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Jens Axboe <axboe@kernel.dk> Cc: Marc Zyngier <marc.zyngier@arm.com> Cc: Michael Ellerman <mpe@ellerman.id.au> Cc: Keith Busch <keith.busch@intel.com> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Christoph Hellwig <hch@lst.de> Link: http://lkml.kernel.org/r/20170619235447.352343969@linutronix.de
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@ -209,6 +209,7 @@ struct irq_data {
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* IRQD_IRQ_STARTED - Startup state of the interrupt
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* IRQD_MANAGED_SHUTDOWN - Interrupt was shutdown due to empty affinity
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* mask. Applies only to affinity managed irqs.
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* IRQD_SINGLE_TARGET - IRQ allows only a single affinity target
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*/
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enum {
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IRQD_TRIGGER_MASK = 0xf,
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@ -228,6 +229,7 @@ enum {
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IRQD_AFFINITY_MANAGED = (1 << 21),
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IRQD_IRQ_STARTED = (1 << 22),
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IRQD_MANAGED_SHUTDOWN = (1 << 23),
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IRQD_SINGLE_TARGET = (1 << 24),
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};
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#define __irqd_to_state(d) ACCESS_PRIVATE((d)->common, state_use_accessors)
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@ -276,6 +278,20 @@ static inline bool irqd_is_level_type(struct irq_data *d)
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return __irqd_to_state(d) & IRQD_LEVEL;
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}
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/*
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* Must only be called of irqchip.irq_set_affinity() or low level
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* hieararchy domain allocation functions.
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*/
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static inline void irqd_set_single_target(struct irq_data *d)
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{
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__irqd_to_state(d) |= IRQD_SINGLE_TARGET;
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}
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static inline bool irqd_is_single_target(struct irq_data *d)
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{
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return __irqd_to_state(d) & IRQD_SINGLE_TARGET;
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}
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static inline bool irqd_is_wakeup_set(struct irq_data *d)
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{
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return __irqd_to_state(d) & IRQD_WAKEUP_STATE;
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@ -105,6 +105,7 @@ static const struct irq_bit_descr irqdata_states[] = {
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BIT_MASK_DESCR(IRQD_PER_CPU),
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BIT_MASK_DESCR(IRQD_NO_BALANCING),
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BIT_MASK_DESCR(IRQD_SINGLE_TARGET),
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BIT_MASK_DESCR(IRQD_MOVE_PCNTXT),
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BIT_MASK_DESCR(IRQD_AFFINITY_SET),
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BIT_MASK_DESCR(IRQD_SETAFFINITY_PENDING),
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