MIPS: ralink: add CPU interrupt controller to of_irq_ids
Convert the ralink IRQ code to make use of the new MIPS IRQ controller OF mappings. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Signed-off-by: John Crispin <blogic@openwrt.org> Acked-by: David Daney <david.daney@cavium.com> Patchwork: http://patchwork.linux-mips.org/patch/4900/
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0916b46962
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2 changed files with 17 additions and 3 deletions
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@ -13,6 +13,13 @@
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bootargs = "console=ttyS0,57600 init=/init";
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};
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cpuintc: cpuintc@0 {
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#address-cells = <0>;
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#interrupt-cells = <1>;
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interrupt-controller;
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compatible = "mti,cpu-interrupt-controller";
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};
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palmbus@10000000 {
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compatible = "palmbus";
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reg = <0x10000000 0x200000>;
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@ -37,6 +44,9 @@
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interrupt-controller;
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#interrupt-cells = <1>;
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interrupt-parent = <&cpuintc>;
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interrupts = <2>;
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};
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memc@300 {
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@ -128,8 +128,11 @@ static int __init intc_of_init(struct device_node *node,
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{
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struct resource res;
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struct irq_domain *domain;
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int irq;
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mips_cpu_irq_init();
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irq = irq_of_parse_and_map(node, 0);
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if (!irq)
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panic("Failed to get INTC IRQ");
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if (of_address_to_resource(node, 0, &res))
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panic("Failed to get intc memory range");
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@ -156,8 +159,8 @@ static int __init intc_of_init(struct device_node *node,
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rt_intc_w32(INTC_INT_GLOBAL, INTC_REG_ENABLE);
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irq_set_chained_handler(RALINK_CPU_IRQ_INTC, ralink_intc_irq_handler);
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irq_set_handler_data(RALINK_CPU_IRQ_INTC, domain);
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irq_set_chained_handler(irq, ralink_intc_irq_handler);
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irq_set_handler_data(irq, domain);
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cp0_perfcount_irq = irq_create_mapping(domain, 9);
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@ -165,6 +168,7 @@ static int __init intc_of_init(struct device_node *node,
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}
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static struct of_device_id __initdata of_irq_ids[] = {
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{ .compatible = "mti,cpu-interrupt-controller", .data = mips_cpu_intc_init },
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{ .compatible = "ralink,rt2880-intc", .data = intc_of_init },
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{},
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};
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