[PATCH] ARM: Move copy/clear user_page locking into implementation
Move the locking for copy_user_page() and clear_user_page() into the implementations which require locking. For simple memcpy/ memset based implementations, the locking is extra overhead which is not necessary, and prevents preemption occuring. Signed-off-by: Russell King <rmk@arm.linux.org.uk>
This commit is contained in:
Russell King
parent
c4e1f6f6bf
commit
d2bab05ac1
3 changed files with 113 additions and 93 deletions
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@ -1,80 +0,0 @@
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/*
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* linux/arch/arm/lib/copy_page-armv4mc.S
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*
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* Copyright (C) 1995-2001 Russell King
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* ASM optimised string functions
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*/
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#include <linux/linkage.h>
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#include <linux/init.h>
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#include <asm/constants.h>
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.text
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.align 5
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/*
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* ARMv4 mini-dcache optimised copy_user_page
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*
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* We flush the destination cache lines just before we write the data into the
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* corresponding address. Since the Dcache is read-allocate, this removes the
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* Dcache aliasing issue. The writes will be forwarded to the write buffer,
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* and merged as appropriate.
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*
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* Note: We rely on all ARMv4 processors implementing the "invalidate D line"
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* instruction. If your processor does not supply this, you have to write your
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* own copy_user_page that does the right thing.
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*/
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ENTRY(v4_mc_copy_user_page)
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stmfd sp!, {r4, lr} @ 2
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mov r4, r0
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mov r0, r1
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bl map_page_minicache
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mov r1, #PAGE_SZ/64 @ 1
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ldmia r0!, {r2, r3, ip, lr} @ 4
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1: mcr p15, 0, r4, c7, c6, 1 @ 1 invalidate D line
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stmia r4!, {r2, r3, ip, lr} @ 4
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ldmia r0!, {r2, r3, ip, lr} @ 4+1
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stmia r4!, {r2, r3, ip, lr} @ 4
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ldmia r0!, {r2, r3, ip, lr} @ 4
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mcr p15, 0, r4, c7, c6, 1 @ 1 invalidate D line
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stmia r4!, {r2, r3, ip, lr} @ 4
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ldmia r0!, {r2, r3, ip, lr} @ 4
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subs r1, r1, #1 @ 1
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stmia r4!, {r2, r3, ip, lr} @ 4
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ldmneia r0!, {r2, r3, ip, lr} @ 4
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bne 1b @ 1
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ldmfd sp!, {r4, pc} @ 3
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.align 5
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/*
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* ARMv4 optimised clear_user_page
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*
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* Same story as above.
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*/
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ENTRY(v4_mc_clear_user_page)
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str lr, [sp, #-4]!
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mov r1, #PAGE_SZ/64 @ 1
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mov r2, #0 @ 1
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mov r3, #0 @ 1
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mov ip, #0 @ 1
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mov lr, #0 @ 1
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1: mcr p15, 0, r0, c7, c6, 1 @ 1 invalidate D line
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stmia r0!, {r2, r3, ip, lr} @ 4
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stmia r0!, {r2, r3, ip, lr} @ 4
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mcr p15, 0, r0, c7, c6, 1 @ 1 invalidate D line
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stmia r0!, {r2, r3, ip, lr} @ 4
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stmia r0!, {r2, r3, ip, lr} @ 4
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subs r1, r1, #1 @ 1
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bne 1b @ 1
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ldr pc, [sp], #4
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__INITDATA
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.type v4_mc_user_fns, #object
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ENTRY(v4_mc_user_fns)
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.long v4_mc_clear_user_page
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.long v4_mc_copy_user_page
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.size v4_mc_user_fns, . - v4_mc_user_fns
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111
arch/arm/mm/copypage-v4mc.c
Normal file
111
arch/arm/mm/copypage-v4mc.c
Normal file
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@ -0,0 +1,111 @@
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/*
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* linux/arch/arm/lib/copypage-armv4mc.S
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*
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* Copyright (C) 1995-2005 Russell King
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This handles the mini data cache, as found on SA11x0 and XScale
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* processors. When we copy a user page page, we map it in such a way
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* that accesses to this page will not touch the main data cache, but
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* will be cached in the mini data cache. This prevents us thrashing
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* the main data cache on page faults.
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*/
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#include <linux/init.h>
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#include <linux/mm.h>
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#include <asm/page.h>
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#include <asm/pgtable.h>
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#include <asm/tlbflush.h>
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/*
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* 0xffff8000 to 0xffffffff is reserved for any ARM architecture
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* specific hacks for copying pages efficiently.
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*/
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#define minicache_pgprot __pgprot(L_PTE_PRESENT | L_PTE_YOUNG | \
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L_PTE_CACHEABLE)
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#define TOP_PTE(x) pte_offset_kernel(top_pmd, x)
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static DEFINE_SPINLOCK(minicache_lock);
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/*
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* ARMv4 mini-dcache optimised copy_user_page
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*
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* We flush the destination cache lines just before we write the data into the
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* corresponding address. Since the Dcache is read-allocate, this removes the
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* Dcache aliasing issue. The writes will be forwarded to the write buffer,
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* and merged as appropriate.
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*
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* Note: We rely on all ARMv4 processors implementing the "invalidate D line"
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* instruction. If your processor does not supply this, you have to write your
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* own copy_user_page that does the right thing.
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*/
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static void __attribute__((naked))
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mc_copy_user_page(void *from, void *to)
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{
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asm volatile(
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"stmfd sp!, {r4, lr} @ 2\n\
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mov r4, %2 @ 1\n\
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ldmia %0!, {r2, r3, ip, lr} @ 4\n\
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1: mcr p15, 0, %1, c7, c6, 1 @ 1 invalidate D line\n\
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stmia %1!, {r2, r3, ip, lr} @ 4\n\
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ldmia %0!, {r2, r3, ip, lr} @ 4+1\n\
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stmia %1!, {r2, r3, ip, lr} @ 4\n\
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ldmia %0!, {r2, r3, ip, lr} @ 4\n\
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mcr p15, 0, %1, c7, c6, 1 @ 1 invalidate D line\n\
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stmia %1!, {r2, r3, ip, lr} @ 4\n\
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ldmia %0!, {r2, r3, ip, lr} @ 4\n\
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subs r4, r4, #1 @ 1\n\
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stmia %1!, {r2, r3, ip, lr} @ 4\n\
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ldmneia %0!, {r2, r3, ip, lr} @ 4\n\
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bne 1b @ 1\n\
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ldmfd sp!, {r4, pc} @ 3"
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:
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: "r" (from), "r" (to), "I" (PAGE_SIZE / 64));
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}
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void v4_mc_copy_user_page(void *kto, const void *kfrom, unsigned long vaddr)
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{
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spin_lock(&minicache_lock);
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set_pte(TOP_PTE(COPYPAGE_MINICACHE), pfn_pte(__pa(kfrom) >> PAGE_SHIFT, minicache_pgprot));
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flush_tlb_kernel_page(COPYPAGE_MINICACHE);
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mc_copy_user_page((void *)COPYPAGE_MINICACHE, kto);
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spin_unlock(&minicache_lock);
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}
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/*
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* ARMv4 optimised clear_user_page
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*/
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void __attribute__((naked))
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v4_mc_clear_user_page(void *kaddr, unsigned long vaddr)
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{
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asm volatile(
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"str lr, [sp, #-4]!\n\
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mov r1, %0 @ 1\n\
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mov r2, #0 @ 1\n\
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mov r3, #0 @ 1\n\
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mov ip, #0 @ 1\n\
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mov lr, #0 @ 1\n\
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1: mcr p15, 0, r0, c7, c6, 1 @ 1 invalidate D line\n\
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stmia r0!, {r2, r3, ip, lr} @ 4\n\
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stmia r0!, {r2, r3, ip, lr} @ 4\n\
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mcr p15, 0, r0, c7, c6, 1 @ 1 invalidate D line\n\
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stmia r0!, {r2, r3, ip, lr} @ 4\n\
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stmia r0!, {r2, r3, ip, lr} @ 4\n\
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subs r1, r1, #1 @ 1\n\
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bne 1b @ 1\n\
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ldr pc, [sp], #4"
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:
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: "I" (PAGE_SIZE / 64));
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}
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struct cpu_user_fns v4_mc_user_fns __initdata = {
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.cpu_clear_user_page = v4_mc_clear_user_page,
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.cpu_copy_user_page = v4_mc_copy_user_page,
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};
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@ -114,19 +114,8 @@ extern void __cpu_copy_user_page(void *to, const void *from,
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unsigned long user);
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unsigned long user);
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#endif
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#endif
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#define clear_user_page(addr,vaddr,pg) \
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#define clear_user_page(addr,vaddr,pg) __cpu_clear_user_page(addr, vaddr)
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do { \
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#define copy_user_page(to,from,vaddr,pg) __cpu_copy_user_page(to, from, vaddr)
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preempt_disable(); \
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__cpu_clear_user_page(addr, vaddr); \
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preempt_enable(); \
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} while (0)
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#define copy_user_page(to,from,vaddr,pg) \
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do { \
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preempt_disable(); \
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__cpu_copy_user_page(to, from, vaddr); \
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preempt_enable(); \
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} while (0)
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#define clear_page(page) memzero((void *)(page), PAGE_SIZE)
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#define clear_page(page) memzero((void *)(page), PAGE_SIZE)
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extern void copy_page(void *to, const void *from);
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extern void copy_page(void *to, const void *from);
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