Merge tag 'topic/drm-fixes-2015-09-09' of git://anongit.freedesktop.org/drm-intel into drm-next
bunch of drm fixes. * tag 'topic/drm-fixes-2015-09-09' of git://anongit.freedesktop.org/drm-intel: drm/dp: Add dp_aux_i2c_speed_khz module param to set the assume i2c bus speed drm/dp: Adjust i2c-over-aux retry count based on message size and i2c bus speed drm/dp: Define AUX_RETRY_INTERVAL as 500 us drm/atomic: Fix bookkeeping with TEST_ONLY, v3.
This commit is contained in:
commit
d1031d576d
2 changed files with 117 additions and 21 deletions
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@ -1515,7 +1515,8 @@ int drm_mode_atomic_ioctl(struct drm_device *dev,
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copied_props++;
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}
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if (obj->type == DRM_MODE_OBJECT_PLANE && count_props) {
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if (obj->type == DRM_MODE_OBJECT_PLANE && count_props &&
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!(arg->flags & DRM_MODE_ATOMIC_TEST_ONLY)) {
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plane = obj_to_plane(obj);
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plane_mask |= (1 << drm_plane_index(plane));
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plane->old_fb = plane->fb;
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@ -1537,10 +1538,11 @@ int drm_mode_atomic_ioctl(struct drm_device *dev,
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}
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if (arg->flags & DRM_MODE_ATOMIC_TEST_ONLY) {
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/*
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* Unlike commit, check_only does not clean up state.
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* Below we call drm_atomic_state_free for it.
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*/
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ret = drm_atomic_check_only(state);
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/* _check_only() does not free state, unlike _commit() */
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if (!ret)
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drm_atomic_state_free(state);
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} else if (arg->flags & DRM_MODE_ATOMIC_NONBLOCK) {
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ret = drm_atomic_async_commit(state);
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} else {
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@ -1567,25 +1569,30 @@ int drm_mode_atomic_ioctl(struct drm_device *dev,
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plane->old_fb = NULL;
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}
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if (ret && arg->flags & DRM_MODE_PAGE_FLIP_EVENT) {
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/*
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* TEST_ONLY and PAGE_FLIP_EVENT are mutually exclusive,
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* if they weren't, this code should be called on success
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* for TEST_ONLY too.
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*/
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for_each_crtc_in_state(state, crtc, crtc_state, i) {
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if (!crtc_state->event)
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continue;
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destroy_vblank_event(dev, file_priv,
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crtc_state->event);
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}
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}
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if (ret == -EDEADLK) {
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drm_atomic_state_clear(state);
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drm_modeset_backoff(&ctx);
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goto retry;
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}
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if (ret) {
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if (arg->flags & DRM_MODE_PAGE_FLIP_EVENT) {
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for_each_crtc_in_state(state, crtc, crtc_state, i) {
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if (!crtc_state->event)
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continue;
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destroy_vblank_event(dev, file_priv,
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crtc_state->event);
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}
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}
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if (ret || arg->flags & DRM_MODE_ATOMIC_TEST_ONLY)
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drm_atomic_state_free(state);
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}
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drm_modeset_drop_locks(&ctx);
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drm_modeset_acquire_fini(&ctx);
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@ -159,6 +159,8 @@ int drm_dp_bw_code_to_link_rate(u8 link_bw)
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}
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EXPORT_SYMBOL(drm_dp_bw_code_to_link_rate);
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#define AUX_RETRY_INTERVAL 500 /* us */
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/**
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* DOC: dp helpers
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*
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@ -213,7 +215,7 @@ static int drm_dp_dpcd_access(struct drm_dp_aux *aux, u8 request,
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return -EIO;
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case DP_AUX_NATIVE_REPLY_DEFER:
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usleep_range(400, 500);
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usleep_range(AUX_RETRY_INTERVAL, AUX_RETRY_INTERVAL + 100);
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break;
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}
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}
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@ -422,6 +424,90 @@ static u32 drm_dp_i2c_functionality(struct i2c_adapter *adapter)
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I2C_FUNC_10BIT_ADDR;
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}
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#define AUX_PRECHARGE_LEN 10 /* 10 to 16 */
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#define AUX_SYNC_LEN (16 + 4) /* preamble + AUX_SYNC_END */
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#define AUX_STOP_LEN 4
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#define AUX_CMD_LEN 4
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#define AUX_ADDRESS_LEN 20
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#define AUX_REPLY_PAD_LEN 4
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#define AUX_LENGTH_LEN 8
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/*
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* Calculate the duration of the AUX request/reply in usec. Gives the
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* "best" case estimate, ie. successful while as short as possible.
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*/
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static int drm_dp_aux_req_duration(const struct drm_dp_aux_msg *msg)
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{
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int len = AUX_PRECHARGE_LEN + AUX_SYNC_LEN + AUX_STOP_LEN +
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AUX_CMD_LEN + AUX_ADDRESS_LEN + AUX_LENGTH_LEN;
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if ((msg->request & DP_AUX_I2C_READ) == 0)
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len += msg->size * 8;
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return len;
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}
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static int drm_dp_aux_reply_duration(const struct drm_dp_aux_msg *msg)
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{
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int len = AUX_PRECHARGE_LEN + AUX_SYNC_LEN + AUX_STOP_LEN +
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AUX_CMD_LEN + AUX_REPLY_PAD_LEN;
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/*
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* For read we expect what was asked. For writes there will
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* be 0 or 1 data bytes. Assume 0 for the "best" case.
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*/
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if (msg->request & DP_AUX_I2C_READ)
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len += msg->size * 8;
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return len;
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}
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#define I2C_START_LEN 1
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#define I2C_STOP_LEN 1
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#define I2C_ADDR_LEN 9 /* ADDRESS + R/W + ACK/NACK */
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#define I2C_DATA_LEN 9 /* DATA + ACK/NACK */
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/*
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* Calculate the length of the i2c transfer in usec, assuming
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* the i2c bus speed is as specified. Gives the the "worst"
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* case estimate, ie. successful while as long as possible.
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* Doesn't account the the "MOT" bit, and instead assumes each
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* message includes a START, ADDRESS and STOP. Neither does it
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* account for additional random variables such as clock stretching.
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*/
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static int drm_dp_i2c_msg_duration(const struct drm_dp_aux_msg *msg,
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int i2c_speed_khz)
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{
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/* AUX bitrate is 1MHz, i2c bitrate as specified */
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return DIV_ROUND_UP((I2C_START_LEN + I2C_ADDR_LEN +
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msg->size * I2C_DATA_LEN +
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I2C_STOP_LEN) * 1000, i2c_speed_khz);
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}
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/*
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* Deterine how many retries should be attempted to successfully transfer
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* the specified message, based on the estimated durations of the
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* i2c and AUX transfers.
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*/
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static int drm_dp_i2c_retry_count(const struct drm_dp_aux_msg *msg,
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int i2c_speed_khz)
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{
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int aux_time_us = drm_dp_aux_req_duration(msg) +
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drm_dp_aux_reply_duration(msg);
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int i2c_time_us = drm_dp_i2c_msg_duration(msg, i2c_speed_khz);
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return DIV_ROUND_UP(i2c_time_us, aux_time_us + AUX_RETRY_INTERVAL);
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}
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/*
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* FIXME currently assumes 10 kHz as some real world devices seem
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* to require it. We should query/set the speed via DPCD if supported.
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*/
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static int dp_aux_i2c_speed_khz __read_mostly = 10;
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module_param_unsafe(dp_aux_i2c_speed_khz, int, 0644);
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MODULE_PARM_DESC(dp_aux_i2c_speed_khz,
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"Assumed speed of the i2c bus in kHz, (1-400, default 10)");
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/*
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* Transfer a single I2C-over-AUX message and handle various error conditions,
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* retrying the transaction as appropriate. It is assumed that the
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@ -434,13 +520,16 @@ static int drm_dp_i2c_do_msg(struct drm_dp_aux *aux, struct drm_dp_aux_msg *msg)
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{
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unsigned int retry, defer_i2c;
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int ret;
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/*
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* DP1.2 sections 2.7.7.1.5.6.1 and 2.7.7.1.6.6.1: A DP Source device
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* is required to retry at least seven times upon receiving AUX_DEFER
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* before giving up the AUX transaction.
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*
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* We also try to account for the i2c bus speed.
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*/
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for (retry = 0, defer_i2c = 0; retry < (7 + defer_i2c); retry++) {
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int max_retries = max(7, drm_dp_i2c_retry_count(msg, dp_aux_i2c_speed_khz));
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for (retry = 0, defer_i2c = 0; retry < (max_retries + defer_i2c); retry++) {
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mutex_lock(&aux->hw_mutex);
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ret = aux->transfer(aux, msg);
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mutex_unlock(&aux->hw_mutex);
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@ -476,7 +565,7 @@ static int drm_dp_i2c_do_msg(struct drm_dp_aux *aux, struct drm_dp_aux_msg *msg)
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* For now just defer for long enough to hopefully be
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* safe for all use-cases.
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*/
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usleep_range(500, 600);
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usleep_range(AUX_RETRY_INTERVAL, AUX_RETRY_INTERVAL + 100);
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continue;
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default:
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@ -506,7 +595,7 @@ static int drm_dp_i2c_do_msg(struct drm_dp_aux *aux, struct drm_dp_aux_msg *msg)
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aux->i2c_defer_count++;
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if (defer_i2c < 7)
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defer_i2c++;
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usleep_range(400, 500);
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usleep_range(AUX_RETRY_INTERVAL, AUX_RETRY_INTERVAL + 100);
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continue;
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default:
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