drm/i915: Add support for GPU reset on gen6.
This has proven sufficient to recover from a hang of the GPU using the gem_bad_blit test while at the KMS console then starting X. When attempting the same during an X session, the timer doesn't appear to trigger. Signed-off-by: Eric Anholt <eric@anholt.net> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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2 changed files with 17 additions and 0 deletions
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@ -405,6 +405,14 @@ static int ironlake_do_reset(struct drm_device *dev, u8 flags)
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return wait_for(I915_READ(MCHBAR_MIRROR_BASE + ILK_GDSR) & 0x1, 500);
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}
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static int gen6_do_reset(struct drm_device *dev, u8 flags)
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{
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struct drm_i915_private *dev_priv = dev->dev_private;
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I915_WRITE(GEN6_GDRST, GEN6_GRDOM_FULL);
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return wait_for((I915_READ(GEN6_GDRST) & GEN6_GRDOM_FULL) == 0, 500);
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}
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/**
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* i965_reset - reset chip after a hang
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* @dev: drm device to reset
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@ -439,6 +447,9 @@ int i915_reset(struct drm_device *dev, u8 flags)
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if (get_seconds() - dev_priv->last_gpu_reset < 5) {
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DRM_ERROR("GPU hanging too fast, declaring wedged!\n");
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} else switch (INTEL_INFO(dev)->gen) {
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case 6:
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ret = gen6_do_reset(dev, flags);
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break;
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case 5:
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ret = ironlake_do_reset(dev, flags);
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break;
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@ -78,6 +78,12 @@
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#define GRDOM_RENDER (1<<2)
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#define GRDOM_MEDIA (3<<2)
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#define GEN6_GDRST 0x941c
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#define GEN6_GRDOM_FULL (1 << 0)
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#define GEN6_GRDOM_RENDER (1 << 1)
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#define GEN6_GRDOM_MEDIA (1 << 2)
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#define GEN6_GRDOM_BLT (1 << 3)
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/* VGA stuff */
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#define VGA_ST01_MDA 0x3ba
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