include/asm-x86/pgtable_32.h: checkpatch cleanups - formatting only
Signed-off-by: Joe Perches <joe@perches.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
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1 changed files with 53 additions and 49 deletions
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@ -40,13 +40,13 @@ void paging_init(void);
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#ifdef CONFIG_X86_PAE
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# include <asm/pgtable-3level-defs.h>
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# define PMD_SIZE (1UL << PMD_SHIFT)
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# define PMD_MASK (~(PMD_SIZE-1))
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# define PMD_MASK (~(PMD_SIZE - 1))
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#else
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# include <asm/pgtable-2level-defs.h>
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#endif
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#define PGDIR_SIZE (1UL << PGDIR_SHIFT)
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#define PGDIR_MASK (~(PGDIR_SIZE-1))
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#define PGDIR_MASK (~(PGDIR_SIZE - 1))
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#define USER_PGD_PTRS (PAGE_OFFSET >> PGDIR_SHIFT)
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#define KERNEL_PGD_PTRS (PTRS_PER_PGD-USER_PGD_PTRS)
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@ -58,21 +58,22 @@ void paging_init(void);
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* The vmalloc() routines leaves a hole of 4kB between each vmalloced
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* area for the same reason. ;)
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*/
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#define VMALLOC_OFFSET (8*1024*1024)
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#define VMALLOC_START (((unsigned long) high_memory + \
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2*VMALLOC_OFFSET-1) & ~(VMALLOC_OFFSET-1))
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#define VMALLOC_OFFSET (8 * 1024 * 1024)
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#define VMALLOC_START (((unsigned long)high_memory + 2 * VMALLOC_OFFSET - 1) \
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& ~(VMALLOC_OFFSET - 1))
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#ifdef CONFIG_X86_PAE
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#define LAST_PKMAP 512
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#else
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#define LAST_PKMAP 1024
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#endif
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#define PKMAP_BASE ((FIXADDR_BOOT_START - PAGE_SIZE*(LAST_PKMAP + 1)) & PMD_MASK)
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#define PKMAP_BASE ((FIXADDR_BOOT_START - PAGE_SIZE * (LAST_PKMAP + 1)) \
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& PMD_MASK)
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#ifdef CONFIG_HIGHMEM
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# define VMALLOC_END (PKMAP_BASE-2*PAGE_SIZE)
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# define VMALLOC_END (PKMAP_BASE - 2 * PAGE_SIZE)
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#else
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# define VMALLOC_END (FIXADDR_START-2*PAGE_SIZE)
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# define VMALLOC_END (FIXADDR_START - 2 * PAGE_SIZE)
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#endif
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/*
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@ -88,16 +89,16 @@ extern unsigned long pg0[];
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#define pte_present(x) ((x).pte_low & (_PAGE_PRESENT | _PAGE_PROTNONE))
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/* To avoid harmful races, pmd_none(x) should check only the lower when PAE */
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#define pmd_none(x) (!(unsigned long)pmd_val(x))
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#define pmd_present(x) (pmd_val(x) & _PAGE_PRESENT)
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#define pmd_none(x) (!(unsigned long)pmd_val((x)))
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#define pmd_present(x) (pmd_val((x)) & _PAGE_PRESENT)
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extern int pmd_bad(pmd_t pmd);
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#define pmd_bad_v1(x) ((pmd_val(x) & (~PAGE_MASK & ~_PAGE_USER)) != _KERNPG_TABLE)
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#define pmd_bad_v2(x) ((pmd_val(x) \
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& ~(PAGE_MASK | _PAGE_USER | _PAGE_PSE | _PAGE_NX)) \
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!= _KERNPG_TABLE)
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#define pmd_bad_v1(x) \
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(_KERNPG_TABLE != (pmd_val((x)) & ~(PAGE_MASK | _PAGE_USER)))
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#define pmd_bad_v2(x) \
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(_KERNPG_TABLE != (pmd_val((x)) & ~(PAGE_MASK | _PAGE_USER | \
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_PAGE_PSE | _PAGE_NX)))
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#define pages_to_mb(x) ((x) >> (20-PAGE_SHIFT))
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@ -123,17 +124,18 @@ static inline void clone_pgd_range(pgd_t *dst, pgd_t *src, int count)
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}
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/*
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* Macro to mark a page protection value as "uncacheable". On processors which do not support
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* it, this is a no-op.
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* Macro to mark a page protection value as "uncacheable".
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* On processors which do not support it, this is a no-op.
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*/
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#define pgprot_noncached(prot) ((boot_cpu_data.x86 > 3) \
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? (__pgprot(pgprot_val(prot) | _PAGE_PCD | _PAGE_PWT)) : (prot))
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#define pgprot_noncached(prot) \
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((boot_cpu_data.x86 > 3) \
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? (__pgprot(pgprot_val(prot) | _PAGE_PCD | _PAGE_PWT)) \
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: (prot))
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/*
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* Conversion functions: convert a page and protection to a page entry,
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* and a page entry and page directory to the page they refer to.
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*/
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#define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot))
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/*
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@ -142,20 +144,20 @@ static inline void clone_pgd_range(pgd_t *dst, pgd_t *src, int count)
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* this macro returns the index of the entry in the pgd page which would
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* control the given virtual address
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*/
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#define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD-1))
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#define pgd_index_k(addr) pgd_index(addr)
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#define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD - 1))
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#define pgd_index_k(addr) pgd_index((addr))
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/*
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* pgd_offset() returns a (pgd_t *)
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* pgd_index() is used get the offset into the pgd page's array of pgd_t's;
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*/
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#define pgd_offset(mm, address) ((mm)->pgd+pgd_index(address))
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#define pgd_offset(mm, address) ((mm)->pgd + pgd_index((address)))
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/*
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* a shortcut which implies the use of the kernel's pgd, instead
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* of a process's
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*/
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#define pgd_offset_k(address) pgd_offset(&init_mm, address)
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#define pgd_offset_k(address) pgd_offset(&init_mm, (address))
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static inline int pud_large(pud_t pud) { return 0; }
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@ -165,8 +167,8 @@ static inline int pud_large(pud_t pud) { return 0; }
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* this macro returns the index of the entry in the pmd page which would
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* control the given virtual address
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*/
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#define pmd_index(address) \
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(((address) >> PMD_SHIFT) & (PTRS_PER_PMD-1))
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#define pmd_index(address) \
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(((address) >> PMD_SHIFT) & (PTRS_PER_PMD - 1))
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/*
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* the pte page can be thought of an array like this: pte_t[PTRS_PER_PTE]
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@ -174,43 +176,45 @@ static inline int pud_large(pud_t pud) { return 0; }
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* this macro returns the index of the entry in the pte page which would
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* control the given virtual address
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*/
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#define pte_index(address) \
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(((address) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
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#define pte_offset_kernel(dir, address) \
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((pte_t *) pmd_page_vaddr(*(dir)) + pte_index(address))
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#define pte_index(address) \
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(((address) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
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#define pte_offset_kernel(dir, address) \
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((pte_t *)pmd_page_vaddr(*(dir)) + pte_index((address)))
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#define pmd_page(pmd) (pfn_to_page(pmd_val(pmd) >> PAGE_SHIFT))
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#define pmd_page(pmd) (pfn_to_page(pmd_val((pmd)) >> PAGE_SHIFT))
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#define pmd_page_vaddr(pmd) \
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((unsigned long) __va(pmd_val(pmd) & PAGE_MASK))
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#define pmd_page_vaddr(pmd) \
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((unsigned long)__va(pmd_val((pmd)) & PAGE_MASK))
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#if defined(CONFIG_HIGHPTE)
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#define pte_offset_map(dir, address) \
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((pte_t *)kmap_atomic_pte(pmd_page(*(dir)),KM_PTE0) + pte_index(address))
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#define pte_offset_map_nested(dir, address) \
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((pte_t *)kmap_atomic_pte(pmd_page(*(dir)),KM_PTE1) + pte_index(address))
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#define pte_unmap(pte) kunmap_atomic(pte, KM_PTE0)
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#define pte_unmap_nested(pte) kunmap_atomic(pte, KM_PTE1)
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#define pte_offset_map(dir, address) \
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((pte_t *)kmap_atomic_pte(pmd_page(*(dir)), KM_PTE0) + \
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pte_index((address)))
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#define pte_offset_map_nested(dir, address) \
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((pte_t *)kmap_atomic_pte(pmd_page(*(dir)), KM_PTE1) + \
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pte_index((address)))
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#define pte_unmap(pte) kunmap_atomic((pte), KM_PTE0)
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#define pte_unmap_nested(pte) kunmap_atomic((pte), KM_PTE1)
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#else
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#define pte_offset_map(dir, address) \
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((pte_t *)page_address(pmd_page(*(dir))) + pte_index(address))
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#define pte_offset_map_nested(dir, address) pte_offset_map(dir, address)
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#define pte_offset_map(dir, address) \
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((pte_t *)page_address(pmd_page(*(dir))) + pte_index((address)))
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#define pte_offset_map_nested(dir, address) pte_offset_map((dir), (address))
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#define pte_unmap(pte) do { } while (0)
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#define pte_unmap_nested(pte) do { } while (0)
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#endif
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/* Clear a kernel PTE and flush it from the TLB */
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#define kpte_clear_flush(ptep, vaddr) \
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do { \
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pte_clear(&init_mm, vaddr, ptep); \
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__flush_tlb_one(vaddr); \
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#define kpte_clear_flush(ptep, vaddr) \
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do { \
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pte_clear(&init_mm, (vaddr), (ptep)); \
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__flush_tlb_one((vaddr)); \
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} while (0)
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/*
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* The i386 doesn't have any external MMU info: the kernel page
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* tables contain all the necessary information.
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*/
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#define update_mmu_cache(vma,address,pte) do { } while (0)
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#define update_mmu_cache(vma, address, pte) do { } while (0)
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void native_pagetable_setup_start(pgd_t *base);
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void native_pagetable_setup_done(pgd_t *base);
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@ -239,7 +243,7 @@ static inline void paravirt_pagetable_setup_done(pgd_t *base)
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#define kern_addr_valid(kaddr) (0)
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#endif
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#define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \
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remap_pfn_range(vma, vaddr, pfn, size, prot)
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#define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \
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remap_pfn_range(vma, vaddr, pfn, size, prot)
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#endif /* _I386_PGTABLE_H */
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