ARM: cns3xxx: Add architecture definition for EHCI/OHCI controller
This patch add plateform_device for EHCI and OHCI controller on CNS3XXX. Power reference count (usb_pwr_ref) is used to control enabling and disabling the single clock control for both EHCI and OHCI controller. It also removes EHCI/OHCI unused virtual address definitions. Signed-off-by: Mac Lin <mkl0301@gmail.com> Signed-off-by: Anton Vorontsov <cbouatmailru@gmail.com>
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4 changed files with 62 additions and 2 deletions
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@ -17,6 +17,7 @@
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#include <linux/kernel.h>
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#include <linux/compiler.h>
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#include <linux/io.h>
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#include <linux/dma-mapping.h>
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#include <linux/serial_core.h>
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#include <linux/serial_8250.h>
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#include <linux/platform_device.h>
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@ -107,11 +108,64 @@ static void __init cns3420_early_serial_setup(void)
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#endif
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}
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/*
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* USB
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*/
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static struct resource cns3xxx_usb_ehci_resources[] = {
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[0] = {
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.start = CNS3XXX_USB_BASE,
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.end = CNS3XXX_USB_BASE + SZ_16M - 1,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = IRQ_CNS3XXX_USB_EHCI,
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.flags = IORESOURCE_IRQ,
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},
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};
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static u64 cns3xxx_usb_ehci_dma_mask = DMA_BIT_MASK(32);
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static struct platform_device cns3xxx_usb_ehci_device = {
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.name = "cns3xxx-ehci",
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.num_resources = ARRAY_SIZE(cns3xxx_usb_ehci_resources),
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.resource = cns3xxx_usb_ehci_resources,
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.dev = {
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.dma_mask = &cns3xxx_usb_ehci_dma_mask,
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.coherent_dma_mask = DMA_BIT_MASK(32),
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},
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};
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static struct resource cns3xxx_usb_ohci_resources[] = {
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[0] = {
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.start = CNS3XXX_USB_OHCI_BASE,
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.end = CNS3XXX_USB_OHCI_BASE + SZ_16M - 1,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = IRQ_CNS3XXX_USB_OHCI,
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.flags = IORESOURCE_IRQ,
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},
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};
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static u64 cns3xxx_usb_ohci_dma_mask = DMA_BIT_MASK(32);
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static struct platform_device cns3xxx_usb_ohci_device = {
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.name = "cns3xxx-ohci",
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.num_resources = ARRAY_SIZE(cns3xxx_usb_ohci_resources),
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.resource = cns3xxx_usb_ohci_resources,
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.dev = {
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.dma_mask = &cns3xxx_usb_ohci_dma_mask,
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.coherent_dma_mask = DMA_BIT_MASK(32),
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},
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};
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/*
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* Initialization
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*/
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static struct platform_device *cns3420_pdevs[] __initdata = {
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&cns3420_nor_pdev,
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&cns3xxx_usb_ehci_device,
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&cns3xxx_usb_ohci_device,
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};
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static void __init cns3420_init(void)
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@ -165,7 +165,6 @@
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#define CNS3XXX_USBOTG_BASE_VIRT 0xFFF15000
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#define CNS3XXX_USB_BASE 0x82000000 /* USB Host Control */
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#define CNS3XXX_USB_BASE_VIRT 0xFFF16000
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#define CNS3XXX_SATA2_BASE 0x83000000 /* SATA */
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#define CNS3XXX_SATA2_SIZE SZ_16M
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@ -184,7 +183,6 @@
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#define CNS3XXX_2DG_BASE_VIRT 0xFFF1B000
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#define CNS3XXX_USB_OHCI_BASE 0x88000000 /* USB OHCI */
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#define CNS3XXX_USB_OHCI_BASE_VIRT 0xFFF1C000
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#define CNS3XXX_L2C_BASE 0x92000000 /* L2 Cache Control */
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#define CNS3XXX_L2C_BASE_VIRT 0xFFF27000
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@ -11,9 +11,13 @@
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#ifndef __CNS3XXX_PM_H
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#define __CNS3XXX_PM_H
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#include <asm/atomic.h>
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void cns3xxx_pwr_clk_en(unsigned int block);
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void cns3xxx_pwr_clk_dis(unsigned int block);
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void cns3xxx_pwr_power_up(unsigned int block);
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void cns3xxx_pwr_power_down(unsigned int block);
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extern atomic_t usb_pwr_ref;
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#endif /* __CNS3XXX_PM_H */
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@ -10,6 +10,7 @@
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#include <linux/module.h>
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#include <linux/io.h>
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#include <linux/delay.h>
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#include <asm/atomic.h>
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#include <mach/system.h>
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#include <mach/cns3xxx.h>
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#include <mach/pm.h>
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@ -118,3 +119,6 @@ int cns3xxx_cpu_clock(void)
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return cpu;
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}
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EXPORT_SYMBOL(cns3xxx_cpu_clock);
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atomic_t usb_pwr_ref = ATOMIC_INIT(0);
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EXPORT_SYMBOL(usb_pwr_ref);
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