From cf1dad9d7f14ddf555baa0fcc82d17d5f29d3ae2 Mon Sep 17 00:00:00 2001 From: Tushar Behera Date: Wed, 31 Aug 2011 16:57:37 +0900 Subject: [PATCH] ARM: EXYNOS4: Add support for secondary MMC port on ORIGEN Secondary MMC port on ORIGEN is connected to sdhci instance 0. Support for secondary MMC port is extended by registering sdhci instance 0. Since sdhci instance 2 can contain a bootable media, sdhci instance 0 is registered after instance 2. Signed-off-by: Tushar Behera [kgene.kim@samsung.com: Added comments in registering sdhci] Signed-off-by: Kukjin Kim --- arch/arm/mach-exynos4/Kconfig | 1 + arch/arm/mach-exynos4/mach-origen.c | 11 +++++++++++ 2 files changed, 12 insertions(+) diff --git a/arch/arm/mach-exynos4/Kconfig b/arch/arm/mach-exynos4/Kconfig index 86cf4fd47b35..00c645426d3f 100644 --- a/arch/arm/mach-exynos4/Kconfig +++ b/arch/arm/mach-exynos4/Kconfig @@ -223,6 +223,7 @@ config MACH_ORIGEN select CPU_EXYNOS4210 select S3C_DEV_RTC select S3C_DEV_WDT + select S3C_DEV_HSMMC select S3C_DEV_HSMMC2 select S5P_DEV_FIMC0 select S5P_DEV_FIMC1 diff --git a/arch/arm/mach-exynos4/mach-origen.c b/arch/arm/mach-exynos4/mach-origen.c index 0e3b81634c24..cd5195f93548 100644 --- a/arch/arm/mach-exynos4/mach-origen.c +++ b/arch/arm/mach-exynos4/mach-origen.c @@ -77,6 +77,11 @@ static struct s3c2410_uartcfg origen_uartcfgs[] __initdata = { }, }; +static struct s3c_sdhci_platdata origen_hsmmc0_pdata __initdata = { + .cd_type = S3C_SDHCI_CD_INTERNAL, + .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL, +}; + static struct s3c_sdhci_platdata origen_hsmmc2_pdata __initdata = { .cd_type = S3C_SDHCI_CD_INTERNAL, .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL, @@ -94,6 +99,7 @@ static void __init origen_ehci_init(void) static struct platform_device *origen_devices[] __initdata = { &s3c_device_hsmmc2, + &s3c_device_hsmmc0, &s3c_device_rtc, &s3c_device_wdt, &s5p_device_ehci, @@ -123,7 +129,12 @@ static void __init origen_map_io(void) static void __init origen_machine_init(void) { + /* + * Since sdhci instance 2 can contain a bootable media, + * sdhci instance 0 is registered after instance 2. + */ s3c_sdhci2_set_platdata(&origen_hsmmc2_pdata); + s3c_sdhci0_set_platdata(&origen_hsmmc0_pdata); origen_ehci_init(); clk_xusbxti.rate = 24000000;