x86: I/O APIC: remove an IRQ2-mask hack
Now that IRQ2 is never made available to the I/O APIC, there is no need to special-case it and mask as a workaround for broken systems. Actually, because of the former, mask_IO_APIC_irq(2) is a no-op already. Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org> Cc: "Rafael J. Wysocki" <rjw@sisk.pl> Cc: Matthew Garrett <mjg59@srcf.ucam.org> Cc: Andreas Herrmann <andreas.herrmann3@amd.com> Cc: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Ingo Molnar <mingo@elte.hu>
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5 changed files with 0 additions and 32 deletions
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@ -1409,7 +1409,6 @@ static int __init dmi_ignore_irq0_timer_override(const struct dmi_system_id *d)
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{
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pr_notice("%s detected: Ignoring BIOS IRQ0 pin2 override\n", d->ident);
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acpi_skip_timer_override = 1;
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force_mask_ioapic_irq_2();
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return 0;
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}
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@ -59,13 +59,6 @@ static struct { int pin, apic; } ioapic_i8259 = { -1, -1 };
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static DEFINE_SPINLOCK(ioapic_lock);
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static DEFINE_SPINLOCK(vector_lock);
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static bool mask_ioapic_irq_2 __initdata;
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void __init force_mask_ioapic_irq_2(void)
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{
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mask_ioapic_irq_2 = true;
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}
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int timer_through_8259 __initdata;
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/*
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@ -2187,9 +2180,6 @@ static inline void __init check_timer(void)
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printk(KERN_INFO "..TIMER: vector=0x%02X apic1=%d pin1=%d apic2=%d pin2=%d\n",
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vector, apic1, pin1, apic2, pin2);
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if (mask_ioapic_irq_2)
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mask_IO_APIC_irq(2);
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/*
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* Some BIOS writers are clueless and report the ExtINTA
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* I/O APIC input from the cascaded 8259A as the timer
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@ -94,13 +94,6 @@ static int no_timer_check;
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static int disable_timer_pin_1 __initdata;
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static bool mask_ioapic_irq_2 __initdata;
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void __init force_mask_ioapic_irq_2(void)
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{
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mask_ioapic_irq_2 = true;
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}
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int timer_through_8259 __initdata;
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/* Where if anywhere is the i8259 connect in external int mode */
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@ -1706,9 +1699,6 @@ static inline void __init check_timer(void)
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apic_printk(APIC_VERBOSE,KERN_INFO "..TIMER: vector=0x%02X apic1=%d pin1=%d apic2=%d pin2=%d\n",
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cfg->vector, apic1, pin1, apic2, pin2);
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if (mask_ioapic_irq_2)
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mask_IO_APIC_irq(2);
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/*
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* Some BIOS writers are clueless and report the ExtINTA
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* I/O APIC input from the cascaded 8259A as the timer
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@ -119,10 +119,5 @@ enum uv_system_type {UV_NONE, UV_LEGACY_APIC, UV_X2APIC, UV_NON_UNIQUE_APIC};
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#define is_uv_system() 0
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#define uv_wakeup_secondary(a, b) 1
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#ifdef CONFIG_X86_IO_APIC
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extern void force_mask_ioapic_irq_2(void);
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#else
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static inline void force_mask_ioapic_irq_2(void) { }
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#endif
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#endif
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@ -46,10 +46,4 @@ extern int uv_wakeup_secondary(int phys_apicid, unsigned int start_rip);
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extern void setup_apic_routing(void);
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#ifdef CONFIG_X86_IO_APIC
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extern void force_mask_ioapic_irq_2(void);
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#else
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static inline void force_mask_ioapic_irq_2(void) { }
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#endif
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#endif
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