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ASoC: Fix offset of freqmode in WM8580 PLL configuration

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Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Cc: stable@kernel.org
This commit is contained in:
Mark Brown 2009-04-21 12:35:15 +01:00
parent 516ef69f16
commit ce88168f5b
1 changed files with 1 additions and 1 deletions
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2
sound/soc/codecs/wm8580.c
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@ -522,7 +522,7 @@ static int wm8580_set_dai_pll(struct snd_soc_dai *codec_dai,
reg = wm8580_read(codec, WM8580_PLLA4 + offset);
reg &= ~0x3f;
reg |= pll_div.prescale | pll_div.postscale << 1 |
pll_div.freqmode << 4;
pll_div.freqmode << 3;
wm8580_write(codec, WM8580_PLLA4 + offset, reg);