pcnet32: Remove pointless memory barriers
These two memory barriers in performance-critical paths are not needed on x86. Even if some other architecture does buffer PCI I/O space writes, the existing memory-mapped I/O barriers are unlikely to be what is needed. Signed-off-by: John Dykstra <john.dykstra1@gmail.com> Acked-by: Don Fry <pcnet32@verizon.net> Signed-off-by: David S. Miller <davem@davemloft.net>
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1 changed files with 2 additions and 2 deletions
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@ -1405,7 +1405,7 @@ static int pcnet32_poll(struct napi_struct *napi, int budget)
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/* Set interrupt enable. */
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lp->a.write_csr(ioaddr, CSR0, CSR0_INTEN);
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mmiowb();
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spin_unlock_irqrestore(&lp->lock, flags);
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}
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return work_done;
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@ -2597,7 +2597,7 @@ pcnet32_interrupt(int irq, void *dev_id)
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val = lp->a.read_csr(ioaddr, CSR3);
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val |= 0x5f00;
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lp->a.write_csr(ioaddr, CSR3, val);
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mmiowb();
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__napi_schedule(&lp->napi);
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break;
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}
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