sh-pfc: r8a7740: Add SCIF pin groups and functions
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This commit is contained in:
Laurent Pinchart
Simon Horman
parent
7cacd75559
commit
cdd2c76935
1 changed files with 346 additions and 0 deletions
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@ -1999,6 +1999,28 @@ static const unsigned int mmc0_ctrl_1_pins[] = {
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static const unsigned int mmc0_ctrl_1_mux[] = {
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MMC1_CMD_PORT104_MARK, MMC1_CLK_PORT103_MARK,
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};
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/* - SCIFA0 ----------------------------------------------------------------- */
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static const unsigned int scifa0_data_pins[] = {
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/* RXD, TXD */
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197, 198,
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};
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static const unsigned int scifa0_data_mux[] = {
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SCIFA0_RXD_MARK, SCIFA0_TXD_MARK,
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};
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static const unsigned int scifa0_clk_pins[] = {
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/* SCK */
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188,
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};
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static const unsigned int scifa0_clk_mux[] = {
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SCIFA0_SCK_MARK,
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};
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static const unsigned int scifa0_ctrl_pins[] = {
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/* RTS, CTS */
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194, 193,
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};
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static const unsigned int scifa0_ctrl_mux[] = {
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SCIFA0_RTS_MARK, SCIFA0_CTS_MARK,
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};
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/* - SCIFA1 ----------------------------------------------------------------- */
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static const unsigned int scifa1_data_pins[] = {
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/* RXD, TXD */
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@ -2007,6 +2029,230 @@ static const unsigned int scifa1_data_pins[] = {
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static const unsigned int scifa1_data_mux[] = {
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SCIFA1_RXD_MARK, SCIFA1_TXD_MARK,
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};
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static const unsigned int scifa1_clk_pins[] = {
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/* SCK */
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185,
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};
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static const unsigned int scifa1_clk_mux[] = {
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SCIFA1_SCK_MARK,
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};
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static const unsigned int scifa1_ctrl_pins[] = {
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/* RTS, CTS */
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23, 21,
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};
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static const unsigned int scifa1_ctrl_mux[] = {
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SCIFA1_RTS_MARK, SCIFA1_CTS_MARK,
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};
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/* - SCIFA2 ----------------------------------------------------------------- */
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static const unsigned int scifa2_data_pins[] = {
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/* RXD, TXD */
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200, 201,
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};
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static const unsigned int scifa2_data_mux[] = {
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SCIFA2_RXD_MARK, SCIFA2_TXD_MARK,
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};
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static const unsigned int scifa2_clk_0_pins[] = {
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/* SCK */
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22,
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};
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static const unsigned int scifa2_clk_0_mux[] = {
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SCIFA2_SCK_PORT22_MARK,
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};
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static const unsigned int scifa2_clk_1_pins[] = {
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/* SCK */
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199,
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};
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static const unsigned int scifa2_clk_1_mux[] = {
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SCIFA2_SCK_PORT199_MARK,
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};
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static const unsigned int scifa2_ctrl_pins[] = {
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/* RTS, CTS */
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96, 95,
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};
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static const unsigned int scifa2_ctrl_mux[] = {
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SCIFA2_RTS_MARK, SCIFA2_CTS_MARK,
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};
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/* - SCIFA3 ----------------------------------------------------------------- */
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static const unsigned int scifa3_data_0_pins[] = {
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/* RXD, TXD */
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174, 175,
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};
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static const unsigned int scifa3_data_0_mux[] = {
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SCIFA3_RXD_PORT174_MARK, SCIFA3_TXD_PORT175_MARK,
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};
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static const unsigned int scifa3_clk_0_pins[] = {
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/* SCK */
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116,
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};
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static const unsigned int scifa3_clk_0_mux[] = {
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SCIFA3_SCK_PORT116_MARK,
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};
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static const unsigned int scifa3_ctrl_0_pins[] = {
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/* RTS, CTS */
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105, 117,
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};
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static const unsigned int scifa3_ctrl_0_mux[] = {
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SCIFA3_RTS_PORT105_MARK, SCIFA3_CTS_PORT117_MARK,
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};
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static const unsigned int scifa3_data_1_pins[] = {
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/* RXD, TXD */
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159, 160,
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};
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static const unsigned int scifa3_data_1_mux[] = {
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SCIFA3_RXD_PORT159_MARK, SCIFA3_TXD_PORT160_MARK,
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};
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static const unsigned int scifa3_clk_1_pins[] = {
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/* SCK */
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158,
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};
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static const unsigned int scifa3_clk_1_mux[] = {
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SCIFA3_SCK_PORT158_MARK,
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};
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static const unsigned int scifa3_ctrl_1_pins[] = {
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/* RTS, CTS */
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161, 162,
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};
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static const unsigned int scifa3_ctrl_1_mux[] = {
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SCIFA3_RTS_PORT161_MARK, SCIFA3_CTS_PORT162_MARK,
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};
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/* - SCIFA4 ----------------------------------------------------------------- */
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static const unsigned int scifa4_data_0_pins[] = {
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/* RXD, TXD */
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12, 13,
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};
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static const unsigned int scifa4_data_0_mux[] = {
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SCIFA4_RXD_PORT12_MARK, SCIFA4_TXD_PORT13_MARK,
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};
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static const unsigned int scifa4_data_1_pins[] = {
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/* RXD, TXD */
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204, 203,
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};
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static const unsigned int scifa4_data_1_mux[] = {
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SCIFA4_RXD_PORT204_MARK, SCIFA4_TXD_PORT203_MARK,
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};
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static const unsigned int scifa4_data_2_pins[] = {
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/* RXD, TXD */
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94, 93,
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};
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static const unsigned int scifa4_data_2_mux[] = {
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SCIFA4_RXD_PORT94_MARK, SCIFA4_TXD_PORT93_MARK,
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};
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static const unsigned int scifa4_clk_0_pins[] = {
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/* SCK */
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21,
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};
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static const unsigned int scifa4_clk_0_mux[] = {
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SCIFA4_SCK_PORT21_MARK,
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};
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static const unsigned int scifa4_clk_1_pins[] = {
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/* SCK */
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205,
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};
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static const unsigned int scifa4_clk_1_mux[] = {
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SCIFA4_SCK_PORT205_MARK,
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};
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/* - SCIFA5 ----------------------------------------------------------------- */
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static const unsigned int scifa5_data_0_pins[] = {
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/* RXD, TXD */
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10, 20,
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};
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static const unsigned int scifa5_data_0_mux[] = {
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SCIFA5_RXD_PORT10_MARK, SCIFA5_TXD_PORT20_MARK,
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};
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static const unsigned int scifa5_data_1_pins[] = {
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/* RXD, TXD */
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207, 208,
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};
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static const unsigned int scifa5_data_1_mux[] = {
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SCIFA5_RXD_PORT207_MARK, SCIFA5_TXD_PORT208_MARK,
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};
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static const unsigned int scifa5_data_2_pins[] = {
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/* RXD, TXD */
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92, 91,
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};
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static const unsigned int scifa5_data_2_mux[] = {
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SCIFA5_RXD_PORT92_MARK, SCIFA5_TXD_PORT91_MARK,
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};
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static const unsigned int scifa5_clk_0_pins[] = {
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/* SCK */
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23,
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};
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static const unsigned int scifa5_clk_0_mux[] = {
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SCIFA5_SCK_PORT23_MARK,
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};
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static const unsigned int scifa5_clk_1_pins[] = {
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/* SCK */
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206,
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};
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static const unsigned int scifa5_clk_1_mux[] = {
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SCIFA5_SCK_PORT206_MARK,
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};
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/* - SCIFA6 ----------------------------------------------------------------- */
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static const unsigned int scifa6_data_pins[] = {
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/* RXD, TXD */
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25, 26,
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};
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static const unsigned int scifa6_data_mux[] = {
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SCIFA6_RXD_MARK, SCIFA6_TXD_MARK,
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};
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static const unsigned int scifa6_clk_pins[] = {
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/* SCK */
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24,
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};
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static const unsigned int scifa6_clk_mux[] = {
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SCIFA6_SCK_MARK,
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};
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/* - SCIFA7 ----------------------------------------------------------------- */
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static const unsigned int scifa7_data_pins[] = {
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/* RXD, TXD */
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0, 1,
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};
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static const unsigned int scifa7_data_mux[] = {
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SCIFA7_RXD_MARK, SCIFA7_TXD_MARK,
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};
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/* - SCIFB ------------------------------------------------------------------ */
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static const unsigned int scifb_data_0_pins[] = {
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/* RXD, TXD */
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191, 192,
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};
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static const unsigned int scifb_data_0_mux[] = {
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SCIFB_RXD_PORT191_MARK, SCIFB_TXD_PORT192_MARK,
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};
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static const unsigned int scifb_clk_0_pins[] = {
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/* SCK */
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190,
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};
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static const unsigned int scifb_clk_0_mux[] = {
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SCIFB_SCK_PORT190_MARK,
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};
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static const unsigned int scifb_ctrl_0_pins[] = {
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/* RTS, CTS */
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186, 187,
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};
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static const unsigned int scifb_ctrl_0_mux[] = {
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SCIFB_RTS_PORT186_MARK, SCIFB_CTS_PORT187_MARK,
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};
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static const unsigned int scifb_data_1_pins[] = {
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/* RXD, TXD */
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3, 4,
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};
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static const unsigned int scifb_data_1_mux[] = {
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SCIFB_RXD_PORT3_MARK, SCIFB_TXD_PORT4_MARK,
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};
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static const unsigned int scifb_clk_1_pins[] = {
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/* SCK */
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2,
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};
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static const unsigned int scifb_clk_1_mux[] = {
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SCIFB_SCK_PORT2_MARK,
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};
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static const unsigned int scifb_ctrl_1_pins[] = {
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/* RTS, CTS */
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172, 173,
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};
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static const unsigned int scifb_ctrl_1_mux[] = {
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SCIFB_RTS_PORT172_MARK, SCIFB_CTS_PORT173_MARK,
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};
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/* - SDHI0 ------------------------------------------------------------------ */
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static const unsigned int sdhi0_data1_pins[] = {
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/* D0 */
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@ -2212,7 +2458,41 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
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SH_PFC_PIN_GROUP(mmc0_data4_1),
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SH_PFC_PIN_GROUP(mmc0_data8_1),
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SH_PFC_PIN_GROUP(mmc0_ctrl_1),
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SH_PFC_PIN_GROUP(scifa0_data),
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SH_PFC_PIN_GROUP(scifa0_clk),
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SH_PFC_PIN_GROUP(scifa0_ctrl),
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SH_PFC_PIN_GROUP(scifa1_data),
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SH_PFC_PIN_GROUP(scifa1_clk),
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SH_PFC_PIN_GROUP(scifa1_ctrl),
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SH_PFC_PIN_GROUP(scifa2_data),
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SH_PFC_PIN_GROUP(scifa2_clk_0),
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SH_PFC_PIN_GROUP(scifa2_clk_1),
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SH_PFC_PIN_GROUP(scifa2_ctrl),
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SH_PFC_PIN_GROUP(scifa3_data_0),
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SH_PFC_PIN_GROUP(scifa3_clk_0),
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SH_PFC_PIN_GROUP(scifa3_ctrl_0),
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SH_PFC_PIN_GROUP(scifa3_data_1),
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SH_PFC_PIN_GROUP(scifa3_clk_1),
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SH_PFC_PIN_GROUP(scifa3_ctrl_1),
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SH_PFC_PIN_GROUP(scifa4_data_0),
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SH_PFC_PIN_GROUP(scifa4_data_1),
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SH_PFC_PIN_GROUP(scifa4_data_2),
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SH_PFC_PIN_GROUP(scifa4_clk_0),
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SH_PFC_PIN_GROUP(scifa4_clk_1),
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SH_PFC_PIN_GROUP(scifa5_data_0),
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SH_PFC_PIN_GROUP(scifa5_data_1),
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SH_PFC_PIN_GROUP(scifa5_data_2),
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SH_PFC_PIN_GROUP(scifa5_clk_0),
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SH_PFC_PIN_GROUP(scifa5_clk_1),
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SH_PFC_PIN_GROUP(scifa6_data),
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SH_PFC_PIN_GROUP(scifa6_clk),
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SH_PFC_PIN_GROUP(scifa7_data),
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SH_PFC_PIN_GROUP(scifb_data_0),
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SH_PFC_PIN_GROUP(scifb_clk_0),
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SH_PFC_PIN_GROUP(scifb_ctrl_0),
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SH_PFC_PIN_GROUP(scifb_data_1),
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SH_PFC_PIN_GROUP(scifb_clk_1),
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SH_PFC_PIN_GROUP(scifb_ctrl_1),
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SH_PFC_PIN_GROUP(sdhi0_data1),
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SH_PFC_PIN_GROUP(sdhi0_data4),
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SH_PFC_PIN_GROUP(sdhi0_ctrl),
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@ -2325,8 +2605,66 @@ static const char * const mmc0_groups[] = {
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"mmc0_ctrl_1",
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};
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static const char * const scifa0_groups[] = {
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"scifa0_data",
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"scifa0_clk",
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"scifa0_ctrl",
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};
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static const char * const scifa1_groups[] = {
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"scifa1_data",
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"scifa1_clk",
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"scifa1_ctrl",
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};
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static const char * const scifa2_groups[] = {
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"scifa2_data",
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"scifa2_clk_0",
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"scifa2_clk_1",
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"scifa2_ctrl",
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};
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static const char * const scifa3_groups[] = {
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"scifa3_data_0",
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"scifa3_clk_0",
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"scifa3_ctrl_0",
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"scifa3_data_1",
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"scifa3_clk_1",
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"scifa3_ctrl_1",
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};
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static const char * const scifa4_groups[] = {
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"scifa4_data_0",
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"scifa4_data_1",
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"scifa4_data_2",
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"scifa4_clk_0",
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"scifa4_clk_1",
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};
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static const char * const scifa5_groups[] = {
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"scifa5_data_0",
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"scifa5_data_1",
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"scifa5_data_2",
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"scifa5_clk_0",
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"scifa5_clk_1",
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};
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static const char * const scifa6_groups[] = {
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"scifa6_data",
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"scifa6_clk",
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};
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static const char * const scifa7_groups[] = {
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"scifa7_data",
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};
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static const char * const scifb_groups[] = {
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"scifb_data_0",
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"scifb_clk_0",
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"scifb_ctrl_0",
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"scifb_data_1",
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"scifb_clk_1",
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"scifb_ctrl_1",
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};
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static const char * const sdhi0_groups[] = {
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@ -2359,7 +2697,15 @@ static const struct sh_pfc_function pinmux_functions[] = {
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SH_PFC_FUNCTION(lcd0),
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SH_PFC_FUNCTION(lcd1),
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SH_PFC_FUNCTION(mmc0),
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SH_PFC_FUNCTION(scifa0),
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SH_PFC_FUNCTION(scifa1),
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SH_PFC_FUNCTION(scifa2),
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SH_PFC_FUNCTION(scifa3),
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SH_PFC_FUNCTION(scifa4),
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SH_PFC_FUNCTION(scifa5),
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SH_PFC_FUNCTION(scifa6),
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SH_PFC_FUNCTION(scifa7),
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SH_PFC_FUNCTION(scifb),
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SH_PFC_FUNCTION(sdhi0),
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SH_PFC_FUNCTION(sdhi1),
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SH_PFC_FUNCTION(sdhi2),
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