cxgb3: Update Rev3 mac workaround
Update the heurstics workaround unlocking a hung mac: - reduce Tx mac toggling by enabling Tx drain before resetting the mac - Take Tx (lack of) activity in account only - Update the monitoring counter range to 64 bits Signed-off-by: Divy Le Ray <divy@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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fc88219601
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cd40658a61
1 changed files with 33 additions and 39 deletions
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@ -150,7 +150,8 @@ int t3_mac_reset(struct cmac *mac)
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static int t3b2_mac_reset(struct cmac *mac)
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{
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struct adapter *adap = mac->adapter;
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unsigned int oft = mac->offset;
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unsigned int oft = mac->offset, store;
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int idx = macidx(mac);
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u32 val;
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if (!macidx(mac))
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@ -158,14 +159,28 @@ static int t3b2_mac_reset(struct cmac *mac)
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else
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t3_set_reg_field(adap, A_MPS_CFG, F_PORT1ACTIVE, 0);
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/* Stop NIC traffic to reduce the number of TXTOGGLES */
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t3_set_reg_field(adap, A_MPS_CFG, F_ENFORCEPKT, 0);
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/* Ensure TX drains */
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t3_set_reg_field(adap, A_XGM_TX_CFG + oft, F_TXPAUSEEN, 0);
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t3_write_reg(adap, A_XGM_RESET_CTRL + oft, F_MAC_RESET_);
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t3_read_reg(adap, A_XGM_RESET_CTRL + oft); /* flush */
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/* Store A_TP_TX_DROP_CFG_CH0 */
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t3_write_reg(adap, A_TP_PIO_ADDR, A_TP_TX_DROP_CFG_CH0 + idx);
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store = t3_read_reg(adap, A_TP_TX_DROP_CFG_CH0 + idx);
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msleep(10);
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/* Change DROP_CFG to 0xc0000011 */
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t3_write_reg(adap, A_TP_PIO_ADDR, A_TP_TX_DROP_CFG_CH0 + idx);
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t3_write_reg(adap, A_TP_PIO_DATA, 0xc0000011);
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/* Check for xgm Rx fifo empty */
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/* Increased loop count to 1000 from 5 cover 1G and 100Mbps case */
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if (t3_wait_op_done(adap, A_XGM_RX_MAX_PKT_SIZE_ERR_CNT + oft,
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0x80000000, 1, 5, 2)) {
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0x80000000, 1, 1000, 2)) {
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CH_ERR(adap, "MAC %d Rx fifo drain failed\n",
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macidx(mac));
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return -1;
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@ -191,11 +206,18 @@ static int t3b2_mac_reset(struct cmac *mac)
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F_DISPAUSEFRAMES | F_EN1536BFRAMES |
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F_RMFCS | F_ENJUMBO | F_ENHASHMCAST);
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if (!macidx(mac))
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/* Restore the DROP_CFG */
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t3_write_reg(adap, A_TP_PIO_ADDR, A_TP_TX_DROP_CFG_CH0 + idx);
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t3_write_reg(adap, A_TP_PIO_DATA, store);
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if (!idx)
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t3_set_reg_field(adap, A_MPS_CFG, 0, F_PORT0ACTIVE);
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else
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t3_set_reg_field(adap, A_MPS_CFG, 0, F_PORT1ACTIVE);
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/* re-enable nic traffic */
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t3_set_reg_field(adap, A_MPS_CFG, F_ENFORCEPKT, 1);
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return 0;
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}
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@ -332,15 +354,6 @@ int t3_mac_set_mtu(struct cmac *mac, unsigned int mtu)
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return -EINVAL;
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t3_write_reg(adap, A_XGM_RX_MAX_PKT_SIZE + mac->offset, mtu);
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/*
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* Adjust the PAUSE frame watermarks. We always set the LWM, and the
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* HWM only if flow-control is enabled.
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*/
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hwm = max_t(unsigned int, MAC_RXFIFO_SIZE - 3 * mtu,
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MAC_RXFIFO_SIZE * 38 / 100);
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hwm = min(hwm, MAC_RXFIFO_SIZE - 8192);
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lwm = min(3 * (int)mtu, MAC_RXFIFO_SIZE / 4);
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if (adap->params.rev >= T3_REV_B2 &&
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(t3_read_reg(adap, A_XGM_RX_CTRL + mac->offset) & F_RXEN)) {
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disable_exact_filters(mac);
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@ -452,9 +465,12 @@ int t3_mac_enable(struct cmac *mac, int which)
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if (which & MAC_DIRECTION_TX) {
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t3_write_reg(adap, A_TP_PIO_ADDR, A_TP_TX_DROP_CFG_CH0 + idx);
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t3_write_reg(adap, A_TP_PIO_DATA, 0xc0ede401);
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t3_write_reg(adap, A_TP_PIO_DATA,
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adap->params.rev == T3_REV_C ?
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0xc4ffff01 : 0xc0ede401);
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t3_write_reg(adap, A_TP_PIO_ADDR, A_TP_TX_DROP_MODE);
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t3_set_reg_field(adap, A_TP_PIO_DATA, 1 << idx, 1 << idx);
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t3_set_reg_field(adap, A_TP_PIO_DATA, 1 << idx,
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adap->params.rev == T3_REV_C ? 0 : 1 << idx);
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t3_write_reg(adap, A_XGM_TX_CTRL + oft, F_TXEN);
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@ -510,15 +526,12 @@ int t3b2_mac_watchdog_task(struct cmac *mac)
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struct adapter *adap = mac->adapter;
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struct mac_stats *s = &mac->stats;
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unsigned int tx_tcnt, tx_xcnt;
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unsigned int tx_mcnt = s->tx_frames;
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unsigned int rx_mcnt = s->rx_frames;
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unsigned int rx_xcnt;
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u64 tx_mcnt = s->tx_frames;
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int status;
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status = 0;
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tx_xcnt = 1; /* By default tx_xcnt is making progress */
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tx_tcnt = mac->tx_tcnt; /* If tx_mcnt is progressing ignore tx_tcnt */
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rx_xcnt = 1; /* By default rx_xcnt is making progress */
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if (tx_mcnt == mac->tx_mcnt && mac->rx_pause == s->rx_pause) {
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tx_xcnt = (G_TXSPI4SOPCNT(t3_read_reg(adap,
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A_XGM_TX_SPI4_SOP_EOP_CNT +
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@ -529,11 +542,11 @@ int t3b2_mac_watchdog_task(struct cmac *mac)
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tx_tcnt = (G_TXDROPCNTCH0RCVD(t3_read_reg(adap,
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A_TP_PIO_DATA)));
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} else {
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goto rxcheck;
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goto out;
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}
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} else {
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mac->toggle_cnt = 0;
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goto rxcheck;
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goto out;
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}
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if ((tx_tcnt != mac->tx_tcnt) && (mac->tx_xcnt == 0)) {
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@ -546,23 +559,6 @@ int t3b2_mac_watchdog_task(struct cmac *mac)
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}
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} else {
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mac->toggle_cnt = 0;
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goto rxcheck;
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}
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rxcheck:
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if (rx_mcnt != mac->rx_mcnt) {
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rx_xcnt = (G_TXSPI4SOPCNT(t3_read_reg(adap,
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A_XGM_RX_SPI4_SOP_EOP_CNT +
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mac->offset))) +
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(s->rx_fifo_ovfl -
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mac->rx_ocnt);
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mac->rx_ocnt = s->rx_fifo_ovfl;
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} else
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goto out;
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if (mac->rx_mcnt != s->rx_frames && rx_xcnt == 0 &&
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mac->rx_xcnt == 0) {
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status = 2;
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goto out;
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}
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@ -570,8 +566,6 @@ int t3b2_mac_watchdog_task(struct cmac *mac)
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mac->tx_tcnt = tx_tcnt;
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mac->tx_xcnt = tx_xcnt;
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mac->tx_mcnt = s->tx_frames;
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mac->rx_xcnt = rx_xcnt;
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mac->rx_mcnt = s->rx_frames;
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mac->rx_pause = s->rx_pause;
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if (status == 1) {
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t3_write_reg(adap, A_XGM_TX_CTRL + mac->offset, 0);
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