gru: bug fixes for GRU exception handling
Bug fixes for GRU exception handling. Additional fields from the CBR must be returned to the user to allow the user to correctly diagnose GRU exceptions. Handle endcase in TFH TLB miss handling. Verify that TFH actually indicates a pending exception. Signed-off-by: Jack Steiner <steiner@sgi.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
This commit is contained in:
Jack Steiner
Linus Torvalds
parent
d6580a9f15
commit
cd1334f03f
6 changed files with 52 additions and 26 deletions
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@ -81,6 +81,8 @@ struct control_block_extended_exc_detail {
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int exopc;
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long exceptdet0;
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int exceptdet1;
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int cbrstate;
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int cbrexecstatus;
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};
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/*
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@ -107,7 +109,8 @@ struct gru_instruction_bits {
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unsigned char reserved2: 2;
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unsigned char istatus: 2;
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unsigned char isubstatus:4;
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unsigned char reserved3: 2;
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unsigned char reserved3: 1;
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unsigned char tlb_fault_color: 1;
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/* DW 1 */
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unsigned long idef4; /* 42 bits: TRi1, BufSize */
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/* DW 2-6 */
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@ -253,6 +256,21 @@ struct gru_instruction {
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#define CBE_CAUSE_RESPONSE_DATA_ERROR (1 << 16)
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#define CBE_CAUSE_PROTOCOL_STATE_DATA_ERROR (1 << 17)
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/* CBE cbrexecstatus bits */
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#define CBR_EXS_ABORT_OCC_BIT 0
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#define CBR_EXS_INT_OCC_BIT 1
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#define CBR_EXS_PENDING_BIT 2
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#define CBR_EXS_QUEUED_BIT 3
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#define CBR_EXS_TLBHW_BIT 4
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#define CBR_EXS_EXCEPTION_BIT 5
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#define CBR_EXS_ABORT_OCC (1 << CBR_EXS_ABORT_OCC_BIT)
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#define CBR_EXS_INT_OCC (1 << CBR_EXS_INT_OCC_BIT)
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#define CBR_EXS_PENDING (1 << CBR_EXS_PENDING_BIT)
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#define CBR_EXS_QUEUED (1 << CBR_EXS_QUEUED_BIT)
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#define CBR_EXS_TLBHW (1 << CBR_EXS_TLBHW_BIT)
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#define CBR_EXS_EXCEPTION (1 << CBR_EXS_EXCEPTION_BIT)
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/*
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* Exceptions are retried for the following cases. If any OTHER bits are set
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* in ecause, the exception is not retryable.
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@ -334,6 +334,8 @@ static int gru_try_dropin(struct gru_thread_state *gts,
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* Might be a hardware race OR a stupid user. Ignore FMM because FMM
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* is a transient state.
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*/
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if (tfh->status != TFHSTATUS_EXCEPTION)
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goto failnoexception;
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if (tfh->state == TFHSTATE_IDLE)
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goto failidle;
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if (tfh->state == TFHSTATE_MISS_FMM && cb)
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@ -401,8 +403,17 @@ static int gru_try_dropin(struct gru_thread_state *gts,
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gru_dbg(grudev, "FAILED fmm tfh: 0x%p, state %d\n", tfh, tfh->state);
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return 0;
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failnoexception:
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/* TFH status did not show exception pending */
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gru_flush_cache(tfh);
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if (cb)
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gru_flush_cache(cb);
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STAT(tlb_dropin_fail_no_exception);
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gru_dbg(grudev, "FAILED non-exception tfh: 0x%p, status %d, state %d\n", tfh, tfh->status, tfh->state);
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return 0;
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failidle:
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/* TFH was idle - no miss pending */
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/* TFH state was idle - no miss pending */
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gru_flush_cache(tfh);
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if (cb)
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gru_flush_cache(cb);
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@ -472,7 +483,8 @@ irqreturn_t gru_intr(int irq, void *dev_id)
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* This is running in interrupt context. Trylock the mmap_sem.
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* If it fails, retry the fault in user context.
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*/
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if (down_read_trylock(>s->ts_mm->mmap_sem)) {
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if (!gts->ts_force_cch_reload &&
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down_read_trylock(>s->ts_mm->mmap_sem)) {
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gru_try_dropin(gts, tfh, NULL);
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up_read(>s->ts_mm->mmap_sem);
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} else {
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@ -595,14 +607,19 @@ int gru_get_exception_detail(unsigned long arg)
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excdet.ecause = cbe->ecause;
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excdet.exceptdet0 = cbe->idef1upd;
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excdet.exceptdet1 = cbe->idef3upd;
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excdet.cbrstate = cbe->cbrstate;
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excdet.cbrexecstatus = cbe->cbrexecstatus;
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ret = 0;
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} else {
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ret = -EAGAIN;
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}
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gru_unlock_gts(gts);
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gru_dbg(grudev, "address 0x%lx, ecause 0x%x\n", excdet.cb,
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excdet.ecause);
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gru_dbg(grudev,
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"cb 0x%lx, op %d, exopc %d, cbrstate %d, cbrexecstatus 0x%x, ecause 0x%x, "
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"exdet0 0x%lx, exdet1 0x%x\n",
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excdet.cb, excdet.opc, excdet.exopc, excdet.cbrstate, excdet.cbrexecstatus,
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excdet.ecause, excdet.exceptdet0, excdet.exceptdet1);
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if (!ret && copy_to_user((void __user *)arg, &excdet, sizeof(excdet)))
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ret = -EFAULT;
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return ret;
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@ -251,15 +251,14 @@ struct gru_tlb_fault_handle {
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unsigned int fill1:9;
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unsigned int status:2;
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unsigned int fill2:1;
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unsigned int color:1;
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unsigned int fill2:2;
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unsigned int state:3;
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unsigned int fill3:1;
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unsigned int cause:7; /* DW 0 - high 32 */
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unsigned int cause:7;
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unsigned int fill4:1;
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unsigned int indexway:12;
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unsigned int indexway:12; /* DW 0 - high 32 */
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unsigned int fill5:4;
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unsigned int ctxnum:4;
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@ -457,21 +456,7 @@ enum gru_cbr_state {
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CBRSTATE_BUSY_INTERRUPT,
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};
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/* CBE cbrexecstatus bits */
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#define CBR_EXS_ABORT_OCC_BIT 0
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#define CBR_EXS_INT_OCC_BIT 1
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#define CBR_EXS_PENDING_BIT 2
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#define CBR_EXS_QUEUED_BIT 3
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#define CBR_EXS_TLBHW_BIT 4
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#define CBR_EXS_EXCEPTION_BIT 5
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#define CBR_EXS_ABORT_OCC (1 << CBR_EXS_ABORT_OCC_BIT)
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#define CBR_EXS_INT_OCC (1 << CBR_EXS_INT_OCC_BIT)
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#define CBR_EXS_PENDING (1 << CBR_EXS_PENDING_BIT)
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#define CBR_EXS_QUEUED (1 << CBR_EXS_QUEUED_BIT)
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#define CBR_EXS_TLBHW (1 << CBR_EXS_TLBHW_BIT)
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#define CBR_EXS_EXCEPTION (1 << CBR_EXS_EXCEPTION_BIT)
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/* CBE cbrexecstatus bits - defined in gru_instructions.h*/
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/* CBE ecause bits - defined in gru_instructions.h */
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/*
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@ -599,6 +599,9 @@ int gru_update_cch(struct gru_thread_state *gts, int force_unload)
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cch->sizeavail[i] = gts->ts_sizeavail;
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gts->ts_tlb_int_select = gru_cpu_fault_map_id();
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cch->tlb_int_select = gru_cpu_fault_map_id();
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cch->tfm_fault_bit_enable =
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(gts->ts_user_options == GRU_OPT_MISS_FMM_POLL
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|| gts->ts_user_options == GRU_OPT_MISS_FMM_INTR);
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} else {
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for (i = 0; i < 8; i++)
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cch->asid[i] = 0;
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@ -84,6 +84,8 @@ static int statistics_show(struct seq_file *s, void *p)
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printstat(s, tlb_dropin_fail_range_active);
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printstat(s, tlb_dropin_fail_idle);
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printstat(s, tlb_dropin_fail_fmm);
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printstat(s, tlb_dropin_fail_no_exception);
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printstat(s, tlb_dropin_fail_no_exception_war);
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printstat(s, mmu_invalidate_range);
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printstat(s, mmu_invalidate_page);
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printstat(s, mmu_clear_flush_young);
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@ -158,8 +160,7 @@ static ssize_t options_write(struct file *file, const char __user *userbuf,
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unsigned long val;
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char buf[80];
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if (copy_from_user
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(buf, userbuf, count < sizeof(buf) ? count : sizeof(buf)))
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if (strncpy_from_user(buf, userbuf, sizeof(buf) - 1) < 0)
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return -EFAULT;
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buf[count - 1] = '\0';
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if (!strict_strtoul(buf, 10, &val))
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@ -207,6 +207,8 @@ struct gru_stats_s {
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atomic_long_t tlb_dropin_fail_range_active;
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atomic_long_t tlb_dropin_fail_idle;
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atomic_long_t tlb_dropin_fail_fmm;
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atomic_long_t tlb_dropin_fail_no_exception;
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atomic_long_t tlb_dropin_fail_no_exception_war;
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atomic_long_t mmu_invalidate_range;
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atomic_long_t mmu_invalidate_page;
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atomic_long_t mmu_clear_flush_young;
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