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[POWERPC] EEH: code comment cleanup

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Clean up subroutine documentation; mostly formatting changes, with
some new content.

Signed-off-by: Linas Vepstas <linas@austin.ibm.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
This commit is contained in:
Linas Vepstas 2006-09-15 18:56:35 -05:00 committed by Paul Mackerras
parent af52559218
commit cb5b562444
2 changed files with 35 additions and 11 deletions
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19
arch/powerpc/platforms/pseries/eeh.c
View file

@ -449,7 +449,11 @@ EXPORT_SYMBOL(eeh_check_failure);
/* ------------------------------------------------------------- */
/* The code below deals with error recovery */
/** Return negative value if a permanent error, else return
/**
* eeh_slot_availability - returns error status of slot
* @pdn pci device node
*
* Return negative value if a permanent error, else return
* a number of milliseconds to wait until the PCI slot is
* ready to be used.
*/
@ -477,8 +481,10 @@ eeh_slot_availability(struct pci_dn *pdn)
return -1;
}
/** rtas_pci_slot_reset raises/lowers the pci #RST line
* state: 1/0 to raise/lower the #RST
/**
* rtas_pci_slot_reset - raises/lowers the pci #RST line
* @pdn pci device node
* @state: 1/0 to raise/lower the #RST
*
* Clear the EEH-frozen condition on a slot. This routine
* asserts the PCI #RST line if the 'state' argument is '1',
@ -518,8 +524,9 @@ rtas_pci_slot_reset(struct pci_dn *pdn, int state)
}
}
/** rtas_set_slot_reset -- assert the pci #RST line for 1/4 second
* dn -- device node to be reset.
/**
* rtas_set_slot_reset -- assert the pci #RST line for 1/4 second
* @pdn: pci device node to be reset.
*
* Return 0 if success, else a non-zero value.
*/
@ -582,6 +589,8 @@ rtas_set_slot_reset(struct pci_dn *pdn)
/**
* __restore_bars - Restore the Base Address Registers
* @pdn: pci device node
*
* Loads the PCI configuration space base address registers,
* the expansion ROM base address, the latency timer, and etc.
* from the saved values in the device node.

27
arch/powerpc/platforms/pseries/eeh_driver.c
View file

@ -77,8 +77,12 @@ static int irq_in_use(unsigned int irq)
}
/* ------------------------------------------------------- */
/** eeh_report_error - report an EEH error to each device,
* collect up and merge the device responses.
/**
* eeh_report_error - report pci error to each device driver
*
* Report an EEH error to each device driver, collect up and
* merge the device driver responses. Cumulative response
* passed back in "userdata".
*/
static void eeh_report_error(struct pci_dev *dev, void *userdata)
@ -108,8 +112,8 @@ static void eeh_report_error(struct pci_dev *dev, void *userdata)
rc == PCI_ERS_RESULT_NEED_RESET) *res = rc;
}
/** eeh_report_reset -- tell this device that the pci slot
* has been reset.
/**
* eeh_report_reset - tell device that slot has been reset
*/
static void eeh_report_reset(struct pci_dev *dev, void *userdata)
@ -132,6 +136,10 @@ static void eeh_report_reset(struct pci_dev *dev, void *userdata)
driver->err_handler->slot_reset(dev);
}
/**
* eeh_report_resume - tell device to resume normal operations
*/
static void eeh_report_resume(struct pci_dev *dev, void *userdata)
{
struct pci_driver *driver = dev->driver;
@ -148,6 +156,13 @@ static void eeh_report_resume(struct pci_dev *dev, void *userdata)
driver->err_handler->resume(dev);
}
/**
* eeh_report_failure - tell device driver that device is dead.
*
* This informs the device driver that the device is permanently
* dead, and that no further recovery attempts will be made on it.
*/
static void eeh_report_failure(struct pci_dev *dev, void *userdata)
{
struct pci_driver *driver = dev->driver;
@ -190,11 +205,11 @@ static void eeh_report_failure(struct pci_dev *dev, void *userdata)
/**
* eeh_reset_device() -- perform actual reset of a pci slot
* Args: bus: pointer to the pci bus structure corresponding
* @bus: pointer to the pci bus structure corresponding
* to the isolated slot. A non-null value will
* cause all devices under the bus to be removed
* and then re-added.
* pe_dn: pointer to a "Partionable Endpoint" device node.
* @pe_dn: pointer to a "Partionable Endpoint" device node.
* This is the top-level structure on which pci
* bus resets can be performed.
*/