drm/i915: fix up ivb plane 3 pageflips
Or at least plug another gapping hole. Apparrently hw desingers only moved the bit field, but did not bother ot re-enumerate the planes when adding support for a 3rd pipe. Discovered by i-g-t/flip_test. This may or may not fix the reference bugzilla, because that one smells like we have still larger fish to fry. v2: Fixup the impossible case to catch programming errors, noticed by Chris Wilson. References: https://bugs.freedesktop.org/show_bug.cgi?id=50069 Acked-by: Chris Wilson <chris@chris-wilson.co.uk> Tested-by: Eugeni Dodonov <eugeni.dodonov@intel.com> Eugeni Dodonov <eugeni.dodonov@intel.com> Cc: stable@vger.kernel.org Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2 changed files with 26 additions and 1 deletions
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@ -210,6 +210,14 @@
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#define MI_DISPLAY_FLIP MI_INSTR(0x14, 2)
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#define MI_DISPLAY_FLIP_I915 MI_INSTR(0x14, 1)
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#define MI_DISPLAY_FLIP_PLANE(n) ((n) << 20)
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/* IVB has funny definitions for which plane to flip. */
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#define MI_DISPLAY_FLIP_IVB_PLANE_A (0 << 19)
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#define MI_DISPLAY_FLIP_IVB_PLANE_B (1 << 19)
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#define MI_DISPLAY_FLIP_IVB_SPRITE_A (2 << 19)
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#define MI_DISPLAY_FLIP_IVB_SPRITE_B (3 << 19)
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#define MI_DISPLAY_FLIP_IVB_PLANE_C (4 << 19)
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#define MI_DISPLAY_FLIP_IVB_SPRITE_C (5 << 19)
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#define MI_SET_CONTEXT MI_INSTR(0x18, 0)
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#define MI_MM_SPACE_GTT (1<<8)
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#define MI_MM_SPACE_PHYSICAL (0<<8)
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@ -6158,17 +6158,34 @@ static int intel_gen7_queue_flip(struct drm_device *dev,
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struct drm_i915_private *dev_priv = dev->dev_private;
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struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
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struct intel_ring_buffer *ring = &dev_priv->ring[BCS];
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uint32_t plane_bit = 0;
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int ret;
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ret = intel_pin_and_fence_fb_obj(dev, obj, ring);
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if (ret)
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goto err;
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switch(intel_crtc->plane) {
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case PLANE_A:
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plane_bit = MI_DISPLAY_FLIP_IVB_PLANE_A;
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break;
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case PLANE_B:
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plane_bit = MI_DISPLAY_FLIP_IVB_PLANE_B;
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break;
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case PLANE_C:
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plane_bit = MI_DISPLAY_FLIP_IVB_PLANE_C;
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break;
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default:
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WARN_ONCE(1, "unknown plane in flip command\n");
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ret = -ENODEV;
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goto err;
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}
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ret = intel_ring_begin(ring, 4);
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if (ret)
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goto err_unpin;
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intel_ring_emit(ring, MI_DISPLAY_FLIP_I915 | (intel_crtc->plane << 19));
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intel_ring_emit(ring, MI_DISPLAY_FLIP_I915 | plane_bit);
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intel_ring_emit(ring, (fb->pitches[0] | obj->tiling_mode));
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intel_ring_emit(ring, (obj->gtt_offset));
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intel_ring_emit(ring, (MI_NOOP));
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