[ALSA] cs4281 - Clean up delay function
Modules: CS4281 driver Remove the own delay function. Call appropriate functions directly. Signed-off-by: Takashi Iwai <tiwai@suse.de>
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bfdcbace6c
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c9a49bb195
1 changed files with 10 additions and 31 deletions
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@ -514,27 +514,6 @@ MODULE_DEVICE_TABLE(pci, snd_cs4281_ids);
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* common I/O routines
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*/
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static void snd_cs4281_delay(unsigned int delay)
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{
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if (delay > 999) {
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unsigned long end_time;
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delay = (delay * HZ) / 1000000;
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if (delay < 1)
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delay = 1;
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end_time = jiffies + delay;
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do {
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schedule_timeout_uninterruptible(1);
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} while (time_after_eq(end_time, jiffies));
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} else {
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udelay(delay);
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}
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}
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static inline void snd_cs4281_delay_long(void)
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{
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schedule_timeout_uninterruptible(1);
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}
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static inline void snd_cs4281_pokeBA0(cs4281_t *chip, unsigned long offset, unsigned int val)
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{
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writel(val, chip->ba0 + offset);
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@ -1493,7 +1472,7 @@ static int snd_cs4281_chip_init(cs4281_t *chip)
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snd_cs4281_pokeBA0(chip, BA0_SPMC, 0);
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udelay(50);
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snd_cs4281_pokeBA0(chip, BA0_SPMC, BA0_SPMC_RSTN);
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snd_cs4281_delay(50000);
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msleep(50);
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if (chip->dual_codec)
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snd_cs4281_pokeBA0(chip, BA0_SPMC, BA0_SPMC_RSTN | BA0_SPMC_ASDI2E);
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@ -1509,13 +1488,13 @@ static int snd_cs4281_chip_init(cs4281_t *chip)
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* Start the DLL Clock logic.
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*/
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snd_cs4281_pokeBA0(chip, BA0_CLKCR1, BA0_CLKCR1_DLLP);
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snd_cs4281_delay(50000);
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msleep(50);
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snd_cs4281_pokeBA0(chip, BA0_CLKCR1, BA0_CLKCR1_SWCE | BA0_CLKCR1_DLLP);
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/*
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* Wait for the DLL ready signal from the clock logic.
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*/
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timeout = HZ;
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timeout = 100;
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do {
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/*
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* Read the AC97 status register to see if we've seen a CODEC
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@ -1523,7 +1502,7 @@ static int snd_cs4281_chip_init(cs4281_t *chip)
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*/
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if (snd_cs4281_peekBA0(chip, BA0_CLKCR1) & BA0_CLKCR1_DLLRDY)
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goto __ok0;
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snd_cs4281_delay_long();
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msleep(1);
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} while (timeout-- > 0);
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snd_printk(KERN_ERR "DLLRDY not seen\n");
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@ -1541,7 +1520,7 @@ static int snd_cs4281_chip_init(cs4281_t *chip)
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/*
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* Wait for the codec ready signal from the AC97 codec.
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*/
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timeout = HZ;
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timeout = 100;
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do {
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/*
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* Read the AC97 status register to see if we've seen a CODEC
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@ -1549,7 +1528,7 @@ static int snd_cs4281_chip_init(cs4281_t *chip)
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*/
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if (snd_cs4281_peekBA0(chip, BA0_ACSTS) & BA0_ACSTS_CRDY)
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goto __ok1;
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snd_cs4281_delay_long();
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msleep(1);
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} while (timeout-- > 0);
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snd_printk(KERN_ERR "never read codec ready from AC'97 (0x%x)\n", snd_cs4281_peekBA0(chip, BA0_ACSTS));
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@ -1557,11 +1536,11 @@ static int snd_cs4281_chip_init(cs4281_t *chip)
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__ok1:
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if (chip->dual_codec) {
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timeout = HZ;
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timeout = 100;
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do {
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if (snd_cs4281_peekBA0(chip, BA0_ACSTS2) & BA0_ACSTS_CRDY)
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goto __codec2_ok;
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snd_cs4281_delay_long();
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msleep(1);
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} while (timeout-- > 0);
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snd_printk(KERN_INFO "secondary codec doesn't respond. disable it...\n");
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chip->dual_codec = 0;
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@ -1580,7 +1559,7 @@ static int snd_cs4281_chip_init(cs4281_t *chip)
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* the codec is pumping ADC data across the AC-link.
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*/
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timeout = HZ;
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timeout = 100;
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do {
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/*
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* Read the input slot valid register and see if input slots 3
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@ -1588,7 +1567,7 @@ static int snd_cs4281_chip_init(cs4281_t *chip)
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*/
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if ((snd_cs4281_peekBA0(chip, BA0_ACISV) & (BA0_ACISV_SLV(3) | BA0_ACISV_SLV(4))) == (BA0_ACISV_SLV(3) | BA0_ACISV_SLV(4)))
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goto __ok2;
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snd_cs4281_delay_long();
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msleep(1);
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} while (timeout-- > 0);
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if (--retry_count > 0)
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