[ARM] 3405/1: lpd7a40x: CPLD ssp driver
Patch from Marc Singer Driver for operating SSP devices through LPD7A40X CPLD chip. This driver is used by the audio codecs. Signed-off-by: Marc Singer <elf@buici.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This commit is contained in:
Marc Singer
Russell King
parent
903e2bbda9
commit
c97898614b
2 changed files with 348 additions and 0 deletions
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@ -14,6 +14,7 @@ config MACH_LPD7A400
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bool "LPD7A400 Card Engine"
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select ARCH_LH7A400
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# select IDE_POLL
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select HAS_TOUCHSCREEN_ADS7843_LH7
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help
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Say Y here if you are using Logic Product Development's
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LPD7A400 CardEngine. For the time being, the LPD7A400 and
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@ -23,6 +24,7 @@ config MACH_LPD7A404
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bool "LPD7A404 Card Engine"
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select ARCH_LH7A404
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# select IDE_POLL
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select HAS_TOUCHSCREEN_ADC_LH7
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help
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Say Y here if you are using Logic Product Development's
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LPD7A404 CardEngine. For the time being, the LPD7A400 and
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@ -34,6 +36,9 @@ config ARCH_LH7A400
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config ARCH_LH7A404
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bool
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config LPD7A40X_CPLD_SSP
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bool
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config LH7A40X_CONTIGMEM
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bool "Disable NUMA Support"
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depends on ARCH_LH7A40X
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343
arch/arm/mach-lh7a40x/ssp-cpld.c
Normal file
343
arch/arm/mach-lh7a40x/ssp-cpld.c
Normal file
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@ -0,0 +1,343 @@
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/* arch/arm/mach-lh7a40x/ssp-cpld.c
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*
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* Copyright (C) 2004,2005 Marc Singer
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* version 2 as published by the Free Software Foundation.
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*
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* SSP/SPI driver for the CardEngine CPLD.
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*
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*/
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/* NOTES
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-----
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o *** This driver is cribbed from the 7952x implementation.
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Some comments may not apply.
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o This driver contains sufficient logic to control either the
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serial EEPROMs or the audio codec. It is included in the kernel
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to support the codec. The EEPROMs are really the responsibility
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of the boot loader and should probably be left alone.
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o The code must be augmented to cope with multiple, simultaneous
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clients.
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o The audio codec writes to the codec chip whenever playback
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starts.
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o The touchscreen driver writes to the ads chip every time it
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samples.
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o The audio codec must write 16 bits, but the touch chip writes
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are 8 bits long.
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o We need to be able to keep these configurations separate while
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simultaneously active.
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*/
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#include <linux/module.h>
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#include <linux/kernel.h>
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//#include <linux/sched.h>
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#include <linux/errno.h>
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#include <linux/interrupt.h>
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//#include <linux/ioport.h>
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#include <linux/init.h>
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#include <linux/delay.h>
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#include <linux/spinlock.h>
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#include <asm/io.h>
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#include <asm/irq.h>
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#include <asm/hardware.h>
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#include <asm/arch/ssp.h>
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//#define TALK
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#if defined (TALK)
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#define PRINTK(f...) printk (f)
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#else
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#define PRINTK(f...) do {} while (0)
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#endif
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#if defined (CONFIG_ARCH_LH7A400)
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# define CPLD_SPID __REGP16(CPLD06_VIRT) /* SPI data */
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# define CPLD_SPIC __REGP16(CPLD08_VIRT) /* SPI control */
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# define CPLD_SPIC_CS_CODEC (1<<0)
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# define CPLD_SPIC_CS_TOUCH (1<<1)
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# define CPLD_SPIC_WRITE (0<<2)
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# define CPLD_SPIC_READ (1<<2)
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# define CPLD_SPIC_DONE (1<<3) /* r/o */
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# define CPLD_SPIC_LOAD (1<<4)
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# define CPLD_SPIC_START (1<<4)
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# define CPLD_SPIC_LOADED (1<<5) /* r/o */
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#endif
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#define CPLD_SPI __REGP16(CPLD0A_VIRT) /* SPI operation */
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#define CPLD_SPI_CS_EEPROM (1<<3)
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#define CPLD_SPI_SCLK (1<<2)
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#define CPLD_SPI_TX_SHIFT (1)
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#define CPLD_SPI_TX (1<<CPLD_SPI_TX_SHIFT)
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#define CPLD_SPI_RX_SHIFT (0)
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#define CPLD_SPI_RX (1<<CPLD_SPI_RX_SHIFT)
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/* *** FIXME: these timing values are substantially larger than the
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*** chip requires. We may implement an nsleep () function. */
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#define T_SKH 1 /* Clock time high (us) */
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#define T_SKL 1 /* Clock time low (us) */
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#define T_CS 1 /* Minimum chip select low time (us) */
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#define T_CSS 1 /* Minimum chip select setup time (us) */
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#define T_DIS 1 /* Data setup time (us) */
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/* EEPROM SPI bits */
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#define P_START (1<<9)
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#define P_WRITE (1<<7)
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#define P_READ (2<<7)
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#define P_ERASE (3<<7)
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#define P_EWDS (0<<7)
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#define P_WRAL (0<<7)
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#define P_ERAL (0<<7)
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#define P_EWEN (0<<7)
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#define P_A_EWDS (0<<5)
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#define P_A_WRAL (1<<5)
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#define P_A_ERAL (2<<5)
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#define P_A_EWEN (3<<5)
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struct ssp_configuration {
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int device;
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int mode;
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int speed;
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int frame_size_write;
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int frame_size_read;
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};
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static struct ssp_configuration ssp_configuration;
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static spinlock_t ssp_lock;
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static void enable_cs (void)
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{
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switch (ssp_configuration.device) {
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case DEVICE_EEPROM:
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CPLD_SPI |= CPLD_SPI_CS_EEPROM;
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break;
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}
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udelay (T_CSS);
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}
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static void disable_cs (void)
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{
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switch (ssp_configuration.device) {
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case DEVICE_EEPROM:
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CPLD_SPI &= ~CPLD_SPI_CS_EEPROM;
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break;
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}
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udelay (T_CS);
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}
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static void pulse_clock (void)
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{
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CPLD_SPI |= CPLD_SPI_SCLK;
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udelay (T_SKH);
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CPLD_SPI &= ~CPLD_SPI_SCLK;
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udelay (T_SKL);
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}
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/* execute_spi_command
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sends an spi command to a device. It first sends cwrite bits from
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v. If cread is greater than zero it will read cread bits
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(discarding the leading 0 bit) and return them. If cread is less
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than zero it will check for completetion status and return 0 on
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success or -1 on timeout. If cread is zero it does nothing other
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than sending the command.
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On the LPD7A400, we can only read or write multiples of 8 bits on
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the codec and the touch screen device. Here, we round up.
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*/
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static int execute_spi_command (int v, int cwrite, int cread)
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{
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unsigned long l = 0;
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#if defined (CONFIG_MACH_LPD7A400)
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/* The codec and touch devices cannot be bit-banged. Instead,
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* the CPLD provides an eight-bit shift register and a crude
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* interface. */
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if ( ssp_configuration.device == DEVICE_CODEC
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|| ssp_configuration.device == DEVICE_TOUCH) {
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int select = 0;
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PRINTK ("spi(%d %d.%d) 0x%04x",
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ssp_configuration.device, cwrite, cread,
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v);
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#if defined (TALK)
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if (ssp_configuration.device == DEVICE_CODEC)
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PRINTK (" 0x%03x -> %2d", v & 0x1ff, (v >> 9) & 0x7f);
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#endif
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PRINTK ("\n");
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if (ssp_configuration.device == DEVICE_CODEC)
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select = CPLD_SPIC_CS_CODEC;
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if (ssp_configuration.device == DEVICE_TOUCH)
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select = CPLD_SPIC_CS_TOUCH;
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if (cwrite) {
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for (cwrite = (cwrite + 7)/8; cwrite-- > 0; ) {
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CPLD_SPID = (v >> (8*cwrite)) & 0xff;
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CPLD_SPIC = select | CPLD_SPIC_LOAD;
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while (!(CPLD_SPIC & CPLD_SPIC_LOADED))
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;
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CPLD_SPIC = select;
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while (!(CPLD_SPIC & CPLD_SPIC_DONE))
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;
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}
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v = 0;
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}
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if (cread) {
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mdelay (2); /* *** FIXME: required by ads7843? */
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v = 0;
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for (cread = (cread + 7)/8; cread-- > 0;) {
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CPLD_SPID = 0;
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CPLD_SPIC = select | CPLD_SPIC_READ
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| CPLD_SPIC_START;
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while (!(CPLD_SPIC & CPLD_SPIC_LOADED))
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;
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CPLD_SPIC = select | CPLD_SPIC_READ;
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while (!(CPLD_SPIC & CPLD_SPIC_DONE))
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;
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v = (v << 8) | CPLD_SPID;
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}
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}
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return v;
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}
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#endif
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PRINTK ("spi(%d) 0x%04x -> 0x%x\r\n", ssp_configuration.device,
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v & 0x1ff, (v >> 9) & 0x7f);
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enable_cs ();
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v <<= CPLD_SPI_TX_SHIFT; /* Correction for position of SPI_TX bit */
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while (cwrite--) {
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CPLD_SPI
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= (CPLD_SPI & ~CPLD_SPI_TX)
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| ((v >> cwrite) & CPLD_SPI_TX);
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udelay (T_DIS);
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pulse_clock ();
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}
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if (cread < 0) {
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int delay = 10;
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disable_cs ();
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udelay (1);
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enable_cs ();
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l = -1;
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do {
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if (CPLD_SPI & CPLD_SPI_RX) {
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l = 0;
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break;
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}
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} while (udelay (1), --delay);
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}
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else
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/* We pulse the clock before the data to skip the leading zero. */
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while (cread-- > 0) {
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pulse_clock ();
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l = (l<<1)
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| (((CPLD_SPI & CPLD_SPI_RX)
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>> CPLD_SPI_RX_SHIFT) & 0x1);
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}
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disable_cs ();
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return l;
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}
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static int ssp_init (void)
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{
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spin_lock_init (&ssp_lock);
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memset (&ssp_configuration, 0, sizeof (ssp_configuration));
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return 0;
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}
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/* ssp_chip_select
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drops the chip select line for the CPLD shift-register controlled
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devices. It doesn't enable chip
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*/
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static void ssp_chip_select (int enable)
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{
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#if defined (CONFIG_MACH_LPD7A400)
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int select;
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if (ssp_configuration.device == DEVICE_CODEC)
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select = CPLD_SPIC_CS_CODEC;
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else if (ssp_configuration.device == DEVICE_TOUCH)
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select = CPLD_SPIC_CS_TOUCH;
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else
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return;
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if (enable)
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CPLD_SPIC = select;
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else
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CPLD_SPIC = 0;
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#endif
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}
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static void ssp_acquire (void)
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{
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spin_lock (&ssp_lock);
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}
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static void ssp_release (void)
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{
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ssp_chip_select (0); /* just in case */
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spin_unlock (&ssp_lock);
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}
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static int ssp_configure (int device, int mode, int speed,
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int frame_size_write, int frame_size_read)
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{
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ssp_configuration.device = device;
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ssp_configuration.mode = mode;
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ssp_configuration.speed = speed;
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ssp_configuration.frame_size_write = frame_size_write;
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ssp_configuration.frame_size_read = frame_size_read;
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return 0;
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}
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static int ssp_read (void)
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{
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return execute_spi_command (0, 0, ssp_configuration.frame_size_read);
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}
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static int ssp_write (u16 data)
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{
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execute_spi_command (data, ssp_configuration.frame_size_write, 0);
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return 0;
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}
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static int ssp_write_read (u16 data)
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{
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return execute_spi_command (data, ssp_configuration.frame_size_write,
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ssp_configuration.frame_size_read);
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}
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struct ssp_driver lh7a40x_cpld_ssp_driver = {
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.init = ssp_init,
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.acquire = ssp_acquire,
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.release = ssp_release,
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.configure = ssp_configure,
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.chip_select = ssp_chip_select,
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.read = ssp_read,
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.write = ssp_write,
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.write_read = ssp_write_read,
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};
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MODULE_AUTHOR("Marc Singer");
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MODULE_DESCRIPTION("LPD7A40X CPLD SPI driver");
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MODULE_LICENSE("GPL");
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