goldfish: add QEMU pipe driver
A QEMU pipe is a very fast communication channel between the
guest system and the emulator. Usage from the guest is simply
something like;
// connect to special device
fd = open("/dev/qemu_pipe", O_RDWR);
// tell which service we want to talk to (must be zero-terminated)
write(fd, "pipeName", strlen("pipeName")+1);
// do read()/write() through fd now
...
// close channel
close(fd);
Signed-off-by: David 'Digit' Turner <digit@android.com>
[Added support for parameter buffers for speed]
igned-off-by: Xin, Xiaohui <xiaohui.xin@intel.com>
Signed-off-by: Jiang, Yunhong <yunhong.jiang@intel.com>
Signed-off-by: Nakajima, Jun <jun.nakajima@intel.com>
[Ported to 3.6]
Signed-off-by: Tom Keel <thomas.keel@intel.com>
[Ported to 3.7, moved to platform/goldfish]
Signed-off-by: Alan Cox <alan@linux.intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
David 'Digit' Turner
Greg Kroah-Hartman
parent
e809c22b8f
commit
c89f2750e9
4 changed files with 621 additions and 0 deletions
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@ -1,3 +1,7 @@
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if X86
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source "drivers/platform/x86/Kconfig"
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endif
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if GOLDFISH
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source "drivers/platform/goldfish/Kconfig"
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endif
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5
drivers/platform/goldfish/Kconfig
Normal file
5
drivers/platform/goldfish/Kconfig
Normal file
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@ -0,0 +1,5 @@
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config GOLDFISH_PIPE
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tristate "Goldfish virtual device for QEMU pipes"
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---help---
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This is a virtual device to drive the QEMU pipe interface used by
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the Goldfish Android Virtual Device.
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@ -2,3 +2,4 @@
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# Makefile for Goldfish platform specific drivers
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#
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obj-$(CONFIG_GOLDFISH) += pdev_bus.o
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obj-$(CONFIG_GOLDFISH_PIPE) += goldfish_pipe.o
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611
drivers/platform/goldfish/goldfish_pipe.c
Normal file
611
drivers/platform/goldfish/goldfish_pipe.c
Normal file
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@ -0,0 +1,611 @@
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/*
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* Copyright (C) 2011 Google, Inc.
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* Copyright (C) 2012 Intel, Inc.
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* Copyright (C) 2013 Intel, Inc.
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*
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* This software is licensed under the terms of the GNU General Public
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* License version 2, as published by the Free Software Foundation, and
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* may be copied, distributed, and modified under those terms.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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/* This source file contains the implementation of a special device driver
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* that intends to provide a *very* fast communication channel between the
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* guest system and the QEMU emulator.
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*
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* Usage from the guest is simply the following (error handling simplified):
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*
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* int fd = open("/dev/qemu_pipe",O_RDWR);
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* .... write() or read() through the pipe.
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*
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* This driver doesn't deal with the exact protocol used during the session.
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* It is intended to be as simple as something like:
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*
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* // do this _just_ after opening the fd to connect to a specific
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* // emulator service.
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* const char* msg = "<pipename>";
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* if (write(fd, msg, strlen(msg)+1) < 0) {
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* ... could not connect to <pipename> service
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* close(fd);
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* }
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*
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* // after this, simply read() and write() to communicate with the
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* // service. Exact protocol details left as an exercise to the reader.
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*
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* This driver is very fast because it doesn't copy any data through
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* intermediate buffers, since the emulator is capable of translating
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* guest user addresses into host ones.
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*
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* Note that we must however ensure that each user page involved in the
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* exchange is properly mapped during a transfer.
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*/
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#include <linux/module.h>
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#include <linux/interrupt.h>
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#include <linux/kernel.h>
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#include <linux/spinlock.h>
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#include <linux/miscdevice.h>
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#include <linux/platform_device.h>
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#include <linux/poll.h>
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#include <linux/sched.h>
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#include <linux/bitops.h>
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#include <linux/slab.h>
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#include <linux/io.h>
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/*
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* IMPORTANT: The following constants must match the ones used and defined
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* in external/qemu/hw/goldfish_pipe.c in the Android source tree.
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*/
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/* pipe device registers */
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#define PIPE_REG_COMMAND 0x00 /* write: value = command */
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#define PIPE_REG_STATUS 0x04 /* read */
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#define PIPE_REG_CHANNEL 0x08 /* read/write: channel id */
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#define PIPE_REG_SIZE 0x0c /* read/write: buffer size */
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#define PIPE_REG_ADDRESS 0x10 /* write: physical address */
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#define PIPE_REG_WAKES 0x14 /* read: wake flags */
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#define PIPE_REG_PARAMS_ADDR_LOW 0x18 /* read/write: batch data address */
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#define PIPE_REG_PARAMS_ADDR_HIGH 0x1c /* read/write: batch data address */
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#define PIPE_REG_ACCESS_PARAMS 0x20 /* write: batch access */
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/* list of commands for PIPE_REG_COMMAND */
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#define CMD_OPEN 1 /* open new channel */
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#define CMD_CLOSE 2 /* close channel (from guest) */
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#define CMD_POLL 3 /* poll read/write status */
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/* List of bitflags returned in status of CMD_POLL command */
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#define PIPE_POLL_IN (1 << 0)
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#define PIPE_POLL_OUT (1 << 1)
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#define PIPE_POLL_HUP (1 << 2)
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/* The following commands are related to write operations */
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#define CMD_WRITE_BUFFER 4 /* send a user buffer to the emulator */
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#define CMD_WAKE_ON_WRITE 5 /* tell the emulator to wake us when writing
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is possible */
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/* The following commands are related to read operations, they must be
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* listed in the same order than the corresponding write ones, since we
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* will use (CMD_READ_BUFFER - CMD_WRITE_BUFFER) as a special offset
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* in goldfish_pipe_read_write() below.
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*/
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#define CMD_READ_BUFFER 6 /* receive a user buffer from the emulator */
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#define CMD_WAKE_ON_READ 7 /* tell the emulator to wake us when reading
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* is possible */
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/* Possible status values used to signal errors - see goldfish_pipe_error_convert */
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#define PIPE_ERROR_INVAL -1
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#define PIPE_ERROR_AGAIN -2
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#define PIPE_ERROR_NOMEM -3
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#define PIPE_ERROR_IO -4
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/* Bit-flags used to signal events from the emulator */
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#define PIPE_WAKE_CLOSED (1 << 0) /* emulator closed pipe */
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#define PIPE_WAKE_READ (1 << 1) /* pipe can now be read from */
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#define PIPE_WAKE_WRITE (1 << 2) /* pipe can now be written to */
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struct access_params {
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u32 channel;
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u32 size;
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u32 address;
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u32 cmd;
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u32 result;
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/* reserved for future extension */
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u32 flags;
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};
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/* The global driver data. Holds a reference to the i/o page used to
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* communicate with the emulator, and a wake queue for blocked tasks
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* waiting to be awoken.
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*/
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struct goldfish_pipe_dev {
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spinlock_t lock;
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unsigned char __iomem *base;
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struct access_params *aps;
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int irq;
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};
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static struct goldfish_pipe_dev pipe_dev[1];
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/* This data type models a given pipe instance */
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struct goldfish_pipe {
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struct goldfish_pipe_dev *dev;
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struct mutex lock;
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unsigned long flags;
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wait_queue_head_t wake_queue;
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};
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/* Bit flags for the 'flags' field */
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enum {
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BIT_CLOSED_ON_HOST = 0, /* pipe closed by host */
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BIT_WAKE_ON_WRITE = 1, /* want to be woken on writes */
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BIT_WAKE_ON_READ = 2, /* want to be woken on reads */
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};
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static u32 goldfish_cmd_status(struct goldfish_pipe *pipe, u32 cmd)
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{
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unsigned long flags;
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u32 status;
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struct goldfish_pipe_dev *dev = pipe->dev;
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spin_lock_irqsave(&dev->lock, flags);
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writel((u32)pipe, dev->base + PIPE_REG_CHANNEL);
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writel(cmd, dev->base + PIPE_REG_COMMAND);
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status = readl(dev->base + PIPE_REG_STATUS);
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spin_unlock_irqrestore(&dev->lock, flags);
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return status;
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}
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static void goldfish_cmd(struct goldfish_pipe *pipe, u32 cmd)
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{
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unsigned long flags;
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struct goldfish_pipe_dev *dev = pipe->dev;
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spin_lock_irqsave(&dev->lock, flags);
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writel((u32)pipe, dev->base + PIPE_REG_CHANNEL);
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writel(cmd, dev->base + PIPE_REG_COMMAND);
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spin_unlock_irqrestore(&dev->lock, flags);
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}
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/* This function converts an error code returned by the emulator through
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* the PIPE_REG_STATUS i/o register into a valid negative errno value.
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*/
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static int goldfish_pipe_error_convert(int status)
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{
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switch (status) {
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case PIPE_ERROR_AGAIN:
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return -EAGAIN;
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case PIPE_ERROR_NOMEM:
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return -ENOMEM;
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case PIPE_ERROR_IO:
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return -EIO;
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default:
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return -EINVAL;
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}
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}
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/*
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* Notice: QEMU will return 0 for un-known register access, indicating
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* param_acess is supported or not
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*/
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static int valid_batchbuffer_addr(struct goldfish_pipe_dev *dev,
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struct access_params *aps)
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{
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u32 aph, apl;
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u64 paddr;
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aph = readl(dev->base + PIPE_REG_PARAMS_ADDR_HIGH);
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apl = readl(dev->base + PIPE_REG_PARAMS_ADDR_LOW);
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paddr = ((u64)aph << 32) | apl;
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if (paddr != (__pa(aps)))
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return 0;
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return 1;
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}
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/* 0 on success */
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static int setup_access_params_addr(struct platform_device *pdev,
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struct goldfish_pipe_dev *dev)
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{
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u64 paddr;
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struct access_params *aps;
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aps = devm_kzalloc(&pdev->dev, sizeof(struct access_params), GFP_KERNEL);
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if (!aps)
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return -1;
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/* FIXME */
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paddr = __pa(aps);
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writel((u32)(paddr >> 32), dev->base + PIPE_REG_PARAMS_ADDR_HIGH);
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writel((u32)paddr, dev->base + PIPE_REG_PARAMS_ADDR_LOW);
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if (valid_batchbuffer_addr(dev, aps)) {
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dev->aps = aps;
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return 0;
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} else
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return -1;
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}
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/* A value that will not be set by qemu emulator */
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#define INITIAL_BATCH_RESULT (0xdeadbeaf)
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static int access_with_param(struct goldfish_pipe_dev *dev, const int cmd,
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unsigned long address, unsigned long avail,
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struct goldfish_pipe *pipe, int *status)
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{
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struct access_params *aps = dev->aps;
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if (aps == NULL)
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return -1;
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aps->result = INITIAL_BATCH_RESULT;
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aps->channel = (unsigned long)pipe;
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aps->size = avail;
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aps->address = address;
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aps->cmd = cmd;
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writel(cmd, dev->base + PIPE_REG_ACCESS_PARAMS);
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/*
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* If the aps->result has not changed, that means
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* that the batch command failed
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*/
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if (aps->result == INITIAL_BATCH_RESULT)
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return -1;
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*status = aps->result;
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return 0;
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}
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/* This function is used for both reading from and writing to a given
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* pipe.
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*/
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static ssize_t goldfish_pipe_read_write(struct file *filp, char __user *buffer,
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size_t bufflen, int is_write)
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{
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unsigned long irq_flags;
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struct goldfish_pipe *pipe = filp->private_data;
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struct goldfish_pipe_dev *dev = pipe->dev;
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const int cmd_offset = is_write ? 0
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: (CMD_READ_BUFFER - CMD_WRITE_BUFFER);
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unsigned long address, address_end;
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int ret = 0;
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/* If the emulator already closed the pipe, no need to go further */
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if (test_bit(BIT_CLOSED_ON_HOST, &pipe->flags))
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return -EIO;
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/* Null reads or writes succeeds */
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if (unlikely(bufflen) == 0)
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return 0;
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/* Check the buffer range for access */
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if (!access_ok(is_write ? VERIFY_WRITE : VERIFY_READ,
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buffer, bufflen))
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return -EFAULT;
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/* Serialize access to the pipe */
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if (mutex_lock_interruptible(&pipe->lock))
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return -ERESTARTSYS;
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address = (unsigned long)(void *)buffer;
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address_end = address + bufflen;
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while (address < address_end) {
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unsigned long page_end = (address & PAGE_MASK) + PAGE_SIZE;
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unsigned long next = page_end < address_end ? page_end
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: address_end;
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unsigned long avail = next - address;
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int status, wakeBit;
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/* Ensure that the corresponding page is properly mapped */
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if (is_write) {
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char c;
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/* Ensure that the page is mapped and readable */
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if (__get_user(c, (char __user *)address)) {
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if (!ret)
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ret = -EFAULT;
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break;
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}
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} else {
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/* Ensure that the page is mapped and writable */
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if (__put_user(0, (char __user *)address)) {
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if (!ret)
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ret = -EFAULT;
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break;
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}
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}
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/* Now, try to transfer the bytes in the current page */
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spin_lock_irqsave(&dev->lock, irq_flags);
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if (access_with_param(dev, CMD_WRITE_BUFFER + cmd_offset,
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address, avail, pipe, &status)) {
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writel((u32)pipe, dev->base + PIPE_REG_CHANNEL);
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writel(avail, dev->base + PIPE_REG_SIZE);
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writel(address, dev->base + PIPE_REG_ADDRESS);
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writel(CMD_WRITE_BUFFER + cmd_offset,
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dev->base + PIPE_REG_COMMAND);
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status = readl(dev->base + PIPE_REG_STATUS);
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}
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spin_unlock_irqrestore(&dev->lock, irq_flags);
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if (status > 0) { /* Correct transfer */
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ret += status;
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address += status;
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continue;
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}
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if (status == 0) /* EOF */
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break;
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/* An error occured. If we already transfered stuff, just
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* return with its count. We expect the next call to return
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* an error code */
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if (ret > 0)
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break;
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/* If the error is not PIPE_ERROR_AGAIN, or if we are not in
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* non-blocking mode, just return the error code.
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*/
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if (status != PIPE_ERROR_AGAIN ||
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(filp->f_flags & O_NONBLOCK) != 0) {
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ret = goldfish_pipe_error_convert(status);
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break;
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}
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/* We will have to wait until more data/space is available.
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* First, mark the pipe as waiting for a specific wake signal.
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*/
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wakeBit = is_write ? BIT_WAKE_ON_WRITE : BIT_WAKE_ON_READ;
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set_bit(wakeBit, &pipe->flags);
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/* Tell the emulator we're going to wait for a wake event */
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goldfish_cmd(pipe, CMD_WAKE_ON_WRITE + cmd_offset);
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/* Unlock the pipe, then wait for the wake signal */
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mutex_unlock(&pipe->lock);
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while (test_bit(wakeBit, &pipe->flags)) {
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if (wait_event_interruptible(
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pipe->wake_queue,
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!test_bit(wakeBit, &pipe->flags)))
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return -ERESTARTSYS;
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if (test_bit(BIT_CLOSED_ON_HOST, &pipe->flags))
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return -EIO;
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}
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/* Try to re-acquire the lock */
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if (mutex_lock_interruptible(&pipe->lock))
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return -ERESTARTSYS;
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/* Try the transfer again */
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continue;
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}
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mutex_unlock(&pipe->lock);
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return ret;
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}
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static ssize_t goldfish_pipe_read(struct file *filp, char __user *buffer,
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size_t bufflen, loff_t *ppos)
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{
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return goldfish_pipe_read_write(filp, buffer, bufflen, 0);
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}
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static ssize_t goldfish_pipe_write(struct file *filp,
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const char __user *buffer, size_t bufflen,
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loff_t *ppos)
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{
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return goldfish_pipe_read_write(filp, (char __user *)buffer,
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bufflen, 1);
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}
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static unsigned int goldfish_pipe_poll(struct file *filp, poll_table *wait)
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{
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struct goldfish_pipe *pipe = filp->private_data;
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unsigned int mask = 0;
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int status;
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mutex_lock(&pipe->lock);
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poll_wait(filp, &pipe->wake_queue, wait);
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status = goldfish_cmd_status(pipe, CMD_POLL);
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mutex_unlock(&pipe->lock);
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if (status & PIPE_POLL_IN)
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mask |= POLLIN | POLLRDNORM;
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if (status & PIPE_POLL_OUT)
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mask |= POLLOUT | POLLWRNORM;
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if (status & PIPE_POLL_HUP)
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mask |= POLLHUP;
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if (test_bit(BIT_CLOSED_ON_HOST, &pipe->flags))
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mask |= POLLERR;
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return mask;
|
||||
}
|
||||
|
||||
static irqreturn_t goldfish_pipe_interrupt(int irq, void *dev_id)
|
||||
{
|
||||
struct goldfish_pipe_dev *dev = dev_id;
|
||||
unsigned long irq_flags;
|
||||
int count = 0;
|
||||
|
||||
/* We're going to read from the emulator a list of (channel,flags)
|
||||
* pairs corresponding to the wake events that occured on each
|
||||
* blocked pipe (i.e. channel).
|
||||
*/
|
||||
spin_lock_irqsave(&dev->lock, irq_flags);
|
||||
for (;;) {
|
||||
/* First read the channel, 0 means the end of the list */
|
||||
struct goldfish_pipe *pipe;
|
||||
unsigned long wakes;
|
||||
unsigned long channel = readl(dev->base + PIPE_REG_CHANNEL);
|
||||
|
||||
if (channel == 0)
|
||||
break;
|
||||
|
||||
/* Convert channel to struct pipe pointer + read wake flags */
|
||||
wakes = readl(dev->base + PIPE_REG_WAKES);
|
||||
pipe = (struct goldfish_pipe *)(ptrdiff_t)channel;
|
||||
|
||||
/* Did the emulator just closed a pipe? */
|
||||
if (wakes & PIPE_WAKE_CLOSED) {
|
||||
set_bit(BIT_CLOSED_ON_HOST, &pipe->flags);
|
||||
wakes |= PIPE_WAKE_READ | PIPE_WAKE_WRITE;
|
||||
}
|
||||
if (wakes & PIPE_WAKE_READ)
|
||||
clear_bit(BIT_WAKE_ON_READ, &pipe->flags);
|
||||
if (wakes & PIPE_WAKE_WRITE)
|
||||
clear_bit(BIT_WAKE_ON_WRITE, &pipe->flags);
|
||||
|
||||
wake_up_interruptible(&pipe->wake_queue);
|
||||
count++;
|
||||
}
|
||||
spin_unlock_irqrestore(&dev->lock, irq_flags);
|
||||
|
||||
return (count == 0) ? IRQ_NONE : IRQ_HANDLED;
|
||||
}
|
||||
|
||||
/**
|
||||
* goldfish_pipe_open - open a channel to the AVD
|
||||
* @inode: inode of device
|
||||
* @file: file struct of opener
|
||||
*
|
||||
* Create a new pipe link between the emulator and the use application.
|
||||
* Each new request produces a new pipe.
|
||||
*
|
||||
* Note: we use the pipe ID as a mux. All goldfish emulations are 32bit
|
||||
* right now so this is fine. A move to 64bit will need this addressing
|
||||
*/
|
||||
static int goldfish_pipe_open(struct inode *inode, struct file *file)
|
||||
{
|
||||
struct goldfish_pipe *pipe;
|
||||
struct goldfish_pipe_dev *dev = pipe_dev;
|
||||
int32_t status;
|
||||
|
||||
/* Allocate new pipe kernel object */
|
||||
pipe = kzalloc(sizeof(*pipe), GFP_KERNEL);
|
||||
if (pipe == NULL)
|
||||
return -ENOMEM;
|
||||
|
||||
pipe->dev = dev;
|
||||
mutex_init(&pipe->lock);
|
||||
init_waitqueue_head(&pipe->wake_queue);
|
||||
|
||||
/*
|
||||
* Now, tell the emulator we're opening a new pipe. We use the
|
||||
* pipe object's address as the channel identifier for simplicity.
|
||||
*/
|
||||
|
||||
status = goldfish_cmd_status(pipe, CMD_OPEN);
|
||||
if (status < 0) {
|
||||
kfree(pipe);
|
||||
return status;
|
||||
}
|
||||
|
||||
/* All is done, save the pipe into the file's private data field */
|
||||
file->private_data = pipe;
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int goldfish_pipe_release(struct inode *inode, struct file *filp)
|
||||
{
|
||||
struct goldfish_pipe *pipe = filp->private_data;
|
||||
|
||||
/* The guest is closing the channel, so tell the emulator right now */
|
||||
goldfish_cmd(pipe, CMD_CLOSE);
|
||||
kfree(pipe);
|
||||
filp->private_data = NULL;
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct file_operations goldfish_pipe_fops = {
|
||||
.owner = THIS_MODULE,
|
||||
.read = goldfish_pipe_read,
|
||||
.write = goldfish_pipe_write,
|
||||
.poll = goldfish_pipe_poll,
|
||||
.open = goldfish_pipe_open,
|
||||
.release = goldfish_pipe_release,
|
||||
};
|
||||
|
||||
static struct miscdevice goldfish_pipe_device = {
|
||||
.minor = MISC_DYNAMIC_MINOR,
|
||||
.name = "goldfish_pipe",
|
||||
.fops = &goldfish_pipe_fops,
|
||||
};
|
||||
|
||||
static int goldfish_pipe_probe(struct platform_device *pdev)
|
||||
{
|
||||
int err;
|
||||
struct resource *r;
|
||||
struct goldfish_pipe_dev *dev = pipe_dev;
|
||||
|
||||
/* not thread safe, but this should not happen */
|
||||
WARN_ON(dev->base != NULL);
|
||||
|
||||
spin_lock_init(&dev->lock);
|
||||
|
||||
r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
||||
if (r == NULL || resource_size(r) < PAGE_SIZE) {
|
||||
dev_err(&pdev->dev, "can't allocate i/o page\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
dev->base = devm_ioremap(&pdev->dev, r->start, PAGE_SIZE);
|
||||
if (dev->base == NULL) {
|
||||
dev_err(&pdev->dev, "ioremap failed\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
r = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
|
||||
if (r == NULL) {
|
||||
err = -EINVAL;
|
||||
goto error;
|
||||
}
|
||||
dev->irq = r->start;
|
||||
|
||||
err = devm_request_irq(&pdev->dev, dev->irq, goldfish_pipe_interrupt,
|
||||
IRQF_SHARED, "goldfish_pipe", dev);
|
||||
if (err) {
|
||||
dev_err(&pdev->dev, "unable to allocate IRQ\n");
|
||||
goto error;
|
||||
}
|
||||
|
||||
err = misc_register(&goldfish_pipe_device);
|
||||
if (err) {
|
||||
dev_err(&pdev->dev, "unable to register device\n");
|
||||
goto error;
|
||||
}
|
||||
setup_access_params_addr(pdev, dev);
|
||||
return 0;
|
||||
|
||||
error:
|
||||
dev->base = NULL;
|
||||
return err;
|
||||
}
|
||||
|
||||
static int goldfish_pipe_remove(struct platform_device *pdev)
|
||||
{
|
||||
struct goldfish_pipe_dev *dev = pipe_dev;
|
||||
misc_deregister(&goldfish_pipe_device);
|
||||
dev->base = NULL;
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct platform_driver goldfish_pipe = {
|
||||
.probe = goldfish_pipe_probe,
|
||||
.remove = goldfish_pipe_remove,
|
||||
.driver = {
|
||||
.name = "goldfish_pipe"
|
||||
}
|
||||
};
|
||||
|
||||
module_platform_driver(goldfish_pipe);
|
||||
MODULE_AUTHOR("David Turner <digit@google.com>");
|
||||
MODULE_LICENSE("GPL");
|
||||
Loading…
Reference in a new issue