[SPARC64]: Fix futex_atomic_cmpxchg_inatomic implementation.
I copied the logic from ll/sc arch implementations, but that was wrong and makes no sense at all. Just do a straight compare-exchange instruction, just like x86. Based upon bug reports from Dennis Gilmore and Fabio Massimo. Signed-off-by: David S. Miller <davem@davemloft.net>
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1 changed files with 8 additions and 10 deletions
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@ -87,24 +87,22 @@ static inline int
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futex_atomic_cmpxchg_inatomic(int __user *uaddr, int oldval, int newval)
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{
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__asm__ __volatile__(
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"\n1: lduwa [%2] %%asi, %0\n"
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"2: casa [%2] %%asi, %0, %1\n"
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"3:\n"
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"\n1: casa [%3] %%asi, %2, %0\n"
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"2:\n"
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" .section .fixup,#alloc,#execinstr\n"
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" .align 4\n"
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"4: ba 3b\n"
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" mov %3, %0\n"
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"3: ba 2b\n"
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" mov %4, %0\n"
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" .previous\n"
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" .section __ex_table,\"a\"\n"
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" .align 4\n"
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" .word 1b, 4b\n"
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" .word 2b, 4b\n"
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" .word 1b, 3b\n"
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" .previous\n"
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: "=&r" (oldval)
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: "r" (newval), "r" (uaddr), "i" (-EFAULT)
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: "=r" (newval)
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: "0" (newval), "r" (oldval), "r" (uaddr), "i" (-EFAULT)
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: "memory");
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return oldval;
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return newval;
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}
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#endif /* !(_SPARC64_FUTEX_H) */
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