Merge branch 'for-linus' of master.kernel.org:/pub/scm/linux/kernel/git/roland/infiniband
* 'for-linus' of master.kernel.org:/pub/scm/linux/kernel/git/roland/infiniband: IB/mthca: Use DEFINE_MUTEX() instead of mutex_init() IB/mthca: Add HCA profile module parameters IB/srp: Fix FMR mapping for 32-bit kernels and addresses above 4G IB: Fix ib_dma_alloc_coherent() wrapper
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commit
c7ef259bfb
4 changed files with 107 additions and 19 deletions
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@ -80,24 +80,61 @@ static int tune_pci = 0;
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module_param(tune_pci, int, 0444);
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MODULE_PARM_DESC(tune_pci, "increase PCI burst from the default set by BIOS if nonzero");
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struct mutex mthca_device_mutex;
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DEFINE_MUTEX(mthca_device_mutex);
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#define MTHCA_DEFAULT_NUM_QP (1 << 16)
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#define MTHCA_DEFAULT_RDB_PER_QP (1 << 2)
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#define MTHCA_DEFAULT_NUM_CQ (1 << 16)
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#define MTHCA_DEFAULT_NUM_MCG (1 << 13)
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#define MTHCA_DEFAULT_NUM_MPT (1 << 17)
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#define MTHCA_DEFAULT_NUM_MTT (1 << 20)
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#define MTHCA_DEFAULT_NUM_UDAV (1 << 15)
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#define MTHCA_DEFAULT_NUM_RESERVED_MTTS (1 << 18)
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#define MTHCA_DEFAULT_NUM_UARC_SIZE (1 << 18)
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static struct mthca_profile hca_profile = {
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.num_qp = MTHCA_DEFAULT_NUM_QP,
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.rdb_per_qp = MTHCA_DEFAULT_RDB_PER_QP,
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.num_cq = MTHCA_DEFAULT_NUM_CQ,
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.num_mcg = MTHCA_DEFAULT_NUM_MCG,
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.num_mpt = MTHCA_DEFAULT_NUM_MPT,
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.num_mtt = MTHCA_DEFAULT_NUM_MTT,
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.num_udav = MTHCA_DEFAULT_NUM_UDAV, /* Tavor only */
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.fmr_reserved_mtts = MTHCA_DEFAULT_NUM_RESERVED_MTTS, /* Tavor only */
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.uarc_size = MTHCA_DEFAULT_NUM_UARC_SIZE, /* Arbel only */
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};
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module_param_named(num_qp, hca_profile.num_qp, int, 0444);
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MODULE_PARM_DESC(num_qp, "maximum number of QPs per HCA");
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module_param_named(rdb_per_qp, hca_profile.rdb_per_qp, int, 0444);
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MODULE_PARM_DESC(rdb_per_qp, "number of RDB buffers per QP");
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module_param_named(num_cq, hca_profile.num_cq, int, 0444);
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MODULE_PARM_DESC(num_cq, "maximum number of CQs per HCA");
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module_param_named(num_mcg, hca_profile.num_mcg, int, 0444);
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MODULE_PARM_DESC(num_mcg, "maximum number of multicast groups per HCA");
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module_param_named(num_mpt, hca_profile.num_mpt, int, 0444);
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MODULE_PARM_DESC(num_mpt,
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"maximum number of memory protection table entries per HCA");
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module_param_named(num_mtt, hca_profile.num_mtt, int, 0444);
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MODULE_PARM_DESC(num_mtt,
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"maximum number of memory translation table segments per HCA");
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module_param_named(num_udav, hca_profile.num_udav, int, 0444);
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MODULE_PARM_DESC(num_udav, "maximum number of UD address vectors per HCA");
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module_param_named(fmr_reserved_mtts, hca_profile.fmr_reserved_mtts, int, 0444);
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MODULE_PARM_DESC(fmr_reserved_mtts,
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"number of memory translation table segments reserved for FMR");
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static const char mthca_version[] __devinitdata =
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DRV_NAME ": Mellanox InfiniBand HCA driver v"
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DRV_VERSION " (" DRV_RELDATE ")\n";
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static struct mthca_profile default_profile = {
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.num_qp = 1 << 16,
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.rdb_per_qp = 4,
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.num_cq = 1 << 16,
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.num_mcg = 1 << 13,
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.num_mpt = 1 << 17,
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.num_mtt = 1 << 20,
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.num_udav = 1 << 15, /* Tavor only */
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.fmr_reserved_mtts = 1 << 18, /* Tavor only */
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.uarc_size = 1 << 18, /* Arbel only */
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};
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static int mthca_tune_pci(struct mthca_dev *mdev)
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{
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int cap;
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@ -303,7 +340,7 @@ static int mthca_init_tavor(struct mthca_dev *mdev)
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goto err_disable;
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}
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profile = default_profile;
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profile = hca_profile;
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profile.num_uar = dev_lim.uar_size / PAGE_SIZE;
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profile.uarc_size = 0;
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if (mdev->mthca_flags & MTHCA_FLAG_SRQ)
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@ -621,7 +658,7 @@ static int mthca_init_arbel(struct mthca_dev *mdev)
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goto err_stop_fw;
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}
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profile = default_profile;
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profile = hca_profile;
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profile.num_uar = dev_lim.uar_size / PAGE_SIZE;
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profile.num_udav = 0;
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if (mdev->mthca_flags & MTHCA_FLAG_SRQ)
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@ -1278,11 +1315,55 @@ static struct pci_driver mthca_driver = {
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.remove = __devexit_p(mthca_remove_one)
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};
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static void __init __mthca_check_profile_val(const char *name, int *pval,
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int pval_default)
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{
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/* value must be positive and power of 2 */
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int old_pval = *pval;
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if (old_pval <= 0)
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*pval = pval_default;
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else
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*pval = roundup_pow_of_two(old_pval);
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if (old_pval != *pval) {
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printk(KERN_WARNING PFX "Invalid value %d for %s in module parameter.\n",
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old_pval, name);
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printk(KERN_WARNING PFX "Corrected %s to %d.\n", name, *pval);
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}
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}
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#define mthca_check_profile_val(name, default) \
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__mthca_check_profile_val(#name, &hca_profile.name, default)
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static void __init mthca_validate_profile(void)
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{
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mthca_check_profile_val(num_qp, MTHCA_DEFAULT_NUM_QP);
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mthca_check_profile_val(rdb_per_qp, MTHCA_DEFAULT_RDB_PER_QP);
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mthca_check_profile_val(num_cq, MTHCA_DEFAULT_NUM_CQ);
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mthca_check_profile_val(num_mcg, MTHCA_DEFAULT_NUM_MCG);
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mthca_check_profile_val(num_mpt, MTHCA_DEFAULT_NUM_MPT);
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mthca_check_profile_val(num_mtt, MTHCA_DEFAULT_NUM_MTT);
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mthca_check_profile_val(num_udav, MTHCA_DEFAULT_NUM_UDAV);
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mthca_check_profile_val(fmr_reserved_mtts, MTHCA_DEFAULT_NUM_RESERVED_MTTS);
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if (hca_profile.fmr_reserved_mtts >= hca_profile.num_mtt) {
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printk(KERN_WARNING PFX "Invalid fmr_reserved_mtts module parameter %d.\n",
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hca_profile.fmr_reserved_mtts);
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printk(KERN_WARNING PFX "(Must be smaller than num_mtt %d)\n",
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hca_profile.num_mtt);
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hca_profile.fmr_reserved_mtts = hca_profile.num_mtt / 2;
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printk(KERN_WARNING PFX "Corrected fmr_reserved_mtts to %d.\n",
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hca_profile.fmr_reserved_mtts);
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}
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}
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static int __init mthca_init(void)
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{
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int ret;
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mutex_init(&mthca_device_mutex);
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mthca_validate_profile();
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ret = mthca_catas_init();
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if (ret)
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return ret;
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@ -1898,7 +1898,7 @@ static void srp_add_one(struct ib_device *device)
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*/
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srp_dev->fmr_page_shift = max(9, ffs(dev_attr->page_size_cap) - 1);
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srp_dev->fmr_page_size = 1 << srp_dev->fmr_page_shift;
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srp_dev->fmr_page_mask = ~((unsigned long) srp_dev->fmr_page_size - 1);
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srp_dev->fmr_page_mask = ~((u64) srp_dev->fmr_page_size - 1);
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INIT_LIST_HEAD(&srp_dev->dev_list);
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@ -87,7 +87,7 @@ struct srp_device {
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struct ib_fmr_pool *fmr_pool;
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int fmr_page_shift;
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int fmr_page_size;
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unsigned long fmr_page_mask;
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u64 fmr_page_mask;
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};
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struct srp_host {
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@ -1639,7 +1639,14 @@ static inline void *ib_dma_alloc_coherent(struct ib_device *dev,
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{
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if (dev->dma_ops)
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return dev->dma_ops->alloc_coherent(dev, size, dma_handle, flag);
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return dma_alloc_coherent(dev->dma_device, size, dma_handle, flag);
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else {
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dma_addr_t handle;
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void *ret;
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ret = dma_alloc_coherent(dev->dma_device, size, &handle, flag);
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*dma_handle = handle;
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return ret;
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}
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}
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/**
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