This is the 4.19.89 stable release
-----BEGIN PGP SIGNATURE-----
iQIzBAABCAAdFiEEZH8oZUiU471FcZm+ONu9yGCSaT4FAl3zQ1wACgkQONu9yGCS
aT6ZDA/+JQyM+mgrU2t5mkq9lXCwL87Jiooy0kKT9b/2EWmW5Gdxp/On9PXfqtfs
uZ+v0A1g1H+582uwuqG1wB2jr3I2AhNnRNbvSypGtk1Kitx9HqVJD/wWRRVCULww
cr3uA/ZOX+deRjOVYP3dhFp7ycn6u5+GxgmFQTLmKAYN8uUqq4/dpWy01iB0nr2A
GcoLm9P96o8P/wIWaykqOvshDrocbFcBL4VuxLeZCbFsAMTiX+jJnyIL8W7gfBJl
M2626S/hESk5DvGcMN3zwOw/nTJlvySUtfqXSvPk0sT90UMx/YZ9QdpS9GkvRb9t
OA1G+iHguEU+Fq/DawUyxwk/kt3nA6cg0q7RSxHo7QP6SGo7OaHHS1myzGDhL8oc
LDKXO2iSSzvXJDlqrU45N+1YhpeiIHCxmDctbUIM9dP4u6wWmQIyYXLrcpupTsm9
StiDBguXFHWSBFhG0+MlTUU5cypVNoN+56wBAUTR6+qoDASTzGvjNbrBsQihODV0
RMFJF17Zvn+UoEohe860EMswUBsJ+F+VSZO5yGuZgsaC/2Ih6M1dxsiNU7RF02gX
fRis6huj1+642ZsEbd2tueYGUaDN1HpMsVkN3AAkD3pJF5lX7AJRwhvRyC8N1jhc
G90KMSk2pR/ItjmUpkKaAhAKhN+oKSzuCPpHj2iGotfWdd4slXQ=
=Ekyt
-----END PGP SIGNATURE-----
Merge 4.19.89 into android-4.19-q
Changes in 4.19.89
rsi: release skb if rsi_prepare_beacon fails
arm64: tegra: Fix 'active-low' warning for Jetson TX1 regulator
sparc64: implement ioremap_uc
lp: fix sparc64 LPSETTIMEOUT ioctl
usb: gadget: u_serial: add missing port entry locking
tty: serial: fsl_lpuart: use the sg count from dma_map_sg
tty: serial: msm_serial: Fix flow control
serial: pl011: Fix DMA ->flush_buffer()
serial: serial_core: Perform NULL checks for break_ctl ops
serial: ifx6x60: add missed pm_runtime_disable
autofs: fix a leak in autofs_expire_indirect()
RDMA/hns: Correct the value of HNS_ROCE_HEM_CHUNK_LEN
iwlwifi: pcie: don't consider IV len in A-MSDU
exportfs_decode_fh(): negative pinned may become positive without the parent locked
audit_get_nd(): don't unlock parent too early
NFC: nxp-nci: Fix NULL pointer dereference after I2C communication error
xfrm: release device reference for invalid state
Input: cyttsp4_core - fix use after free bug
sched/core: Avoid spurious lock dependencies
perf/core: Consistently fail fork on allocation failures
ALSA: pcm: Fix stream lock usage in snd_pcm_period_elapsed()
drm/sun4i: tcon: Set min division of TCON0_DCLK to 1.
selftests: kvm: fix build with glibc >= 2.30
rsxx: add missed destroy_workqueue calls in remove
net: ep93xx_eth: fix mismatch of request_mem_region in remove
i2c: core: fix use after free in of_i2c_notify
serial: core: Allow processing sysrq at port unlock time
cxgb4vf: fix memleak in mac_hlist initialization
iwlwifi: mvm: synchronize TID queue removal
iwlwifi: trans: Clear persistence bit when starting the FW
iwlwifi: mvm: Send non offchannel traffic via AP sta
ARM: 8813/1: Make aligned 2-byte getuser()/putuser() atomic on ARMv6+
audit: Embed key into chunk
netfilter: nf_tables: don't use position attribute on rule replacement
ARC: IOC: panic if kernel was started with previously enabled IOC
net/mlx5: Release resource on error flow
clk: sunxi-ng: a64: Fix gate bit of DSI DPHY
ice: Fix NVM mask defines
dlm: fix possible call to kfree() for non-initialized pointer
ARM: dts: exynos: Fix LDO13 min values on Odroid XU3/XU4/HC1
extcon: max8997: Fix lack of path setting in USB device mode
net: ethernet: ti: cpts: correct debug for expired txq skb
rtc: s3c-rtc: Avoid using broken ALMYEAR register
rtc: max77686: Fix the returned value in case of error in 'max77686_rtc_read_time()'
i40e: don't restart nway if autoneg not supported
virtchnl: Fix off by one error
clk: rockchip: fix rk3188 sclk_smc gate data
clk: rockchip: fix rk3188 sclk_mac_lbtest parameter ordering
ARM: dts: rockchip: Fix rk3288-rock2 vcc_flash name
dlm: fix missing idr_destroy for recover_idr
MIPS: SiByte: Enable ZONE_DMA32 for LittleSur
net: dsa: mv88e6xxx: Work around mv886e6161 SERDES missing MII_PHYSID2
scsi: zfcp: update kernel message for invalid FCP_CMND length, it's not the CDB
scsi: zfcp: drop default switch case which might paper over missing case
drivers: soc: Allow building the amlogic drivers without ARCH_MESON
bus: ti-sysc: Fix getting optional clocks in clock_roles
ARM: dts: imx6: RDU2: fix eGalax touchscreen node
crypto: ecc - check for invalid values in the key verification test
crypto: bcm - fix normal/non key hash algorithm failure
arm64: dts: zynqmp: Fix node names which contain "_"
pinctrl: qcom: ssbi-gpio: fix gpio-hog related boot issues
Staging: iio: adt7316: Fix i2c data reading, set the data field
firmware: raspberrypi: Fix firmware calls with large buffers
mm/vmstat.c: fix NUMA statistics updates
clk: rockchip: fix I2S1 clock gate register for rk3328
clk: rockchip: fix ID of 8ch clock of I2S1 for rk3328
sctp: count sk_wmem_alloc by skb truesize in sctp_packet_transmit
regulator: Fix return value of _set_load() stub
USB: serial: f81534: fix reading old/new IC config
xfs: extent shifting doesn't fully invalidate page cache
net-next/hinic:fix a bug in set mac address
net-next/hinic: fix a bug in rx data flow
ice: Fix return value from NAPI poll
ice: Fix possible NULL pointer de-reference
iomap: FUA is wrong for DIO O_DSYNC writes into unwritten extents
iomap: sub-block dio needs to zeroout beyond EOF
iomap: dio data corruption and spurious errors when pipes fill
iomap: readpages doesn't zero page tail beyond EOF
iw_cxgb4: only reconnect with MPAv1 if the peer aborts
MIPS: OCTEON: octeon-platform: fix typing
net/smc: use after free fix in smc_wr_tx_put_slot()
math-emu/soft-fp.h: (_FP_ROUND_ZERO) cast 0 to void to fix warning
nds32: Fix the items of hwcap_str ordering issue.
rtc: max8997: Fix the returned value in case of error in 'max8997_rtc_read_alarm()'
rtc: dt-binding: abx80x: fix resistance scale
ARM: dts: exynos: Use Samsung SoC specific compatible for DWC2 module
media: coda: fix memory corruption in case more than 32 instances are opened
media: pulse8-cec: return 0 when invalidating the logical address
media: cec: report Vendor ID after initialization
iwlwifi: fix cfg structs for 22000 with different RF modules
ravb: Clean up duplex handling
net/ipv6: re-do dad when interface has IFF_NOARP flag change
dmaengine: coh901318: Fix a double-lock bug
dmaengine: coh901318: Remove unused variable
dmaengine: dw-dmac: implement dma protection control setting
net: qualcomm: rmnet: move null check on dev before dereferecing it
selftests/powerpc: Allocate base registers
selftests/powerpc: Skip test instead of failing
usb: dwc3: debugfs: Properly print/set link state for HS
usb: dwc3: don't log probe deferrals; but do log other error codes
ACPI: fix acpi_find_child_device() invocation in acpi_preset_companion()
f2fs: fix to account preflush command for noflush_merge mode
f2fs: fix count of seg_freed to make sec_freed correct
f2fs: change segment to section in f2fs_ioc_gc_range
ARM: dts: rockchip: Fix the PMU interrupt number for rv1108
ARM: dts: rockchip: Assign the proper GPIO clocks for rv1108
f2fs: fix to allow node segment for GC by ioctl path
sparc: Fix JIT fused branch convergance.
sparc: Correct ctx->saw_frame_pointer logic.
nvme: Free ctrl device name on init failure
dma-mapping: fix return type of dma_set_max_seg_size()
slimbus: ngd: Fix build error on x86
altera-stapl: check for a null key before strcasecmp'ing it
serial: imx: fix error handling in console_setup
i2c: imx: don't print error message on probe defer
clk: meson: Fix GXL HDMI PLL fractional bits width
gpu: host1x: Fix syncpoint ID field size on Tegra186
lockd: fix decoding of TEST results
sctp: increase sk_wmem_alloc when head->truesize is increased
iommu/amd: Fix line-break in error log reporting
ASoC: rsnd: tidyup registering method for rsnd_kctrl_new()
ARM: dts: sun4i: Fix gpio-keys warning
ARM: dts: sun4i: Fix HDMI output DTC warning
ARM: dts: sun5i: a10s: Fix HDMI output DTC warning
ARM: dts: r8a779[01]: Disable unconnected LVDS encoders
ARM: dts: sun7i: Fix HDMI output DTC warning
ARM: dts: sun8i: a23/a33: Fix OPP DTC warnings
ARM: dts: sun8i: v3s: Change pinctrl nodes to avoid warning
dlm: NULL check before kmem_cache_destroy is not needed
ARM: debug: enable UART1 for socfpga Cyclone5
can: xilinx: fix return type of ndo_start_xmit function
nfsd: fix a warning in __cld_pipe_upcall()
bpf: btf: implement btf_name_valid_identifier()
bpf: btf: check name validity for various types
tools: bpftool: fix a bitfield pretty print issue
ASoC: au8540: use 64-bit arithmetic instead of 32-bit
ARM: OMAP1/2: fix SoC name printing
arm64: dts: meson-gxl-libretech-cc: fix GPIO lines names
arm64: dts: meson-gxbb-nanopi-k2: fix GPIO lines names
arm64: dts: meson-gxbb-odroidc2: fix GPIO lines names
arm64: dts: meson-gxl-khadas-vim: fix GPIO lines names
net/x25: fix called/calling length calculation in x25_parse_address_block
net/x25: fix null_x25_address handling
tools/bpf: make libbpf _GNU_SOURCE friendly
clk: mediatek: Drop __init from mtk_clk_register_cpumuxes()
clk: mediatek: Drop more __init markings for driver probe
soc: renesas: r8a77970-sysc: Correct names of A2DP/A2CN power domains
soc: renesas: r8a77980-sysc: Correct names of A2DP[01] power domains
soc: renesas: r8a77980-sysc: Correct A3VIP[012] power domain hierarchy
kbuild: disable dtc simple_bus_reg warnings by default
tcp: make tcp_space() aware of socket backlog
ARM: dts: mmp2: fix the gpio interrupt cell number
ARM: dts: realview-pbx: Fix duplicate regulator nodes
tcp: fix off-by-one bug on aborting window-probing socket
tcp: fix SNMP under-estimation on failed retransmission
tcp: fix SNMP TCP timeout under-estimation
modpost: skip ELF local symbols during section mismatch check
kbuild: fix single target build for external module
mtd: fix mtd_oobavail() incoherent returned value
ARM: dts: pxa: clean up USB controller nodes
clk: meson: meson8b: fix the offset of vid_pll_dco's N value
clk: sunxi-ng: h3/h5: Fix CSI_MCLK parent
clk: qcom: Fix MSM8998 resets
media: cxd2880-spi: fix probe when dvb_attach fails
ARM: dts: realview: Fix some more duplicate regulator nodes
dlm: fix invalid cluster name warning
net/mlx4_core: Fix return codes of unsupported operations
pstore/ram: Avoid NULL deref in ftrace merging failure path
powerpc/math-emu: Update macros from GCC
clk: renesas: r8a77990: Correct parent clock of DU
clk: renesas: r8a77995: Correct parent clock of DU
MIPS: OCTEON: cvmx_pko_mem_debug8: use oldest forward compatible definition
nfsd: Return EPERM, not EACCES, in some SETATTR cases
media: uvcvideo: Abstract streaming object lifetime
tty: serial: qcom_geni_serial: Fix softlock
ARM: dts: sun8i: h3: Fix the system-control register range
tty: Don't block on IO when ldisc change is pending
media: stkwebcam: Bugfix for wrong return values
firmware: qcom: scm: fix compilation error when disabled
clk: qcom: gcc-msm8998: Disable halt check of UFS clocks
sctp: frag_point sanity check
soc: renesas: r8a77990-sysc: Fix initialization order of 3DG-{A,B}
mlxsw: spectrum_router: Relax GRE decap matching check
IB/hfi1: Ignore LNI errors before DC8051 transitions to Polling state
IB/hfi1: Close VNIC sdma_progress sleep window
mlx4: Use snprintf instead of complicated strcpy
usb: mtu3: fix dbginfo in qmu_tx_zlp_error_handler
clk: renesas: rcar-gen3: Set state when registering SD clocks
ASoC: max9867: Fix power management
ARM: dts: sunxi: Fix PMU compatible strings
ARM: dts: am335x-pdu001: Fix polarity of card detection input
media: vimc: fix start stream when link is disabled
net: aquantia: fix RSS table and key sizes
sched/fair: Scale bandwidth quota and period without losing quota/period ratio precision
fuse: verify nlink
fuse: verify attributes
ALSA: hda/realtek - Enable internal speaker of ASUS UX431FLC
ALSA: hda/realtek - Enable the headset-mic on a Xiaomi's laptop
ALSA: hda/realtek - Dell headphone has noise on unmute for ALC236
ALSA: pcm: oss: Avoid potential buffer overflows
ALSA: hda - Add mute led support for HP ProBook 645 G4
Input: synaptics - switch another X1 Carbon 6 to RMI/SMbus
Input: synaptics-rmi4 - re-enable IRQs in f34v7_do_reflash
Input: synaptics-rmi4 - don't increment rmiaddr for SMBus transfers
Input: goodix - add upside-down quirk for Teclast X89 tablet
coresight: etm4x: Fix input validation for sysfs.
Input: Fix memory leak in psxpad_spi_probe
x86/mm/32: Sync only to VMALLOC_END in vmalloc_sync_all()
x86/PCI: Avoid AMD FCH XHCI USB PME# from D0 defect
xfrm interface: fix memory leak on creation
xfrm interface: avoid corruption on changelink
xfrm interface: fix list corruption for x-netns
xfrm interface: fix management of phydev
CIFS: Fix NULL-pointer dereference in smb2_push_mandatory_locks
CIFS: Fix SMB2 oplock break processing
tty: vt: keyboard: reject invalid keycodes
can: slcan: Fix use-after-free Read in slcan_open
kernfs: fix ino wrap-around detection
jbd2: Fix possible overflow in jbd2_log_space_left()
drm/msm: fix memleak on release
drm/i810: Prevent underflow in ioctl
arm64: dts: exynos: Revert "Remove unneeded address space mapping for soc node"
KVM: arm/arm64: vgic: Don't rely on the wrong pending table
KVM: x86: do not modify masked bits of shared MSRs
KVM: x86: fix presentation of TSX feature in ARCH_CAPABILITIES
KVM: x86: Grab KVM's srcu lock when setting nested state
crypto: crypto4xx - fix double-free in crypto4xx_destroy_sdr
crypto: atmel-aes - Fix IV handling when req->nbytes < ivsize
crypto: af_alg - cast ki_complete ternary op to int
crypto: ccp - fix uninitialized list head
crypto: ecdh - fix big endian bug in ECC library
crypto: user - fix memory leak in crypto_report
spi: atmel: Fix CS high support
mwifiex: update set_mac_address logic
can: ucan: fix non-atomic allocation in completion handler
RDMA/qib: Validate ->show()/store() callbacks before calling them
iomap: Fix pipe page leakage during splicing
thermal: Fix deadlock in thermal thermal_zone_device_check
vcs: prevent write access to vcsu devices
binder: Fix race between mmap() and binder_alloc_print_pages()
binder: Handle start==NULL in binder_update_page_range()
ALSA: hda - Fix pending unsol events at shutdown
md/raid0: Fix an error message in raid0_make_request()
watchdog: aspeed: Fix clock behaviour for ast2600
perf script: Fix invalid LBR/binary mismatch error
splice: don't read more than available pipe space
iomap: partially revert 4721a601099 (simulated directio short read on EFAULT)
xfs: add missing error check in xfs_prepare_shift()
ASoC: rsnd: fixup MIX kctrl registration
KVM: x86: fix out-of-bounds write in KVM_GET_EMULATED_CPUID (CVE-2019-19332)
net: qrtr: fix memort leak in qrtr_tun_write_iter
appletalk: Fix potential NULL pointer dereference in unregister_snap_client
appletalk: Set error code if register_snap_client failed
Linux 4.19.89
Signed-off-by: Greg Kroah-Hartman <gregkh@google.com>
Change-Id: Ib03743db658afb561f36bf513e38754eed704fef
This commit is contained in:
Greg Kroah-Hartman
commit
c79e0f865d
274 changed files with 1562 additions and 1034 deletions
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@ -27,4 +27,4 @@ and valid to enable charging:
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- "abracon,tc-diode": should be "standard" (0.6V) or "schottky" (0.3V)
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- "abracon,tc-diode": should be "standard" (0.6V) or "schottky" (0.3V)
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- "abracon,tc-resistor": should be <0>, <3>, <6> or <11>. 0 disables the output
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- "abracon,tc-resistor": should be <0>, <3>, <6> or <11>. 0 disables the output
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resistor, the other values are in ohm.
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resistor, the other values are in kOhm.
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13
Makefile
13
Makefile
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@ -1,7 +1,7 @@
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# SPDX-License-Identifier: GPL-2.0
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# SPDX-License-Identifier: GPL-2.0
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VERSION = 4
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VERSION = 4
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PATCHLEVEL = 19
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PATCHLEVEL = 19
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SUBLEVEL = 88
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SUBLEVEL = 89
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EXTRAVERSION =
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EXTRAVERSION =
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NAME = "People's Front"
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NAME = "People's Front"
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@ -1569,9 +1569,6 @@ else # KBUILD_EXTMOD
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# We are always building modules
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# We are always building modules
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KBUILD_MODULES := 1
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KBUILD_MODULES := 1
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PHONY += crmodverdir
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crmodverdir:
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$(cmd_crmodverdir)
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PHONY += $(objtree)/Module.symvers
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PHONY += $(objtree)/Module.symvers
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$(objtree)/Module.symvers:
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$(objtree)/Module.symvers:
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@ -1583,7 +1580,7 @@ $(objtree)/Module.symvers:
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module-dirs := $(addprefix _module_,$(KBUILD_EXTMOD))
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module-dirs := $(addprefix _module_,$(KBUILD_EXTMOD))
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PHONY += $(module-dirs) modules
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PHONY += $(module-dirs) modules
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$(module-dirs): crmodverdir $(objtree)/Module.symvers
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$(module-dirs): prepare $(objtree)/Module.symvers
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$(Q)$(MAKE) $(build)=$(patsubst _module_%,%,$@)
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$(Q)$(MAKE) $(build)=$(patsubst _module_%,%,$@)
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modules: $(module-dirs)
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modules: $(module-dirs)
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@ -1624,7 +1621,8 @@ help:
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# Dummies...
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# Dummies...
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PHONY += prepare scripts
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PHONY += prepare scripts
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prepare: ;
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prepare:
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$(cmd_crmodverdir)
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scripts: ;
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scripts: ;
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endif # KBUILD_EXTMOD
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endif # KBUILD_EXTMOD
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@ -1752,17 +1750,14 @@ endif
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# Modules
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# Modules
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/: prepare scripts FORCE
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/: prepare scripts FORCE
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$(cmd_crmodverdir)
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$(Q)$(MAKE) KBUILD_MODULES=$(if $(CONFIG_MODULES),1) \
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$(Q)$(MAKE) KBUILD_MODULES=$(if $(CONFIG_MODULES),1) \
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$(build)=$(build-dir)
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$(build)=$(build-dir)
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# Make sure the latest headers are built for Documentation
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# Make sure the latest headers are built for Documentation
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Documentation/ samples/: headers_install
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Documentation/ samples/: headers_install
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%/: prepare scripts FORCE
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%/: prepare scripts FORCE
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$(cmd_crmodverdir)
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$(Q)$(MAKE) KBUILD_MODULES=$(if $(CONFIG_MODULES),1) \
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$(Q)$(MAKE) KBUILD_MODULES=$(if $(CONFIG_MODULES),1) \
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$(build)=$(build-dir)
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$(build)=$(build-dir)
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%.ko: prepare scripts FORCE
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%.ko: prepare scripts FORCE
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$(cmd_crmodverdir)
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$(Q)$(MAKE) KBUILD_MODULES=$(if $(CONFIG_MODULES),1) \
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$(Q)$(MAKE) KBUILD_MODULES=$(if $(CONFIG_MODULES),1) \
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$(build)=$(build-dir) $(@:.ko=.o)
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$(build)=$(build-dir) $(@:.ko=.o)
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$(Q)$(MAKE) -f $(srctree)/scripts/Makefile.modpost
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$(Q)$(MAKE) -f $(srctree)/scripts/Makefile.modpost
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@ -124,7 +124,9 @@ extern unsigned long perip_base, perip_end;
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/* IO coherency related Auxiliary registers */
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/* IO coherency related Auxiliary registers */
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#define ARC_REG_IO_COH_ENABLE 0x500
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#define ARC_REG_IO_COH_ENABLE 0x500
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#define ARC_IO_COH_ENABLE_BIT BIT(0)
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#define ARC_REG_IO_COH_PARTIAL 0x501
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#define ARC_REG_IO_COH_PARTIAL 0x501
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#define ARC_IO_COH_PARTIAL_BIT BIT(0)
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#define ARC_REG_IO_COH_AP0_BASE 0x508
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#define ARC_REG_IO_COH_AP0_BASE 0x508
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#define ARC_REG_IO_COH_AP0_SIZE 0x509
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#define ARC_REG_IO_COH_AP0_SIZE 0x509
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@ -1144,6 +1144,20 @@ noinline void __init arc_ioc_setup(void)
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{
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{
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unsigned int ioc_base, mem_sz;
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unsigned int ioc_base, mem_sz;
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/*
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* If IOC was already enabled (due to bootloader) it technically needs to
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* be reconfigured with aperture base,size corresponding to Linux memory map
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* which will certainly be different than uboot's. But disabling and
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* reenabling IOC when DMA might be potentially active is tricky business.
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* To avoid random memory issues later, just panic here and ask user to
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* upgrade bootloader to one which doesn't enable IOC
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*/
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if (read_aux_reg(ARC_REG_IO_COH_ENABLE) & ARC_IO_COH_ENABLE_BIT)
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panic("IOC already enabled, please upgrade bootloader!\n");
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if (!ioc_enable)
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return;
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/*
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/*
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* As for today we don't support both IOC and ZONE_HIGHMEM enabled
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* As for today we don't support both IOC and ZONE_HIGHMEM enabled
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* simultaneously. This happens because as of today IOC aperture covers
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* simultaneously. This happens because as of today IOC aperture covers
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@ -1187,8 +1201,8 @@ noinline void __init arc_ioc_setup(void)
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panic("IOC Aperture start must be aligned to the size of the aperture");
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panic("IOC Aperture start must be aligned to the size of the aperture");
|
||||||
|
|
||||||
write_aux_reg(ARC_REG_IO_COH_AP0_BASE, ioc_base >> 12);
|
write_aux_reg(ARC_REG_IO_COH_AP0_BASE, ioc_base >> 12);
|
||||||
write_aux_reg(ARC_REG_IO_COH_PARTIAL, 1);
|
write_aux_reg(ARC_REG_IO_COH_PARTIAL, ARC_IO_COH_PARTIAL_BIT);
|
||||||
write_aux_reg(ARC_REG_IO_COH_ENABLE, 1);
|
write_aux_reg(ARC_REG_IO_COH_ENABLE, ARC_IO_COH_ENABLE_BIT);
|
||||||
|
|
||||||
/* Re-enable L1 dcache */
|
/* Re-enable L1 dcache */
|
||||||
__dc_enable();
|
__dc_enable();
|
||||||
|
|
@ -1265,7 +1279,7 @@ void __init arc_cache_init_master(void)
|
||||||
if (is_isa_arcv2() && l2_line_sz && !slc_enable)
|
if (is_isa_arcv2() && l2_line_sz && !slc_enable)
|
||||||
arc_slc_disable();
|
arc_slc_disable();
|
||||||
|
|
||||||
if (is_isa_arcv2() && ioc_enable)
|
if (is_isa_arcv2() && ioc_exists)
|
||||||
arc_ioc_setup();
|
arc_ioc_setup();
|
||||||
|
|
||||||
if (is_isa_arcv2() && l2_line_sz && slc_enable) {
|
if (is_isa_arcv2() && l2_line_sz && slc_enable) {
|
||||||
|
|
|
||||||
|
|
@ -1079,14 +1079,21 @@ choice
|
||||||
Say Y here if you want kernel low-level debugging support
|
Say Y here if you want kernel low-level debugging support
|
||||||
on SOCFPGA(Cyclone 5 and Arria 5) based platforms.
|
on SOCFPGA(Cyclone 5 and Arria 5) based platforms.
|
||||||
|
|
||||||
config DEBUG_SOCFPGA_UART1
|
config DEBUG_SOCFPGA_ARRIA10_UART1
|
||||||
depends on ARCH_SOCFPGA
|
depends on ARCH_SOCFPGA
|
||||||
bool "Use SOCFPGA UART1 for low-level debug"
|
bool "Use SOCFPGA Arria10 UART1 for low-level debug"
|
||||||
select DEBUG_UART_8250
|
select DEBUG_UART_8250
|
||||||
help
|
help
|
||||||
Say Y here if you want kernel low-level debugging support
|
Say Y here if you want kernel low-level debugging support
|
||||||
on SOCFPGA(Arria 10) based platforms.
|
on SOCFPGA(Arria 10) based platforms.
|
||||||
|
|
||||||
|
config DEBUG_SOCFPGA_CYCLONE5_UART1
|
||||||
|
depends on ARCH_SOCFPGA
|
||||||
|
bool "Use SOCFPGA Cyclone 5 UART1 for low-level debug"
|
||||||
|
select DEBUG_UART_8250
|
||||||
|
help
|
||||||
|
Say Y here if you want kernel low-level debugging support
|
||||||
|
on SOCFPGA(Cyclone 5 and Arria 5) based platforms.
|
||||||
|
|
||||||
config DEBUG_SUN9I_UART0
|
config DEBUG_SUN9I_UART0
|
||||||
bool "Kernel low-level debugging messages via sun9i UART0"
|
bool "Kernel low-level debugging messages via sun9i UART0"
|
||||||
|
|
@ -1647,7 +1654,8 @@ config DEBUG_UART_PHYS
|
||||||
default 0xfe800000 if ARCH_IOP32X
|
default 0xfe800000 if ARCH_IOP32X
|
||||||
default 0xff690000 if DEBUG_RK32_UART2
|
default 0xff690000 if DEBUG_RK32_UART2
|
||||||
default 0xffc02000 if DEBUG_SOCFPGA_UART0
|
default 0xffc02000 if DEBUG_SOCFPGA_UART0
|
||||||
default 0xffc02100 if DEBUG_SOCFPGA_UART1
|
default 0xffc02100 if DEBUG_SOCFPGA_ARRIA10_UART1
|
||||||
|
default 0xffc03000 if DEBUG_SOCFPGA_CYCLONE5_UART1
|
||||||
default 0xffd82340 if ARCH_IOP13XX
|
default 0xffd82340 if ARCH_IOP13XX
|
||||||
default 0xffe40000 if DEBUG_RCAR_GEN1_SCIF0
|
default 0xffe40000 if DEBUG_RCAR_GEN1_SCIF0
|
||||||
default 0xffe42000 if DEBUG_RCAR_GEN1_SCIF2
|
default 0xffe42000 if DEBUG_RCAR_GEN1_SCIF2
|
||||||
|
|
@ -1754,7 +1762,8 @@ config DEBUG_UART_VIRT
|
||||||
default 0xfeb30c00 if DEBUG_KEYSTONE_UART0
|
default 0xfeb30c00 if DEBUG_KEYSTONE_UART0
|
||||||
default 0xfeb31000 if DEBUG_KEYSTONE_UART1
|
default 0xfeb31000 if DEBUG_KEYSTONE_UART1
|
||||||
default 0xfec02000 if DEBUG_SOCFPGA_UART0
|
default 0xfec02000 if DEBUG_SOCFPGA_UART0
|
||||||
default 0xfec02100 if DEBUG_SOCFPGA_UART1
|
default 0xfec02100 if DEBUG_SOCFPGA_ARRIA10_UART1
|
||||||
|
default 0xfec03000 if DEBUG_SOCFPGA_CYCLONE5_UART1
|
||||||
default 0xfec12000 if (DEBUG_MVEBU_UART0 || DEBUG_MVEBU_UART0_ALTERNATE) && ARCH_MVEBU
|
default 0xfec12000 if (DEBUG_MVEBU_UART0 || DEBUG_MVEBU_UART0_ALTERNATE) && ARCH_MVEBU
|
||||||
default 0xfec12100 if DEBUG_MVEBU_UART1_ALTERNATE
|
default 0xfec12100 if DEBUG_MVEBU_UART1_ALTERNATE
|
||||||
default 0xfec10000 if DEBUG_SIRFATLAS7_UART0
|
default 0xfec10000 if DEBUG_SIRFATLAS7_UART0
|
||||||
|
|
@ -1803,9 +1812,9 @@ config DEBUG_UART_8250_WORD
|
||||||
depends on DEBUG_LL_UART_8250 || DEBUG_UART_8250
|
depends on DEBUG_LL_UART_8250 || DEBUG_UART_8250
|
||||||
depends on DEBUG_UART_8250_SHIFT >= 2
|
depends on DEBUG_UART_8250_SHIFT >= 2
|
||||||
default y if DEBUG_PICOXCELL_UART || \
|
default y if DEBUG_PICOXCELL_UART || \
|
||||||
DEBUG_SOCFPGA_UART0 || DEBUG_SOCFPGA_UART1 || \
|
DEBUG_SOCFPGA_UART0 || DEBUG_SOCFPGA_ARRIA10_UART1 || \
|
||||||
DEBUG_KEYSTONE_UART0 || DEBUG_KEYSTONE_UART1 || \
|
DEBUG_SOCFPGA_CYCLONE5_UART1 || DEBUG_KEYSTONE_UART0 || \
|
||||||
DEBUG_ALPINE_UART0 || \
|
DEBUG_KEYSTONE_UART1 || DEBUG_ALPINE_UART0 || \
|
||||||
DEBUG_DAVINCI_DMx_UART0 || DEBUG_DAVINCI_DA8XX_UART1 || \
|
DEBUG_DAVINCI_DMx_UART0 || DEBUG_DAVINCI_DA8XX_UART1 || \
|
||||||
DEBUG_DAVINCI_DA8XX_UART2 || DEBUG_BCM_IPROC_UART3 || \
|
DEBUG_DAVINCI_DA8XX_UART2 || DEBUG_BCM_IPROC_UART3 || \
|
||||||
DEBUG_BCM_KONA_UART || DEBUG_RK32_UART2
|
DEBUG_BCM_KONA_UART || DEBUG_RK32_UART2
|
||||||
|
|
|
||||||
|
|
@ -577,7 +577,7 @@
|
||||||
bus-width = <4>;
|
bus-width = <4>;
|
||||||
pinctrl-names = "default";
|
pinctrl-names = "default";
|
||||||
pinctrl-0 = <&mmc2_pins>;
|
pinctrl-0 = <&mmc2_pins>;
|
||||||
cd-gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
|
cd-gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>;
|
||||||
};
|
};
|
||||||
|
|
||||||
&sham {
|
&sham {
|
||||||
|
|
|
||||||
|
|
@ -45,7 +45,7 @@
|
||||||
};
|
};
|
||||||
|
|
||||||
/* The voltage to the MMC card is hardwired at 3.3V */
|
/* The voltage to the MMC card is hardwired at 3.3V */
|
||||||
vmmc: fixedregulator@0 {
|
vmmc: regulator-vmmc {
|
||||||
compatible = "regulator-fixed";
|
compatible = "regulator-fixed";
|
||||||
regulator-name = "vmmc";
|
regulator-name = "vmmc";
|
||||||
regulator-min-microvolt = <3300000>;
|
regulator-min-microvolt = <3300000>;
|
||||||
|
|
@ -53,7 +53,7 @@
|
||||||
regulator-boot-on;
|
regulator-boot-on;
|
||||||
};
|
};
|
||||||
|
|
||||||
veth: fixedregulator@0 {
|
veth: regulator-veth {
|
||||||
compatible = "regulator-fixed";
|
compatible = "regulator-fixed";
|
||||||
regulator-name = "veth";
|
regulator-name = "veth";
|
||||||
regulator-min-microvolt = <3300000>;
|
regulator-min-microvolt = <3300000>;
|
||||||
|
|
|
||||||
|
|
@ -145,7 +145,7 @@
|
||||||
};
|
};
|
||||||
|
|
||||||
/* The voltage to the MMC card is hardwired at 3.3V */
|
/* The voltage to the MMC card is hardwired at 3.3V */
|
||||||
vmmc: fixedregulator@0 {
|
vmmc: regulator-vmmc {
|
||||||
compatible = "regulator-fixed";
|
compatible = "regulator-fixed";
|
||||||
regulator-name = "vmmc";
|
regulator-name = "vmmc";
|
||||||
regulator-min-microvolt = <3300000>;
|
regulator-min-microvolt = <3300000>;
|
||||||
|
|
@ -153,7 +153,7 @@
|
||||||
regulator-boot-on;
|
regulator-boot-on;
|
||||||
};
|
};
|
||||||
|
|
||||||
veth: fixedregulator@0 {
|
veth: regulator-veth {
|
||||||
compatible = "regulator-fixed";
|
compatible = "regulator-fixed";
|
||||||
regulator-name = "veth";
|
regulator-name = "veth";
|
||||||
regulator-min-microvolt = <3300000>;
|
regulator-min-microvolt = <3300000>;
|
||||||
|
|
|
||||||
|
|
@ -44,7 +44,7 @@
|
||||||
};
|
};
|
||||||
|
|
||||||
/* The voltage to the MMC card is hardwired at 3.3V */
|
/* The voltage to the MMC card is hardwired at 3.3V */
|
||||||
vmmc: fixedregulator@0 {
|
vmmc: regulator-vmmc {
|
||||||
compatible = "regulator-fixed";
|
compatible = "regulator-fixed";
|
||||||
regulator-name = "vmmc";
|
regulator-name = "vmmc";
|
||||||
regulator-min-microvolt = <3300000>;
|
regulator-min-microvolt = <3300000>;
|
||||||
|
|
@ -52,7 +52,7 @@
|
||||||
regulator-boot-on;
|
regulator-boot-on;
|
||||||
};
|
};
|
||||||
|
|
||||||
veth: fixedregulator@0 {
|
veth: regulator-veth {
|
||||||
compatible = "regulator-fixed";
|
compatible = "regulator-fixed";
|
||||||
regulator-name = "veth";
|
regulator-name = "veth";
|
||||||
regulator-min-microvolt = <3300000>;
|
regulator-min-microvolt = <3300000>;
|
||||||
|
|
@ -567,4 +567,3 @@
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -360,7 +360,7 @@
|
||||||
};
|
};
|
||||||
|
|
||||||
hsotg: hsotg@12480000 {
|
hsotg: hsotg@12480000 {
|
||||||
compatible = "snps,dwc2";
|
compatible = "samsung,s3c6400-hsotg", "snps,dwc2";
|
||||||
reg = <0x12480000 0x20000>;
|
reg = <0x12480000 0x20000>;
|
||||||
interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>;
|
interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
clocks = <&cmu CLK_USBOTG>;
|
clocks = <&cmu CLK_USBOTG>;
|
||||||
|
|
|
||||||
|
|
@ -224,7 +224,7 @@
|
||||||
|
|
||||||
ldo13_reg: LDO13 {
|
ldo13_reg: LDO13 {
|
||||||
regulator-name = "vddq_mmc2";
|
regulator-name = "vddq_mmc2";
|
||||||
regulator-min-microvolt = <2800000>;
|
regulator-min-microvolt = <1800000>;
|
||||||
regulator-max-microvolt = <2800000>;
|
regulator-max-microvolt = <2800000>;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -609,13 +609,14 @@
|
||||||
};
|
};
|
||||||
|
|
||||||
touchscreen@2a {
|
touchscreen@2a {
|
||||||
compatible = "eeti,egalax_ts";
|
compatible = "eeti,exc3000";
|
||||||
pinctrl-names = "default";
|
pinctrl-names = "default";
|
||||||
pinctrl-0 = <&pinctrl_ts>;
|
pinctrl-0 = <&pinctrl_ts>;
|
||||||
reg = <0x2a>;
|
reg = <0x2a>;
|
||||||
interrupt-parent = <&gpio1>;
|
interrupt-parent = <&gpio1>;
|
||||||
interrupts = <8 IRQ_TYPE_LEVEL_LOW>;
|
interrupts = <8 IRQ_TYPE_LEVEL_LOW>;
|
||||||
wakeup-gpios = <&gpio1 8 GPIO_ACTIVE_LOW>;
|
touchscreen-inverted-x;
|
||||||
|
touchscreen-swapped-x-y;
|
||||||
status = "disabled";
|
status = "disabled";
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -180,7 +180,7 @@
|
||||||
clocks = <&soc_clocks MMP2_CLK_GPIO>;
|
clocks = <&soc_clocks MMP2_CLK_GPIO>;
|
||||||
resets = <&soc_clocks MMP2_CLK_GPIO>;
|
resets = <&soc_clocks MMP2_CLK_GPIO>;
|
||||||
interrupt-controller;
|
interrupt-controller;
|
||||||
#interrupt-cells = <1>;
|
#interrupt-cells = <2>;
|
||||||
ranges;
|
ranges;
|
||||||
|
|
||||||
gcb0: gpio@d4019000 {
|
gcb0: gpio@d4019000 {
|
||||||
|
|
|
||||||
|
|
@ -35,7 +35,7 @@
|
||||||
clocks = <&clks CLK_NONE>;
|
clocks = <&clks CLK_NONE>;
|
||||||
};
|
};
|
||||||
|
|
||||||
pxa27x_ohci: usb@4c000000 {
|
usb0: usb@4c000000 {
|
||||||
compatible = "marvell,pxa-ohci";
|
compatible = "marvell,pxa-ohci";
|
||||||
reg = <0x4c000000 0x10000>;
|
reg = <0x4c000000 0x10000>;
|
||||||
interrupts = <3>;
|
interrupts = <3>;
|
||||||
|
|
|
||||||
|
|
@ -117,13 +117,6 @@
|
||||||
status = "disabled";
|
status = "disabled";
|
||||||
};
|
};
|
||||||
|
|
||||||
usb0: ohci@4c000000 {
|
|
||||||
compatible = "marvell,pxa-ohci";
|
|
||||||
reg = <0x4c000000 0x10000>;
|
|
||||||
interrupts = <3>;
|
|
||||||
status = "disabled";
|
|
||||||
};
|
|
||||||
|
|
||||||
mmc0: mmc@41100000 {
|
mmc0: mmc@41100000 {
|
||||||
compatible = "marvell,pxa-mmc";
|
compatible = "marvell,pxa-mmc";
|
||||||
reg = <0x41100000 0x1000>;
|
reg = <0x41100000 0x1000>;
|
||||||
|
|
|
||||||
|
|
@ -204,7 +204,7 @@
|
||||||
status = "disabled";
|
status = "disabled";
|
||||||
};
|
};
|
||||||
|
|
||||||
pxa3xx_ohci: usb@4c000000 {
|
usb0: usb@4c000000 {
|
||||||
compatible = "marvell,pxa-ohci";
|
compatible = "marvell,pxa-ohci";
|
||||||
reg = <0x4c000000 0x10000>;
|
reg = <0x4c000000 0x10000>;
|
||||||
interrupts = <3>;
|
interrupts = <3>;
|
||||||
|
|
|
||||||
|
|
@ -489,8 +489,6 @@
|
||||||
};
|
};
|
||||||
|
|
||||||
&lvds1 {
|
&lvds1 {
|
||||||
status = "okay";
|
|
||||||
|
|
||||||
ports {
|
ports {
|
||||||
port@1 {
|
port@1 {
|
||||||
lvds_connector: endpoint {
|
lvds_connector: endpoint {
|
||||||
|
|
|
||||||
|
|
@ -479,8 +479,6 @@
|
||||||
};
|
};
|
||||||
|
|
||||||
&lvds0 {
|
&lvds0 {
|
||||||
status = "okay";
|
|
||||||
|
|
||||||
ports {
|
ports {
|
||||||
port@1 {
|
port@1 {
|
||||||
lvds_connector: endpoint {
|
lvds_connector: endpoint {
|
||||||
|
|
|
||||||
|
|
@ -482,8 +482,6 @@
|
||||||
};
|
};
|
||||||
|
|
||||||
&lvds0 {
|
&lvds0 {
|
||||||
status = "okay";
|
|
||||||
|
|
||||||
ports {
|
ports {
|
||||||
port@1 {
|
port@1 {
|
||||||
lvds_connector: endpoint {
|
lvds_connector: endpoint {
|
||||||
|
|
|
||||||
|
|
@ -25,7 +25,7 @@
|
||||||
|
|
||||||
vcc_flash: flash-regulator {
|
vcc_flash: flash-regulator {
|
||||||
compatible = "regulator-fixed";
|
compatible = "regulator-fixed";
|
||||||
regulator-name = "vcc_sys";
|
regulator-name = "vcc_flash";
|
||||||
regulator-min-microvolt = <1800000>;
|
regulator-min-microvolt = <1800000>;
|
||||||
regulator-max-microvolt = <1800000>;
|
regulator-max-microvolt = <1800000>;
|
||||||
startup-delay-us = <150>;
|
startup-delay-us = <150>;
|
||||||
|
|
|
||||||
|
|
@ -66,7 +66,7 @@
|
||||||
|
|
||||||
arm-pmu {
|
arm-pmu {
|
||||||
compatible = "arm,cortex-a7-pmu";
|
compatible = "arm,cortex-a7-pmu";
|
||||||
interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
|
interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
};
|
};
|
||||||
|
|
||||||
timer {
|
timer {
|
||||||
|
|
@ -541,7 +541,7 @@
|
||||||
compatible = "rockchip,gpio-bank";
|
compatible = "rockchip,gpio-bank";
|
||||||
reg = <0x20030000 0x100>;
|
reg = <0x20030000 0x100>;
|
||||||
interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
|
interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
clocks = <&xin24m>;
|
clocks = <&cru PCLK_GPIO0_PMU>;
|
||||||
|
|
||||||
gpio-controller;
|
gpio-controller;
|
||||||
#gpio-cells = <2>;
|
#gpio-cells = <2>;
|
||||||
|
|
@ -554,7 +554,7 @@
|
||||||
compatible = "rockchip,gpio-bank";
|
compatible = "rockchip,gpio-bank";
|
||||||
reg = <0x10310000 0x100>;
|
reg = <0x10310000 0x100>;
|
||||||
interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
|
interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
clocks = <&xin24m>;
|
clocks = <&cru PCLK_GPIO1>;
|
||||||
|
|
||||||
gpio-controller;
|
gpio-controller;
|
||||||
#gpio-cells = <2>;
|
#gpio-cells = <2>;
|
||||||
|
|
@ -567,7 +567,7 @@
|
||||||
compatible = "rockchip,gpio-bank";
|
compatible = "rockchip,gpio-bank";
|
||||||
reg = <0x10320000 0x100>;
|
reg = <0x10320000 0x100>;
|
||||||
interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
|
interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
clocks = <&xin24m>;
|
clocks = <&cru PCLK_GPIO2>;
|
||||||
|
|
||||||
gpio-controller;
|
gpio-controller;
|
||||||
#gpio-cells = <2>;
|
#gpio-cells = <2>;
|
||||||
|
|
@ -580,7 +580,7 @@
|
||||||
compatible = "rockchip,gpio-bank";
|
compatible = "rockchip,gpio-bank";
|
||||||
reg = <0x10330000 0x100>;
|
reg = <0x10330000 0x100>;
|
||||||
interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
|
interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
clocks = <&xin24m>;
|
clocks = <&cru PCLK_GPIO3>;
|
||||||
|
|
||||||
gpio-controller;
|
gpio-controller;
|
||||||
#gpio-cells = <2>;
|
#gpio-cells = <2>;
|
||||||
|
|
|
||||||
|
|
@ -63,8 +63,6 @@
|
||||||
compatible = "gpio-keys-polled";
|
compatible = "gpio-keys-polled";
|
||||||
pinctrl-names = "default";
|
pinctrl-names = "default";
|
||||||
pinctrl-0 = <&key_pins_inet9f>;
|
pinctrl-0 = <&key_pins_inet9f>;
|
||||||
#address-cells = <1>;
|
|
||||||
#size-cells = <0>;
|
|
||||||
poll-interval = <20>;
|
poll-interval = <20>;
|
||||||
|
|
||||||
left-joystick-left {
|
left-joystick-left {
|
||||||
|
|
|
||||||
|
|
@ -76,8 +76,6 @@
|
||||||
|
|
||||||
gpio-keys {
|
gpio-keys {
|
||||||
compatible = "gpio-keys";
|
compatible = "gpio-keys";
|
||||||
#address-cells = <1>;
|
|
||||||
#size-cells = <0>;
|
|
||||||
|
|
||||||
back {
|
back {
|
||||||
label = "Key Back";
|
label = "Key Back";
|
||||||
|
|
|
||||||
|
|
@ -530,8 +530,6 @@
|
||||||
};
|
};
|
||||||
|
|
||||||
hdmi_out: port@1 {
|
hdmi_out: port@1 {
|
||||||
#address-cells = <1>;
|
|
||||||
#size-cells = <0>;
|
|
||||||
reg = <1>;
|
reg = <1>;
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
|
||||||
|
|
@ -104,8 +104,6 @@
|
||||||
};
|
};
|
||||||
|
|
||||||
hdmi_out: port@1 {
|
hdmi_out: port@1 {
|
||||||
#address-cells = <1>;
|
|
||||||
#size-cells = <0>;
|
|
||||||
reg = <1>;
|
reg = <1>;
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
|
||||||
|
|
@ -201,7 +201,7 @@
|
||||||
};
|
};
|
||||||
|
|
||||||
pmu {
|
pmu {
|
||||||
compatible = "arm,cortex-a7-pmu", "arm,cortex-a15-pmu";
|
compatible = "arm,cortex-a7-pmu";
|
||||||
interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
|
interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
<GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
|
<GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
<GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
|
<GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
|
|
|
||||||
|
|
@ -183,7 +183,7 @@
|
||||||
};
|
};
|
||||||
|
|
||||||
pmu {
|
pmu {
|
||||||
compatible = "arm,cortex-a7-pmu", "arm,cortex-a15-pmu";
|
compatible = "arm,cortex-a7-pmu";
|
||||||
interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
|
interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
<GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
|
<GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
};
|
};
|
||||||
|
|
@ -639,8 +639,6 @@
|
||||||
};
|
};
|
||||||
|
|
||||||
hdmi_out: port@1 {
|
hdmi_out: port@1 {
|
||||||
#address-cells = <1>;
|
|
||||||
#size-cells = <0>;
|
|
||||||
reg = <1>;
|
reg = <1>;
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
|
||||||
|
|
@ -47,19 +47,19 @@
|
||||||
compatible = "operating-points-v2";
|
compatible = "operating-points-v2";
|
||||||
opp-shared;
|
opp-shared;
|
||||||
|
|
||||||
opp@648000000 {
|
opp-648000000 {
|
||||||
opp-hz = /bits/ 64 <648000000>;
|
opp-hz = /bits/ 64 <648000000>;
|
||||||
opp-microvolt = <1040000 1040000 1300000>;
|
opp-microvolt = <1040000 1040000 1300000>;
|
||||||
clock-latency-ns = <244144>; /* 8 32k periods */
|
clock-latency-ns = <244144>; /* 8 32k periods */
|
||||||
};
|
};
|
||||||
|
|
||||||
opp@816000000 {
|
opp-816000000 {
|
||||||
opp-hz = /bits/ 64 <816000000>;
|
opp-hz = /bits/ 64 <816000000>;
|
||||||
opp-microvolt = <1100000 1100000 1300000>;
|
opp-microvolt = <1100000 1100000 1300000>;
|
||||||
clock-latency-ns = <244144>; /* 8 32k periods */
|
clock-latency-ns = <244144>; /* 8 32k periods */
|
||||||
};
|
};
|
||||||
|
|
||||||
opp@1008000000 {
|
opp-1008000000 {
|
||||||
opp-hz = /bits/ 64 <1008000000>;
|
opp-hz = /bits/ 64 <1008000000>;
|
||||||
opp-microvolt = <1200000 1200000 1300000>;
|
opp-microvolt = <1200000 1200000 1300000>;
|
||||||
clock-latency-ns = <244144>; /* 8 32k periods */
|
clock-latency-ns = <244144>; /* 8 32k periods */
|
||||||
|
|
@ -122,7 +122,7 @@
|
||||||
soc {
|
soc {
|
||||||
system-control@1c00000 {
|
system-control@1c00000 {
|
||||||
compatible = "allwinner,sun8i-h3-system-control";
|
compatible = "allwinner,sun8i-h3-system-control";
|
||||||
reg = <0x01c00000 0x30>;
|
reg = <0x01c00000 0x1000>;
|
||||||
#address-cells = <1>;
|
#address-cells = <1>;
|
||||||
#size-cells = <1>;
|
#size-cells = <1>;
|
||||||
ranges;
|
ranges;
|
||||||
|
|
|
||||||
|
|
@ -103,13 +103,13 @@
|
||||||
};
|
};
|
||||||
|
|
||||||
&cpu0_opp_table {
|
&cpu0_opp_table {
|
||||||
opp@1104000000 {
|
opp-1104000000 {
|
||||||
opp-hz = /bits/ 64 <1104000000>;
|
opp-hz = /bits/ 64 <1104000000>;
|
||||||
opp-microvolt = <1320000>;
|
opp-microvolt = <1320000>;
|
||||||
clock-latency-ns = <244144>; /* 8 32k periods */
|
clock-latency-ns = <244144>; /* 8 32k periods */
|
||||||
};
|
};
|
||||||
|
|
||||||
opp@1200000000 {
|
opp-1200000000 {
|
||||||
opp-hz = /bits/ 64 <1200000000>;
|
opp-hz = /bits/ 64 <1200000000>;
|
||||||
opp-microvolt = <1320000>;
|
opp-microvolt = <1320000>;
|
||||||
clock-latency-ns = <244144>; /* 8 32k periods */
|
clock-latency-ns = <244144>; /* 8 32k periods */
|
||||||
|
|
|
||||||
|
|
@ -78,7 +78,7 @@
|
||||||
};
|
};
|
||||||
|
|
||||||
&mmc0 {
|
&mmc0 {
|
||||||
pinctrl-0 = <&mmc0_pins_a>;
|
pinctrl-0 = <&mmc0_pins>;
|
||||||
pinctrl-names = "default";
|
pinctrl-names = "default";
|
||||||
broken-cd;
|
broken-cd;
|
||||||
bus-width = <4>;
|
bus-width = <4>;
|
||||||
|
|
@ -87,7 +87,7 @@
|
||||||
};
|
};
|
||||||
|
|
||||||
&uart0 {
|
&uart0 {
|
||||||
pinctrl-0 = <&uart0_pins_a>;
|
pinctrl-0 = <&uart0_pb_pins>;
|
||||||
pinctrl-names = "default";
|
pinctrl-names = "default";
|
||||||
status = "okay";
|
status = "okay";
|
||||||
};
|
};
|
||||||
|
|
|
||||||
|
|
@ -292,17 +292,17 @@
|
||||||
interrupt-controller;
|
interrupt-controller;
|
||||||
#interrupt-cells = <3>;
|
#interrupt-cells = <3>;
|
||||||
|
|
||||||
i2c0_pins: i2c0 {
|
i2c0_pins: i2c0-pins {
|
||||||
pins = "PB6", "PB7";
|
pins = "PB6", "PB7";
|
||||||
function = "i2c0";
|
function = "i2c0";
|
||||||
};
|
};
|
||||||
|
|
||||||
uart0_pins_a: uart0@0 {
|
uart0_pb_pins: uart0-pb-pins {
|
||||||
pins = "PB8", "PB9";
|
pins = "PB8", "PB9";
|
||||||
function = "uart0";
|
function = "uart0";
|
||||||
};
|
};
|
||||||
|
|
||||||
mmc0_pins_a: mmc0@0 {
|
mmc0_pins: mmc0-pins {
|
||||||
pins = "PF0", "PF1", "PF2", "PF3",
|
pins = "PF0", "PF1", "PF2", "PF3",
|
||||||
"PF4", "PF5";
|
"PF4", "PF5";
|
||||||
function = "mmc0";
|
function = "mmc0";
|
||||||
|
|
@ -310,7 +310,7 @@
|
||||||
bias-pull-up;
|
bias-pull-up;
|
||||||
};
|
};
|
||||||
|
|
||||||
mmc1_pins: mmc1 {
|
mmc1_pins: mmc1-pins {
|
||||||
pins = "PG0", "PG1", "PG2", "PG3",
|
pins = "PG0", "PG1", "PG2", "PG3",
|
||||||
"PG4", "PG5";
|
"PG4", "PG5";
|
||||||
function = "mmc1";
|
function = "mmc1";
|
||||||
|
|
@ -318,7 +318,7 @@
|
||||||
bias-pull-up;
|
bias-pull-up;
|
||||||
};
|
};
|
||||||
|
|
||||||
spi0_pins: spi0 {
|
spi0_pins: spi0-pins {
|
||||||
pins = "PC0", "PC1", "PC2", "PC3";
|
pins = "PC0", "PC1", "PC2", "PC3";
|
||||||
function = "spi0";
|
function = "spi0";
|
||||||
};
|
};
|
||||||
|
|
|
||||||
|
|
@ -349,6 +349,13 @@ do { \
|
||||||
#define __get_user_asm_byte(x, addr, err) \
|
#define __get_user_asm_byte(x, addr, err) \
|
||||||
__get_user_asm(x, addr, err, ldrb)
|
__get_user_asm(x, addr, err, ldrb)
|
||||||
|
|
||||||
|
#if __LINUX_ARM_ARCH__ >= 6
|
||||||
|
|
||||||
|
#define __get_user_asm_half(x, addr, err) \
|
||||||
|
__get_user_asm(x, addr, err, ldrh)
|
||||||
|
|
||||||
|
#else
|
||||||
|
|
||||||
#ifndef __ARMEB__
|
#ifndef __ARMEB__
|
||||||
#define __get_user_asm_half(x, __gu_addr, err) \
|
#define __get_user_asm_half(x, __gu_addr, err) \
|
||||||
({ \
|
({ \
|
||||||
|
|
@ -367,6 +374,8 @@ do { \
|
||||||
})
|
})
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
#endif /* __LINUX_ARM_ARCH__ >= 6 */
|
||||||
|
|
||||||
#define __get_user_asm_word(x, addr, err) \
|
#define __get_user_asm_word(x, addr, err) \
|
||||||
__get_user_asm(x, addr, err, ldr)
|
__get_user_asm(x, addr, err, ldr)
|
||||||
#endif
|
#endif
|
||||||
|
|
@ -442,6 +451,13 @@ do { \
|
||||||
#define __put_user_asm_byte(x, __pu_addr, err) \
|
#define __put_user_asm_byte(x, __pu_addr, err) \
|
||||||
__put_user_asm(x, __pu_addr, err, strb)
|
__put_user_asm(x, __pu_addr, err, strb)
|
||||||
|
|
||||||
|
#if __LINUX_ARM_ARCH__ >= 6
|
||||||
|
|
||||||
|
#define __put_user_asm_half(x, __pu_addr, err) \
|
||||||
|
__put_user_asm(x, __pu_addr, err, strh)
|
||||||
|
|
||||||
|
#else
|
||||||
|
|
||||||
#ifndef __ARMEB__
|
#ifndef __ARMEB__
|
||||||
#define __put_user_asm_half(x, __pu_addr, err) \
|
#define __put_user_asm_half(x, __pu_addr, err) \
|
||||||
({ \
|
({ \
|
||||||
|
|
@ -458,6 +474,8 @@ do { \
|
||||||
})
|
})
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
#endif /* __LINUX_ARM_ARCH__ >= 6 */
|
||||||
|
|
||||||
#define __put_user_asm_word(x, __pu_addr, err) \
|
#define __put_user_asm_word(x, __pu_addr, err) \
|
||||||
__put_user_asm(x, __pu_addr, err, str)
|
__put_user_asm(x, __pu_addr, err, str)
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -42,6 +42,12 @@ _ASM_NOKPROBE(__get_user_1)
|
||||||
|
|
||||||
ENTRY(__get_user_2)
|
ENTRY(__get_user_2)
|
||||||
check_uaccess r0, 2, r1, r2, __get_user_bad
|
check_uaccess r0, 2, r1, r2, __get_user_bad
|
||||||
|
#if __LINUX_ARM_ARCH__ >= 6
|
||||||
|
|
||||||
|
2: TUSER(ldrh) r2, [r0]
|
||||||
|
|
||||||
|
#else
|
||||||
|
|
||||||
#ifdef CONFIG_CPU_USE_DOMAINS
|
#ifdef CONFIG_CPU_USE_DOMAINS
|
||||||
rb .req ip
|
rb .req ip
|
||||||
2: ldrbt r2, [r0], #1
|
2: ldrbt r2, [r0], #1
|
||||||
|
|
@ -56,6 +62,9 @@ rb .req r0
|
||||||
#else
|
#else
|
||||||
orr r2, rb, r2, lsl #8
|
orr r2, rb, r2, lsl #8
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
#endif /* __LINUX_ARM_ARCH__ >= 6 */
|
||||||
|
|
||||||
mov r0, #0
|
mov r0, #0
|
||||||
ret lr
|
ret lr
|
||||||
ENDPROC(__get_user_2)
|
ENDPROC(__get_user_2)
|
||||||
|
|
@ -145,7 +154,9 @@ _ASM_NOKPROBE(__get_user_bad8)
|
||||||
.pushsection __ex_table, "a"
|
.pushsection __ex_table, "a"
|
||||||
.long 1b, __get_user_bad
|
.long 1b, __get_user_bad
|
||||||
.long 2b, __get_user_bad
|
.long 2b, __get_user_bad
|
||||||
|
#if __LINUX_ARM_ARCH__ < 6
|
||||||
.long 3b, __get_user_bad
|
.long 3b, __get_user_bad
|
||||||
|
#endif
|
||||||
.long 4b, __get_user_bad
|
.long 4b, __get_user_bad
|
||||||
.long 5b, __get_user_bad8
|
.long 5b, __get_user_bad8
|
||||||
.long 6b, __get_user_bad8
|
.long 6b, __get_user_bad8
|
||||||
|
|
|
||||||
|
|
@ -41,16 +41,13 @@ ENDPROC(__put_user_1)
|
||||||
|
|
||||||
ENTRY(__put_user_2)
|
ENTRY(__put_user_2)
|
||||||
check_uaccess r0, 2, r1, ip, __put_user_bad
|
check_uaccess r0, 2, r1, ip, __put_user_bad
|
||||||
mov ip, r2, lsr #8
|
#if __LINUX_ARM_ARCH__ >= 6
|
||||||
#ifdef CONFIG_THUMB2_KERNEL
|
|
||||||
#ifndef __ARMEB__
|
2: TUSER(strh) r2, [r0]
|
||||||
2: TUSER(strb) r2, [r0]
|
|
||||||
3: TUSER(strb) ip, [r0, #1]
|
|
||||||
#else
|
#else
|
||||||
2: TUSER(strb) ip, [r0]
|
|
||||||
3: TUSER(strb) r2, [r0, #1]
|
mov ip, r2, lsr #8
|
||||||
#endif
|
|
||||||
#else /* !CONFIG_THUMB2_KERNEL */
|
|
||||||
#ifndef __ARMEB__
|
#ifndef __ARMEB__
|
||||||
2: TUSER(strb) r2, [r0], #1
|
2: TUSER(strb) r2, [r0], #1
|
||||||
3: TUSER(strb) ip, [r0]
|
3: TUSER(strb) ip, [r0]
|
||||||
|
|
@ -58,7 +55,8 @@ ENTRY(__put_user_2)
|
||||||
2: TUSER(strb) ip, [r0], #1
|
2: TUSER(strb) ip, [r0], #1
|
||||||
3: TUSER(strb) r2, [r0]
|
3: TUSER(strb) r2, [r0]
|
||||||
#endif
|
#endif
|
||||||
#endif /* CONFIG_THUMB2_KERNEL */
|
|
||||||
|
#endif /* __LINUX_ARM_ARCH__ >= 6 */
|
||||||
mov r0, #0
|
mov r0, #0
|
||||||
ret lr
|
ret lr
|
||||||
ENDPROC(__put_user_2)
|
ENDPROC(__put_user_2)
|
||||||
|
|
@ -91,7 +89,9 @@ ENDPROC(__put_user_bad)
|
||||||
.pushsection __ex_table, "a"
|
.pushsection __ex_table, "a"
|
||||||
.long 1b, __put_user_bad
|
.long 1b, __put_user_bad
|
||||||
.long 2b, __put_user_bad
|
.long 2b, __put_user_bad
|
||||||
|
#if __LINUX_ARM_ARCH__ < 6
|
||||||
.long 3b, __put_user_bad
|
.long 3b, __put_user_bad
|
||||||
|
#endif
|
||||||
.long 4b, __put_user_bad
|
.long 4b, __put_user_bad
|
||||||
.long 5b, __put_user_bad
|
.long 5b, __put_user_bad
|
||||||
.long 6b, __put_user_bad
|
.long 6b, __put_user_bad
|
||||||
|
|
|
||||||
|
|
@ -200,10 +200,10 @@ void __init omap_check_revision(void)
|
||||||
printk(KERN_INFO "Unknown OMAP cpu type: 0x%02x\n", cpu_type);
|
printk(KERN_INFO "Unknown OMAP cpu type: 0x%02x\n", cpu_type);
|
||||||
}
|
}
|
||||||
|
|
||||||
printk(KERN_INFO "OMAP%04x", omap_revision >> 16);
|
pr_info("OMAP%04x", omap_revision >> 16);
|
||||||
if ((omap_revision >> 8) & 0xff)
|
if ((omap_revision >> 8) & 0xff)
|
||||||
printk(KERN_INFO "%x", (omap_revision >> 8) & 0xff);
|
pr_cont("%x", (omap_revision >> 8) & 0xff);
|
||||||
printk(KERN_INFO " revision %i handled as %02xxx id: %08x%08x\n",
|
pr_cont(" revision %i handled as %02xxx id: %08x%08x\n",
|
||||||
die_rev, omap_revision & 0xff, system_serial_low,
|
die_rev, omap_revision & 0xff, system_serial_low,
|
||||||
system_serial_high);
|
system_serial_high);
|
||||||
}
|
}
|
||||||
|
|
|
||||||
|
|
@ -199,8 +199,8 @@ void __init omap2xxx_check_revision(void)
|
||||||
|
|
||||||
pr_info("%s", soc_name);
|
pr_info("%s", soc_name);
|
||||||
if ((omap_rev() >> 8) & 0x0f)
|
if ((omap_rev() >> 8) & 0x0f)
|
||||||
pr_info("%s", soc_rev);
|
pr_cont("%s", soc_rev);
|
||||||
pr_info("\n");
|
pr_cont("\n");
|
||||||
}
|
}
|
||||||
|
|
||||||
#define OMAP3_SHOW_FEATURE(feat) \
|
#define OMAP3_SHOW_FEATURE(feat) \
|
||||||
|
|
|
||||||
|
|
@ -191,7 +191,7 @@
|
||||||
pinctrl-names = "default";
|
pinctrl-names = "default";
|
||||||
};
|
};
|
||||||
|
|
||||||
&pinctrl_aobus {
|
&gpio_ao {
|
||||||
gpio-line-names = "UART TX", "UART RX", "Power Control", "Power Key In",
|
gpio-line-names = "UART TX", "UART RX", "Power Control", "Power Key In",
|
||||||
"VCCK En", "CON1 Header Pin31",
|
"VCCK En", "CON1 Header Pin31",
|
||||||
"I2S Header Pin6", "IR In", "I2S Header Pin7",
|
"I2S Header Pin6", "IR In", "I2S Header Pin7",
|
||||||
|
|
@ -201,7 +201,7 @@
|
||||||
"";
|
"";
|
||||||
};
|
};
|
||||||
|
|
||||||
&pinctrl_periphs {
|
&gpio {
|
||||||
gpio-line-names = /* Bank GPIOZ */
|
gpio-line-names = /* Bank GPIOZ */
|
||||||
"Eth MDIO", "Eth MDC", "Eth RGMII RX Clk",
|
"Eth MDIO", "Eth MDC", "Eth RGMII RX Clk",
|
||||||
"Eth RX DV", "Eth RX D0", "Eth RX D1", "Eth RX D2",
|
"Eth RX DV", "Eth RX D0", "Eth RX D1", "Eth RX D2",
|
||||||
|
|
|
||||||
|
|
@ -187,7 +187,7 @@
|
||||||
pinctrl-names = "default";
|
pinctrl-names = "default";
|
||||||
};
|
};
|
||||||
|
|
||||||
&pinctrl_aobus {
|
&gpio_ao {
|
||||||
gpio-line-names = "UART TX", "UART RX", "VCCK En", "TF 3V3/1V8 En",
|
gpio-line-names = "UART TX", "UART RX", "VCCK En", "TF 3V3/1V8 En",
|
||||||
"USB HUB nRESET", "USB OTG Power En",
|
"USB HUB nRESET", "USB OTG Power En",
|
||||||
"J7 Header Pin2", "IR In", "J7 Header Pin4",
|
"J7 Header Pin2", "IR In", "J7 Header Pin4",
|
||||||
|
|
@ -197,7 +197,7 @@
|
||||||
"";
|
"";
|
||||||
};
|
};
|
||||||
|
|
||||||
&pinctrl_periphs {
|
&gpio {
|
||||||
gpio-line-names = /* Bank GPIOZ */
|
gpio-line-names = /* Bank GPIOZ */
|
||||||
"Eth MDIO", "Eth MDC", "Eth RGMII RX Clk",
|
"Eth MDIO", "Eth MDC", "Eth RGMII RX Clk",
|
||||||
"Eth RX DV", "Eth RX D0", "Eth RX D1", "Eth RX D2",
|
"Eth RX DV", "Eth RX D0", "Eth RX D1", "Eth RX D2",
|
||||||
|
|
|
||||||
|
|
@ -112,7 +112,7 @@
|
||||||
linux,rc-map-name = "rc-geekbox";
|
linux,rc-map-name = "rc-geekbox";
|
||||||
};
|
};
|
||||||
|
|
||||||
&pinctrl_aobus {
|
&gpio_ao {
|
||||||
gpio-line-names = "UART TX",
|
gpio-line-names = "UART TX",
|
||||||
"UART RX",
|
"UART RX",
|
||||||
"Power Key In",
|
"Power Key In",
|
||||||
|
|
@ -127,7 +127,7 @@
|
||||||
"";
|
"";
|
||||||
};
|
};
|
||||||
|
|
||||||
&pinctrl_periphs {
|
&gpio {
|
||||||
gpio-line-names = /* Bank GPIOZ */
|
gpio-line-names = /* Bank GPIOZ */
|
||||||
"", "", "", "", "", "", "",
|
"", "", "", "", "", "", "",
|
||||||
"", "", "", "", "", "", "",
|
"", "", "", "", "", "", "",
|
||||||
|
|
|
||||||
|
|
@ -163,7 +163,7 @@
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
||||||
&pinctrl_aobus {
|
&gpio_ao {
|
||||||
gpio-line-names = "UART TX",
|
gpio-line-names = "UART TX",
|
||||||
"UART RX",
|
"UART RX",
|
||||||
"Blue LED",
|
"Blue LED",
|
||||||
|
|
@ -178,7 +178,7 @@
|
||||||
"7J1 Header Pin15";
|
"7J1 Header Pin15";
|
||||||
};
|
};
|
||||||
|
|
||||||
&pinctrl_periphs {
|
&gpio {
|
||||||
gpio-line-names = /* Bank GPIOZ */
|
gpio-line-names = /* Bank GPIOZ */
|
||||||
"", "", "", "", "", "", "",
|
"", "", "", "", "", "", "",
|
||||||
"", "", "", "", "", "", "",
|
"", "", "", "", "", "", "",
|
||||||
|
|
|
||||||
|
|
@ -18,8 +18,8 @@
|
||||||
|
|
||||||
/ {
|
/ {
|
||||||
compatible = "samsung,exynos5433";
|
compatible = "samsung,exynos5433";
|
||||||
#address-cells = <1>;
|
#address-cells = <2>;
|
||||||
#size-cells = <1>;
|
#size-cells = <2>;
|
||||||
|
|
||||||
interrupt-parent = <&gic>;
|
interrupt-parent = <&gic>;
|
||||||
|
|
||||||
|
|
@ -235,7 +235,7 @@
|
||||||
compatible = "simple-bus";
|
compatible = "simple-bus";
|
||||||
#address-cells = <1>;
|
#address-cells = <1>;
|
||||||
#size-cells = <1>;
|
#size-cells = <1>;
|
||||||
ranges;
|
ranges = <0x0 0x0 0x0 0x18000000>;
|
||||||
|
|
||||||
arm_a53_pmu {
|
arm_a53_pmu {
|
||||||
compatible = "arm,cortex-a53-pmu", "arm,armv8-pmuv3";
|
compatible = "arm,cortex-a53-pmu", "arm,armv8-pmuv3";
|
||||||
|
|
|
||||||
|
|
@ -12,8 +12,8 @@
|
||||||
/ {
|
/ {
|
||||||
compatible = "samsung,exynos7";
|
compatible = "samsung,exynos7";
|
||||||
interrupt-parent = <&gic>;
|
interrupt-parent = <&gic>;
|
||||||
#address-cells = <1>;
|
#address-cells = <2>;
|
||||||
#size-cells = <1>;
|
#size-cells = <2>;
|
||||||
|
|
||||||
aliases {
|
aliases {
|
||||||
pinctrl0 = &pinctrl_alive;
|
pinctrl0 = &pinctrl_alive;
|
||||||
|
|
@ -70,7 +70,7 @@
|
||||||
compatible = "simple-bus";
|
compatible = "simple-bus";
|
||||||
#address-cells = <1>;
|
#address-cells = <1>;
|
||||||
#size-cells = <1>;
|
#size-cells = <1>;
|
||||||
ranges;
|
ranges = <0 0 0 0x18000000>;
|
||||||
|
|
||||||
chipid@10000000 {
|
chipid@10000000 {
|
||||||
compatible = "samsung,exynos4210-chipid";
|
compatible = "samsung,exynos4210-chipid";
|
||||||
|
|
|
||||||
|
|
@ -1589,7 +1589,7 @@
|
||||||
regulator-name = "VDD_HDMI_5V0";
|
regulator-name = "VDD_HDMI_5V0";
|
||||||
regulator-min-microvolt = <5000000>;
|
regulator-min-microvolt = <5000000>;
|
||||||
regulator-max-microvolt = <5000000>;
|
regulator-max-microvolt = <5000000>;
|
||||||
gpio = <&exp1 12 GPIO_ACTIVE_LOW>;
|
gpio = <&exp1 12 GPIO_ACTIVE_HIGH>;
|
||||||
enable-active-high;
|
enable-active-high;
|
||||||
vin-supply = <&vdd_5v0_sys>;
|
vin-supply = <&vdd_5v0_sys>;
|
||||||
};
|
};
|
||||||
|
|
|
||||||
|
|
@ -58,13 +58,13 @@
|
||||||
clock-accuracy = <100>;
|
clock-accuracy = <100>;
|
||||||
};
|
};
|
||||||
|
|
||||||
dpdma_clk: dpdma_clk {
|
dpdma_clk: dpdma-clk {
|
||||||
compatible = "fixed-clock";
|
compatible = "fixed-clock";
|
||||||
#clock-cells = <0x0>;
|
#clock-cells = <0x0>;
|
||||||
clock-frequency = <533000000>;
|
clock-frequency = <533000000>;
|
||||||
};
|
};
|
||||||
|
|
||||||
drm_clock: drm_clock {
|
drm_clock: drm-clock {
|
||||||
compatible = "fixed-clock";
|
compatible = "fixed-clock";
|
||||||
#clock-cells = <0x0>;
|
#clock-cells = <0x0>;
|
||||||
clock-frequency = <262750000>;
|
clock-frequency = <262750000>;
|
||||||
|
|
|
||||||
|
|
@ -82,7 +82,7 @@
|
||||||
linux,default-trigger = "bluetooth-power";
|
linux,default-trigger = "bluetooth-power";
|
||||||
};
|
};
|
||||||
|
|
||||||
vbus_det { /* U5 USB5744 VBUS detection via MIO25 */
|
vbus-det { /* U5 USB5744 VBUS detection via MIO25 */
|
||||||
label = "vbus_det";
|
label = "vbus_det";
|
||||||
gpios = <&gpio 25 GPIO_ACTIVE_HIGH>;
|
gpios = <&gpio 25 GPIO_ACTIVE_HIGH>;
|
||||||
default-state = "on";
|
default-state = "on";
|
||||||
|
|
@ -98,7 +98,7 @@
|
||||||
regulator-boot-on;
|
regulator-boot-on;
|
||||||
};
|
};
|
||||||
|
|
||||||
sdio_pwrseq: sdio_pwrseq {
|
sdio_pwrseq: sdio-pwrseq {
|
||||||
compatible = "mmc-pwrseq-simple";
|
compatible = "mmc-pwrseq-simple";
|
||||||
reset-gpios = <&gpio 7 GPIO_ACTIVE_LOW>; /* WIFI_EN */
|
reset-gpios = <&gpio 7 GPIO_ACTIVE_LOW>; /* WIFI_EN */
|
||||||
post-power-on-delay-ms = <10>;
|
post-power-on-delay-ms = <10>;
|
||||||
|
|
|
||||||
|
|
@ -53,7 +53,7 @@
|
||||||
|
|
||||||
leds {
|
leds {
|
||||||
compatible = "gpio-leds";
|
compatible = "gpio-leds";
|
||||||
heartbeat_led {
|
heartbeat-led {
|
||||||
label = "heartbeat";
|
label = "heartbeat";
|
||||||
gpios = <&gpio 23 GPIO_ACTIVE_HIGH>;
|
gpios = <&gpio 23 GPIO_ACTIVE_HIGH>;
|
||||||
linux,default-trigger = "heartbeat";
|
linux,default-trigger = "heartbeat";
|
||||||
|
|
@ -139,25 +139,25 @@
|
||||||
* 7, 10 - 17 - not connected
|
* 7, 10 - 17 - not connected
|
||||||
*/
|
*/
|
||||||
|
|
||||||
gtr_sel0 {
|
gtr-sel0 {
|
||||||
gpio-hog;
|
gpio-hog;
|
||||||
gpios = <0 0>;
|
gpios = <0 0>;
|
||||||
output-low; /* PCIE = 0, DP = 1 */
|
output-low; /* PCIE = 0, DP = 1 */
|
||||||
line-name = "sel0";
|
line-name = "sel0";
|
||||||
};
|
};
|
||||||
gtr_sel1 {
|
gtr-sel1 {
|
||||||
gpio-hog;
|
gpio-hog;
|
||||||
gpios = <1 0>;
|
gpios = <1 0>;
|
||||||
output-high; /* PCIE = 0, DP = 1 */
|
output-high; /* PCIE = 0, DP = 1 */
|
||||||
line-name = "sel1";
|
line-name = "sel1";
|
||||||
};
|
};
|
||||||
gtr_sel2 {
|
gtr-sel2 {
|
||||||
gpio-hog;
|
gpio-hog;
|
||||||
gpios = <2 0>;
|
gpios = <2 0>;
|
||||||
output-high; /* PCIE = 0, USB0 = 1 */
|
output-high; /* PCIE = 0, USB0 = 1 */
|
||||||
line-name = "sel2";
|
line-name = "sel2";
|
||||||
};
|
};
|
||||||
gtr_sel3 {
|
gtr-sel3 {
|
||||||
gpio-hog;
|
gpio-hog;
|
||||||
gpios = <3 0>;
|
gpios = <3 0>;
|
||||||
output-high; /* PCIE = 0, SATA = 1 */
|
output-high; /* PCIE = 0, SATA = 1 */
|
||||||
|
|
|
||||||
|
|
@ -53,7 +53,7 @@
|
||||||
|
|
||||||
leds {
|
leds {
|
||||||
compatible = "gpio-leds";
|
compatible = "gpio-leds";
|
||||||
heartbeat_led {
|
heartbeat-led {
|
||||||
label = "heartbeat";
|
label = "heartbeat";
|
||||||
gpios = <&gpio 23 GPIO_ACTIVE_HIGH>;
|
gpios = <&gpio 23 GPIO_ACTIVE_HIGH>;
|
||||||
linux,default-trigger = "heartbeat";
|
linux,default-trigger = "heartbeat";
|
||||||
|
|
|
||||||
|
|
@ -53,7 +53,7 @@
|
||||||
|
|
||||||
leds {
|
leds {
|
||||||
compatible = "gpio-leds";
|
compatible = "gpio-leds";
|
||||||
heartbeat_led {
|
heartbeat-led {
|
||||||
label = "heartbeat";
|
label = "heartbeat";
|
||||||
gpios = <&gpio 23 GPIO_ACTIVE_HIGH>;
|
gpios = <&gpio 23 GPIO_ACTIVE_HIGH>;
|
||||||
linux,default-trigger = "heartbeat";
|
linux,default-trigger = "heartbeat";
|
||||||
|
|
|
||||||
|
|
@ -71,7 +71,7 @@
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
||||||
cpu_opp_table: cpu_opp_table {
|
cpu_opp_table: cpu-opp-table {
|
||||||
compatible = "operating-points-v2";
|
compatible = "operating-points-v2";
|
||||||
opp-shared;
|
opp-shared;
|
||||||
opp00 {
|
opp00 {
|
||||||
|
|
@ -124,7 +124,7 @@
|
||||||
<1 10 0xf08>;
|
<1 10 0xf08>;
|
||||||
};
|
};
|
||||||
|
|
||||||
amba_apu: amba_apu@0 {
|
amba_apu: amba-apu@0 {
|
||||||
compatible = "simple-bus";
|
compatible = "simple-bus";
|
||||||
#address-cells = <2>;
|
#address-cells = <2>;
|
||||||
#size-cells = <1>;
|
#size-cells = <1>;
|
||||||
|
|
|
||||||
|
|
@ -806,6 +806,7 @@ config SIBYTE_LITTLESUR
|
||||||
select SYS_SUPPORTS_BIG_ENDIAN
|
select SYS_SUPPORTS_BIG_ENDIAN
|
||||||
select SYS_SUPPORTS_HIGHMEM
|
select SYS_SUPPORTS_HIGHMEM
|
||||||
select SYS_SUPPORTS_LITTLE_ENDIAN
|
select SYS_SUPPORTS_LITTLE_ENDIAN
|
||||||
|
select ZONE_DMA32 if 64BIT
|
||||||
|
|
||||||
config SIBYTE_SENTOSA
|
config SIBYTE_SENTOSA
|
||||||
bool "Sibyte BCM91250E-Sentosa"
|
bool "Sibyte BCM91250E-Sentosa"
|
||||||
|
|
|
||||||
|
|
@ -266,7 +266,7 @@ int cvmx_cmd_queue_length(cvmx_cmd_queue_id_t queue_id)
|
||||||
} else {
|
} else {
|
||||||
union cvmx_pko_mem_debug8 debug8;
|
union cvmx_pko_mem_debug8 debug8;
|
||||||
debug8.u64 = cvmx_read_csr(CVMX_PKO_MEM_DEBUG8);
|
debug8.u64 = cvmx_read_csr(CVMX_PKO_MEM_DEBUG8);
|
||||||
return debug8.cn58xx.doorbell;
|
return debug8.cn50xx.doorbell;
|
||||||
}
|
}
|
||||||
case CVMX_CMD_QUEUE_ZIP:
|
case CVMX_CMD_QUEUE_ZIP:
|
||||||
case CVMX_CMD_QUEUE_DFA:
|
case CVMX_CMD_QUEUE_DFA:
|
||||||
|
|
|
||||||
|
|
@ -501,7 +501,7 @@ static void __init octeon_fdt_set_phy(int eth, int phy_addr)
|
||||||
if (phy_addr >= 256 && alt_phy > 0) {
|
if (phy_addr >= 256 && alt_phy > 0) {
|
||||||
const struct fdt_property *phy_prop;
|
const struct fdt_property *phy_prop;
|
||||||
struct fdt_property *alt_prop;
|
struct fdt_property *alt_prop;
|
||||||
u32 phy_handle_name;
|
fdt32_t phy_handle_name;
|
||||||
|
|
||||||
/* Use the alt phy node instead.*/
|
/* Use the alt phy node instead.*/
|
||||||
phy_prop = fdt_get_property(initial_boot_params, eth, "phy-handle", NULL);
|
phy_prop = fdt_get_property(initial_boot_params, eth, "phy-handle", NULL);
|
||||||
|
|
|
||||||
|
|
@ -611,7 +611,7 @@ static inline void cvmx_pko_get_port_status(uint64_t port_num, uint64_t clear,
|
||||||
pko_reg_read_idx.s.index = cvmx_pko_get_base_queue(port_num);
|
pko_reg_read_idx.s.index = cvmx_pko_get_base_queue(port_num);
|
||||||
cvmx_write_csr(CVMX_PKO_REG_READ_IDX, pko_reg_read_idx.u64);
|
cvmx_write_csr(CVMX_PKO_REG_READ_IDX, pko_reg_read_idx.u64);
|
||||||
debug8.u64 = cvmx_read_csr(CVMX_PKO_MEM_DEBUG8);
|
debug8.u64 = cvmx_read_csr(CVMX_PKO_MEM_DEBUG8);
|
||||||
status->doorbell = debug8.cn58xx.doorbell;
|
status->doorbell = debug8.cn50xx.doorbell;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -71,8 +71,9 @@ static const char *hwcap_str[] = {
|
||||||
"div",
|
"div",
|
||||||
"mac",
|
"mac",
|
||||||
"l2c",
|
"l2c",
|
||||||
"dx_regs",
|
"fpu_dp",
|
||||||
"v2",
|
"v2",
|
||||||
|
"dx_regs",
|
||||||
NULL,
|
NULL,
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -213,30 +213,18 @@
|
||||||
* respectively. The result is placed in HIGH_SUM and LOW_SUM. Overflow
|
* respectively. The result is placed in HIGH_SUM and LOW_SUM. Overflow
|
||||||
* (i.e. carry out) is not stored anywhere, and is lost.
|
* (i.e. carry out) is not stored anywhere, and is lost.
|
||||||
*/
|
*/
|
||||||
#define add_ssaaaa(sh, sl, ah, al, bh, bl) \
|
#define add_ssaaaa(sh, sl, ah, al, bh, bl) \
|
||||||
do { \
|
do { \
|
||||||
if (__builtin_constant_p (bh) && (bh) == 0) \
|
if (__builtin_constant_p (bh) && (bh) == 0) \
|
||||||
__asm__ ("{a%I4|add%I4c} %1,%3,%4\n\t{aze|addze} %0,%2" \
|
__asm__ ("add%I4c %1,%3,%4\n\taddze %0,%2" \
|
||||||
: "=r" ((USItype)(sh)), \
|
: "=r" (sh), "=&r" (sl) : "r" (ah), "%r" (al), "rI" (bl));\
|
||||||
"=&r" ((USItype)(sl)) \
|
else if (__builtin_constant_p (bh) && (bh) == ~(USItype) 0) \
|
||||||
: "%r" ((USItype)(ah)), \
|
__asm__ ("add%I4c %1,%3,%4\n\taddme %0,%2" \
|
||||||
"%r" ((USItype)(al)), \
|
: "=r" (sh), "=&r" (sl) : "r" (ah), "%r" (al), "rI" (bl));\
|
||||||
"rI" ((USItype)(bl))); \
|
|
||||||
else if (__builtin_constant_p (bh) && (bh) ==~(USItype) 0) \
|
|
||||||
__asm__ ("{a%I4|add%I4c} %1,%3,%4\n\t{ame|addme} %0,%2" \
|
|
||||||
: "=r" ((USItype)(sh)), \
|
|
||||||
"=&r" ((USItype)(sl)) \
|
|
||||||
: "%r" ((USItype)(ah)), \
|
|
||||||
"%r" ((USItype)(al)), \
|
|
||||||
"rI" ((USItype)(bl))); \
|
|
||||||
else \
|
else \
|
||||||
__asm__ ("{a%I5|add%I5c} %1,%4,%5\n\t{ae|adde} %0,%2,%3" \
|
__asm__ ("add%I5c %1,%4,%5\n\tadde %0,%2,%3" \
|
||||||
: "=r" ((USItype)(sh)), \
|
: "=r" (sh), "=&r" (sl) \
|
||||||
"=&r" ((USItype)(sl)) \
|
: "%r" (ah), "r" (bh), "%r" (al), "rI" (bl)); \
|
||||||
: "%r" ((USItype)(ah)), \
|
|
||||||
"r" ((USItype)(bh)), \
|
|
||||||
"%r" ((USItype)(al)), \
|
|
||||||
"rI" ((USItype)(bl))); \
|
|
||||||
} while (0)
|
} while (0)
|
||||||
|
|
||||||
/* sub_ddmmss is used in op-2.h and udivmodti4.c and should be equivalent to
|
/* sub_ddmmss is used in op-2.h and udivmodti4.c and should be equivalent to
|
||||||
|
|
@ -248,44 +236,24 @@
|
||||||
* and LOW_DIFFERENCE. Overflow (i.e. carry out) is not stored anywhere,
|
* and LOW_DIFFERENCE. Overflow (i.e. carry out) is not stored anywhere,
|
||||||
* and is lost.
|
* and is lost.
|
||||||
*/
|
*/
|
||||||
#define sub_ddmmss(sh, sl, ah, al, bh, bl) \
|
#define sub_ddmmss(sh, sl, ah, al, bh, bl) \
|
||||||
do { \
|
do { \
|
||||||
if (__builtin_constant_p (ah) && (ah) == 0) \
|
if (__builtin_constant_p (ah) && (ah) == 0) \
|
||||||
__asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{sfze|subfze} %0,%2" \
|
__asm__ ("subf%I3c %1,%4,%3\n\tsubfze %0,%2" \
|
||||||
: "=r" ((USItype)(sh)), \
|
: "=r" (sh), "=&r" (sl) : "r" (bh), "rI" (al), "r" (bl));\
|
||||||
"=&r" ((USItype)(sl)) \
|
else if (__builtin_constant_p (ah) && (ah) == ~(USItype) 0) \
|
||||||
: "r" ((USItype)(bh)), \
|
__asm__ ("subf%I3c %1,%4,%3\n\tsubfme %0,%2" \
|
||||||
"rI" ((USItype)(al)), \
|
: "=r" (sh), "=&r" (sl) : "r" (bh), "rI" (al), "r" (bl));\
|
||||||
"r" ((USItype)(bl))); \
|
|
||||||
else if (__builtin_constant_p (ah) && (ah) ==~(USItype) 0) \
|
|
||||||
__asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{sfme|subfme} %0,%2" \
|
|
||||||
: "=r" ((USItype)(sh)), \
|
|
||||||
"=&r" ((USItype)(sl)) \
|
|
||||||
: "r" ((USItype)(bh)), \
|
|
||||||
"rI" ((USItype)(al)), \
|
|
||||||
"r" ((USItype)(bl))); \
|
|
||||||
else if (__builtin_constant_p (bh) && (bh) == 0) \
|
else if (__builtin_constant_p (bh) && (bh) == 0) \
|
||||||
__asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{ame|addme} %0,%2" \
|
__asm__ ("subf%I3c %1,%4,%3\n\taddme %0,%2" \
|
||||||
: "=r" ((USItype)(sh)), \
|
: "=r" (sh), "=&r" (sl) : "r" (ah), "rI" (al), "r" (bl));\
|
||||||
"=&r" ((USItype)(sl)) \
|
else if (__builtin_constant_p (bh) && (bh) == ~(USItype) 0) \
|
||||||
: "r" ((USItype)(ah)), \
|
__asm__ ("subf%I3c %1,%4,%3\n\taddze %0,%2" \
|
||||||
"rI" ((USItype)(al)), \
|
: "=r" (sh), "=&r" (sl) : "r" (ah), "rI" (al), "r" (bl));\
|
||||||
"r" ((USItype)(bl))); \
|
|
||||||
else if (__builtin_constant_p (bh) && (bh) ==~(USItype) 0) \
|
|
||||||
__asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{aze|addze} %0,%2" \
|
|
||||||
: "=r" ((USItype)(sh)), \
|
|
||||||
"=&r" ((USItype)(sl)) \
|
|
||||||
: "r" ((USItype)(ah)), \
|
|
||||||
"rI" ((USItype)(al)), \
|
|
||||||
"r" ((USItype)(bl))); \
|
|
||||||
else \
|
else \
|
||||||
__asm__ ("{sf%I4|subf%I4c} %1,%5,%4\n\t{sfe|subfe} %0,%3,%2" \
|
__asm__ ("subf%I4c %1,%5,%4\n\tsubfe %0,%3,%2" \
|
||||||
: "=r" ((USItype)(sh)), \
|
: "=r" (sh), "=&r" (sl) \
|
||||||
"=&r" ((USItype)(sl)) \
|
: "r" (ah), "r" (bh), "rI" (al), "r" (bl)); \
|
||||||
: "r" ((USItype)(ah)), \
|
|
||||||
"r" ((USItype)(bh)), \
|
|
||||||
"rI" ((USItype)(al)), \
|
|
||||||
"r" ((USItype)(bl))); \
|
|
||||||
} while (0)
|
} while (0)
|
||||||
|
|
||||||
/* asm fragments for mul and div */
|
/* asm fragments for mul and div */
|
||||||
|
|
@ -294,13 +262,10 @@
|
||||||
* UWtype integers MULTIPLER and MULTIPLICAND, and generates a two UWtype
|
* UWtype integers MULTIPLER and MULTIPLICAND, and generates a two UWtype
|
||||||
* word product in HIGH_PROD and LOW_PROD.
|
* word product in HIGH_PROD and LOW_PROD.
|
||||||
*/
|
*/
|
||||||
#define umul_ppmm(ph, pl, m0, m1) \
|
#define umul_ppmm(ph, pl, m0, m1) \
|
||||||
do { \
|
do { \
|
||||||
USItype __m0 = (m0), __m1 = (m1); \
|
USItype __m0 = (m0), __m1 = (m1); \
|
||||||
__asm__ ("mulhwu %0,%1,%2" \
|
__asm__ ("mulhwu %0,%1,%2" : "=r" (ph) : "%r" (m0), "r" (m1)); \
|
||||||
: "=r" ((USItype)(ph)) \
|
|
||||||
: "%r" (__m0), \
|
|
||||||
"r" (__m1)); \
|
|
||||||
(pl) = __m0 * __m1; \
|
(pl) = __m0 * __m1; \
|
||||||
} while (0)
|
} while (0)
|
||||||
|
|
||||||
|
|
@ -312,9 +277,10 @@
|
||||||
* significant bit of DENOMINATOR must be 1, then the pre-processor symbol
|
* significant bit of DENOMINATOR must be 1, then the pre-processor symbol
|
||||||
* UDIV_NEEDS_NORMALIZATION is defined to 1.
|
* UDIV_NEEDS_NORMALIZATION is defined to 1.
|
||||||
*/
|
*/
|
||||||
#define udiv_qrnnd(q, r, n1, n0, d) \
|
#define udiv_qrnnd(q, r, n1, n0, d) \
|
||||||
do { \
|
do { \
|
||||||
UWtype __d1, __d0, __q1, __q0, __r1, __r0, __m; \
|
UWtype __d1, __d0, __q1, __q0; \
|
||||||
|
UWtype __r1, __r0, __m; \
|
||||||
__d1 = __ll_highpart (d); \
|
__d1 = __ll_highpart (d); \
|
||||||
__d0 = __ll_lowpart (d); \
|
__d0 = __ll_lowpart (d); \
|
||||||
\
|
\
|
||||||
|
|
@ -325,7 +291,7 @@
|
||||||
if (__r1 < __m) \
|
if (__r1 < __m) \
|
||||||
{ \
|
{ \
|
||||||
__q1--, __r1 += (d); \
|
__q1--, __r1 += (d); \
|
||||||
if (__r1 >= (d)) /* we didn't get carry when adding to __r1 */ \
|
if (__r1 >= (d)) /* i.e. we didn't get carry when adding to __r1 */\
|
||||||
if (__r1 < __m) \
|
if (__r1 < __m) \
|
||||||
__q1--, __r1 += (d); \
|
__q1--, __r1 += (d); \
|
||||||
} \
|
} \
|
||||||
|
|
|
||||||
|
|
@ -409,6 +409,7 @@ static inline void __iomem *ioremap(unsigned long offset, unsigned long size)
|
||||||
}
|
}
|
||||||
|
|
||||||
#define ioremap_nocache(X,Y) ioremap((X),(Y))
|
#define ioremap_nocache(X,Y) ioremap((X),(Y))
|
||||||
|
#define ioremap_uc(X,Y) ioremap((X),(Y))
|
||||||
#define ioremap_wc(X,Y) ioremap((X),(Y))
|
#define ioremap_wc(X,Y) ioremap((X),(Y))
|
||||||
#define ioremap_wt(X,Y) ioremap((X),(Y))
|
#define ioremap_wt(X,Y) ioremap((X),(Y))
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -1270,6 +1270,9 @@ static int build_insn(const struct bpf_insn *insn, struct jit_ctx *ctx)
|
||||||
const u8 tmp2 = bpf2sparc[TMP_REG_2];
|
const u8 tmp2 = bpf2sparc[TMP_REG_2];
|
||||||
u32 opcode = 0, rs2;
|
u32 opcode = 0, rs2;
|
||||||
|
|
||||||
|
if (insn->dst_reg == BPF_REG_FP)
|
||||||
|
ctx->saw_frame_pointer = true;
|
||||||
|
|
||||||
ctx->tmp_2_used = true;
|
ctx->tmp_2_used = true;
|
||||||
emit_loadimm(imm, tmp2, ctx);
|
emit_loadimm(imm, tmp2, ctx);
|
||||||
|
|
||||||
|
|
@ -1308,6 +1311,9 @@ static int build_insn(const struct bpf_insn *insn, struct jit_ctx *ctx)
|
||||||
const u8 tmp = bpf2sparc[TMP_REG_1];
|
const u8 tmp = bpf2sparc[TMP_REG_1];
|
||||||
u32 opcode = 0, rs2;
|
u32 opcode = 0, rs2;
|
||||||
|
|
||||||
|
if (insn->dst_reg == BPF_REG_FP)
|
||||||
|
ctx->saw_frame_pointer = true;
|
||||||
|
|
||||||
switch (BPF_SIZE(code)) {
|
switch (BPF_SIZE(code)) {
|
||||||
case BPF_W:
|
case BPF_W:
|
||||||
opcode = ST32;
|
opcode = ST32;
|
||||||
|
|
@ -1340,6 +1346,9 @@ static int build_insn(const struct bpf_insn *insn, struct jit_ctx *ctx)
|
||||||
const u8 tmp2 = bpf2sparc[TMP_REG_2];
|
const u8 tmp2 = bpf2sparc[TMP_REG_2];
|
||||||
const u8 tmp3 = bpf2sparc[TMP_REG_3];
|
const u8 tmp3 = bpf2sparc[TMP_REG_3];
|
||||||
|
|
||||||
|
if (insn->dst_reg == BPF_REG_FP)
|
||||||
|
ctx->saw_frame_pointer = true;
|
||||||
|
|
||||||
ctx->tmp_1_used = true;
|
ctx->tmp_1_used = true;
|
||||||
ctx->tmp_2_used = true;
|
ctx->tmp_2_used = true;
|
||||||
ctx->tmp_3_used = true;
|
ctx->tmp_3_used = true;
|
||||||
|
|
@ -1360,6 +1369,9 @@ static int build_insn(const struct bpf_insn *insn, struct jit_ctx *ctx)
|
||||||
const u8 tmp2 = bpf2sparc[TMP_REG_2];
|
const u8 tmp2 = bpf2sparc[TMP_REG_2];
|
||||||
const u8 tmp3 = bpf2sparc[TMP_REG_3];
|
const u8 tmp3 = bpf2sparc[TMP_REG_3];
|
||||||
|
|
||||||
|
if (insn->dst_reg == BPF_REG_FP)
|
||||||
|
ctx->saw_frame_pointer = true;
|
||||||
|
|
||||||
ctx->tmp_1_used = true;
|
ctx->tmp_1_used = true;
|
||||||
ctx->tmp_2_used = true;
|
ctx->tmp_2_used = true;
|
||||||
ctx->tmp_3_used = true;
|
ctx->tmp_3_used = true;
|
||||||
|
|
@ -1425,12 +1437,12 @@ struct bpf_prog *bpf_int_jit_compile(struct bpf_prog *prog)
|
||||||
struct bpf_prog *tmp, *orig_prog = prog;
|
struct bpf_prog *tmp, *orig_prog = prog;
|
||||||
struct sparc64_jit_data *jit_data;
|
struct sparc64_jit_data *jit_data;
|
||||||
struct bpf_binary_header *header;
|
struct bpf_binary_header *header;
|
||||||
|
u32 prev_image_size, image_size;
|
||||||
bool tmp_blinded = false;
|
bool tmp_blinded = false;
|
||||||
bool extra_pass = false;
|
bool extra_pass = false;
|
||||||
struct jit_ctx ctx;
|
struct jit_ctx ctx;
|
||||||
u32 image_size;
|
|
||||||
u8 *image_ptr;
|
u8 *image_ptr;
|
||||||
int pass;
|
int pass, i;
|
||||||
|
|
||||||
if (!prog->jit_requested)
|
if (!prog->jit_requested)
|
||||||
return orig_prog;
|
return orig_prog;
|
||||||
|
|
@ -1461,27 +1473,52 @@ struct bpf_prog *bpf_int_jit_compile(struct bpf_prog *prog)
|
||||||
header = jit_data->header;
|
header = jit_data->header;
|
||||||
extra_pass = true;
|
extra_pass = true;
|
||||||
image_size = sizeof(u32) * ctx.idx;
|
image_size = sizeof(u32) * ctx.idx;
|
||||||
|
prev_image_size = image_size;
|
||||||
|
pass = 1;
|
||||||
goto skip_init_ctx;
|
goto skip_init_ctx;
|
||||||
}
|
}
|
||||||
|
|
||||||
memset(&ctx, 0, sizeof(ctx));
|
memset(&ctx, 0, sizeof(ctx));
|
||||||
ctx.prog = prog;
|
ctx.prog = prog;
|
||||||
|
|
||||||
ctx.offset = kcalloc(prog->len, sizeof(unsigned int), GFP_KERNEL);
|
ctx.offset = kmalloc_array(prog->len, sizeof(unsigned int), GFP_KERNEL);
|
||||||
if (ctx.offset == NULL) {
|
if (ctx.offset == NULL) {
|
||||||
prog = orig_prog;
|
prog = orig_prog;
|
||||||
goto out_off;
|
goto out_off;
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Fake pass to detect features used, and get an accurate assessment
|
/* Longest sequence emitted is for bswap32, 12 instructions. Pre-cook
|
||||||
* of what the final image size will be.
|
* the offset array so that we converge faster.
|
||||||
*/
|
*/
|
||||||
if (build_body(&ctx)) {
|
for (i = 0; i < prog->len; i++)
|
||||||
prog = orig_prog;
|
ctx.offset[i] = i * (12 * 4);
|
||||||
goto out_off;
|
|
||||||
|
prev_image_size = ~0U;
|
||||||
|
for (pass = 1; pass < 40; pass++) {
|
||||||
|
ctx.idx = 0;
|
||||||
|
|
||||||
|
build_prologue(&ctx);
|
||||||
|
if (build_body(&ctx)) {
|
||||||
|
prog = orig_prog;
|
||||||
|
goto out_off;
|
||||||
|
}
|
||||||
|
build_epilogue(&ctx);
|
||||||
|
|
||||||
|
if (bpf_jit_enable > 1)
|
||||||
|
pr_info("Pass %d: size = %u, seen = [%c%c%c%c%c%c]\n", pass,
|
||||||
|
ctx.idx * 4,
|
||||||
|
ctx.tmp_1_used ? '1' : ' ',
|
||||||
|
ctx.tmp_2_used ? '2' : ' ',
|
||||||
|
ctx.tmp_3_used ? '3' : ' ',
|
||||||
|
ctx.saw_frame_pointer ? 'F' : ' ',
|
||||||
|
ctx.saw_call ? 'C' : ' ',
|
||||||
|
ctx.saw_tail_call ? 'T' : ' ');
|
||||||
|
|
||||||
|
if (ctx.idx * 4 == prev_image_size)
|
||||||
|
break;
|
||||||
|
prev_image_size = ctx.idx * 4;
|
||||||
|
cond_resched();
|
||||||
}
|
}
|
||||||
build_prologue(&ctx);
|
|
||||||
build_epilogue(&ctx);
|
|
||||||
|
|
||||||
/* Now we know the actual image size. */
|
/* Now we know the actual image size. */
|
||||||
image_size = sizeof(u32) * ctx.idx;
|
image_size = sizeof(u32) * ctx.idx;
|
||||||
|
|
@ -1494,28 +1531,24 @@ struct bpf_prog *bpf_int_jit_compile(struct bpf_prog *prog)
|
||||||
|
|
||||||
ctx.image = (u32 *)image_ptr;
|
ctx.image = (u32 *)image_ptr;
|
||||||
skip_init_ctx:
|
skip_init_ctx:
|
||||||
for (pass = 1; pass < 3; pass++) {
|
ctx.idx = 0;
|
||||||
ctx.idx = 0;
|
|
||||||
|
|
||||||
build_prologue(&ctx);
|
build_prologue(&ctx);
|
||||||
|
|
||||||
if (build_body(&ctx)) {
|
if (build_body(&ctx)) {
|
||||||
bpf_jit_binary_free(header);
|
bpf_jit_binary_free(header);
|
||||||
prog = orig_prog;
|
prog = orig_prog;
|
||||||
goto out_off;
|
goto out_off;
|
||||||
}
|
}
|
||||||
|
|
||||||
build_epilogue(&ctx);
|
build_epilogue(&ctx);
|
||||||
|
|
||||||
if (bpf_jit_enable > 1)
|
if (ctx.idx * 4 != prev_image_size) {
|
||||||
pr_info("Pass %d: shrink = %d, seen = [%c%c%c%c%c%c]\n", pass,
|
pr_err("bpf_jit: Failed to converge, prev_size=%u size=%d\n",
|
||||||
image_size - (ctx.idx * 4),
|
prev_image_size, ctx.idx * 4);
|
||||||
ctx.tmp_1_used ? '1' : ' ',
|
bpf_jit_binary_free(header);
|
||||||
ctx.tmp_2_used ? '2' : ' ',
|
prog = orig_prog;
|
||||||
ctx.tmp_3_used ? '3' : ' ',
|
goto out_off;
|
||||||
ctx.saw_frame_pointer ? 'F' : ' ',
|
|
||||||
ctx.saw_call ? 'C' : ' ',
|
|
||||||
ctx.saw_tail_call ? 'T' : ' ');
|
|
||||||
}
|
}
|
||||||
|
|
||||||
if (bpf_jit_enable > 1)
|
if (bpf_jit_enable > 1)
|
||||||
|
|
|
||||||
|
|
@ -420,7 +420,7 @@ static inline int __do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
|
||||||
|
|
||||||
r = -E2BIG;
|
r = -E2BIG;
|
||||||
|
|
||||||
if (*nent >= maxnent)
|
if (WARN_ON(*nent >= maxnent))
|
||||||
goto out;
|
goto out;
|
||||||
|
|
||||||
do_cpuid_1_ent(entry, function, index);
|
do_cpuid_1_ent(entry, function, index);
|
||||||
|
|
@ -729,6 +729,9 @@ static inline int __do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
|
||||||
static int do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 func,
|
static int do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 func,
|
||||||
u32 idx, int *nent, int maxnent, unsigned int type)
|
u32 idx, int *nent, int maxnent, unsigned int type)
|
||||||
{
|
{
|
||||||
|
if (*nent >= maxnent)
|
||||||
|
return -E2BIG;
|
||||||
|
|
||||||
if (type == KVM_GET_EMULATED_CPUID)
|
if (type == KVM_GET_EMULATED_CPUID)
|
||||||
return __do_cpuid_ent_emulated(entry, func, idx, nent, maxnent);
|
return __do_cpuid_ent_emulated(entry, func, idx, nent, maxnent);
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -290,13 +290,14 @@ int kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
|
||||||
struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
|
struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
|
||||||
int err;
|
int err;
|
||||||
|
|
||||||
if (((value ^ smsr->values[slot].curr) & mask) == 0)
|
value = (value & mask) | (smsr->values[slot].host & ~mask);
|
||||||
|
if (value == smsr->values[slot].curr)
|
||||||
return 0;
|
return 0;
|
||||||
smsr->values[slot].curr = value;
|
|
||||||
err = wrmsrl_safe(shared_msrs_global.msrs[slot], value);
|
err = wrmsrl_safe(shared_msrs_global.msrs[slot], value);
|
||||||
if (err)
|
if (err)
|
||||||
return 1;
|
return 1;
|
||||||
|
|
||||||
|
smsr->values[slot].curr = value;
|
||||||
if (!smsr->registered) {
|
if (!smsr->registered) {
|
||||||
smsr->urn.on_user_return = kvm_on_user_return;
|
smsr->urn.on_user_return = kvm_on_user_return;
|
||||||
user_return_notifier_register(&smsr->urn);
|
user_return_notifier_register(&smsr->urn);
|
||||||
|
|
@ -1173,10 +1174,15 @@ u64 kvm_get_arch_capabilities(void)
|
||||||
* If TSX is disabled on the system, guests are also mitigated against
|
* If TSX is disabled on the system, guests are also mitigated against
|
||||||
* TAA and clear CPU buffer mitigation is not required for guests.
|
* TAA and clear CPU buffer mitigation is not required for guests.
|
||||||
*/
|
*/
|
||||||
if (boot_cpu_has_bug(X86_BUG_TAA) && boot_cpu_has(X86_FEATURE_RTM) &&
|
if (!boot_cpu_has(X86_FEATURE_RTM))
|
||||||
(data & ARCH_CAP_TSX_CTRL_MSR))
|
data &= ~ARCH_CAP_TAA_NO;
|
||||||
|
else if (!boot_cpu_has_bug(X86_BUG_TAA))
|
||||||
|
data |= ARCH_CAP_TAA_NO;
|
||||||
|
else if (data & ARCH_CAP_TSX_CTRL_MSR)
|
||||||
data &= ~ARCH_CAP_MDS_NO;
|
data &= ~ARCH_CAP_MDS_NO;
|
||||||
|
|
||||||
|
/* KVM does not emulate MSR_IA32_TSX_CTRL. */
|
||||||
|
data &= ~ARCH_CAP_TSX_CTRL_MSR;
|
||||||
return data;
|
return data;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
@ -4111,6 +4117,7 @@ long kvm_arch_vcpu_ioctl(struct file *filp,
|
||||||
case KVM_SET_NESTED_STATE: {
|
case KVM_SET_NESTED_STATE: {
|
||||||
struct kvm_nested_state __user *user_kvm_nested_state = argp;
|
struct kvm_nested_state __user *user_kvm_nested_state = argp;
|
||||||
struct kvm_nested_state kvm_state;
|
struct kvm_nested_state kvm_state;
|
||||||
|
int idx;
|
||||||
|
|
||||||
r = -EINVAL;
|
r = -EINVAL;
|
||||||
if (!kvm_x86_ops->set_nested_state)
|
if (!kvm_x86_ops->set_nested_state)
|
||||||
|
|
@ -4132,7 +4139,9 @@ long kvm_arch_vcpu_ioctl(struct file *filp,
|
||||||
if (kvm_state.flags == KVM_STATE_NESTED_RUN_PENDING)
|
if (kvm_state.flags == KVM_STATE_NESTED_RUN_PENDING)
|
||||||
break;
|
break;
|
||||||
|
|
||||||
|
idx = srcu_read_lock(&vcpu->kvm->srcu);
|
||||||
r = kvm_x86_ops->set_nested_state(vcpu, user_kvm_nested_state, &kvm_state);
|
r = kvm_x86_ops->set_nested_state(vcpu, user_kvm_nested_state, &kvm_state);
|
||||||
|
srcu_read_unlock(&vcpu->kvm->srcu, idx);
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
default:
|
default:
|
||||||
|
|
|
||||||
|
|
@ -281,7 +281,7 @@ void vmalloc_sync_all(void)
|
||||||
return;
|
return;
|
||||||
|
|
||||||
for (address = VMALLOC_START & PMD_MASK;
|
for (address = VMALLOC_START & PMD_MASK;
|
||||||
address >= TASK_SIZE_MAX && address < FIXADDR_TOP;
|
address >= TASK_SIZE_MAX && address < VMALLOC_END;
|
||||||
address += PMD_SIZE) {
|
address += PMD_SIZE) {
|
||||||
struct page *page;
|
struct page *page;
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -588,6 +588,17 @@ static void pci_fixup_amd_ehci_pme(struct pci_dev *dev)
|
||||||
}
|
}
|
||||||
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, 0x7808, pci_fixup_amd_ehci_pme);
|
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, 0x7808, pci_fixup_amd_ehci_pme);
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Device [1022:7914]
|
||||||
|
* When in D0, PME# doesn't get asserted when plugging USB 2.0 device.
|
||||||
|
*/
|
||||||
|
static void pci_fixup_amd_fch_xhci_pme(struct pci_dev *dev)
|
||||||
|
{
|
||||||
|
dev_info(&dev->dev, "PME# does not work under D0, disabling it\n");
|
||||||
|
dev->pme_support &= ~(PCI_PM_CAP_PME_D0 >> PCI_PM_CAP_PME_SHIFT);
|
||||||
|
}
|
||||||
|
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, 0x7914, pci_fixup_amd_fch_xhci_pme);
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Apple MacBook Pro: Avoid [mem 0x7fa00000-0x7fbfffff]
|
* Apple MacBook Pro: Avoid [mem 0x7fa00000-0x7fbfffff]
|
||||||
*
|
*
|
||||||
|
|
|
||||||
|
|
@ -1058,7 +1058,7 @@ void af_alg_async_cb(struct crypto_async_request *_req, int err)
|
||||||
af_alg_free_resources(areq);
|
af_alg_free_resources(areq);
|
||||||
sock_put(sk);
|
sock_put(sk);
|
||||||
|
|
||||||
iocb->ki_complete(iocb, err ? err : resultlen, 0);
|
iocb->ki_complete(iocb, err ? err : (int)resultlen, 0);
|
||||||
}
|
}
|
||||||
EXPORT_SYMBOL_GPL(af_alg_async_cb);
|
EXPORT_SYMBOL_GPL(af_alg_async_cb);
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -288,8 +288,10 @@ static int crypto_report(struct sk_buff *in_skb, struct nlmsghdr *in_nlh,
|
||||||
drop_alg:
|
drop_alg:
|
||||||
crypto_mod_put(alg);
|
crypto_mod_put(alg);
|
||||||
|
|
||||||
if (err)
|
if (err) {
|
||||||
|
kfree_skb(skb);
|
||||||
return err;
|
return err;
|
||||||
|
}
|
||||||
|
|
||||||
return nlmsg_unicast(crypto_nlsk, skb, NETLINK_CB(in_skb).portid);
|
return nlmsg_unicast(crypto_nlsk, skb, NETLINK_CB(in_skb).portid);
|
||||||
}
|
}
|
||||||
|
|
|
||||||
45
crypto/ecc.c
45
crypto/ecc.c
|
|
@ -906,10 +906,34 @@ static void ecc_point_mult(struct ecc_point *result,
|
||||||
static inline void ecc_swap_digits(const u64 *in, u64 *out,
|
static inline void ecc_swap_digits(const u64 *in, u64 *out,
|
||||||
unsigned int ndigits)
|
unsigned int ndigits)
|
||||||
{
|
{
|
||||||
|
const __be64 *src = (__force __be64 *)in;
|
||||||
int i;
|
int i;
|
||||||
|
|
||||||
for (i = 0; i < ndigits; i++)
|
for (i = 0; i < ndigits; i++)
|
||||||
out[i] = __swab64(in[ndigits - 1 - i]);
|
out[i] = be64_to_cpu(src[ndigits - 1 - i]);
|
||||||
|
}
|
||||||
|
|
||||||
|
static int __ecc_is_key_valid(const struct ecc_curve *curve,
|
||||||
|
const u64 *private_key, unsigned int ndigits)
|
||||||
|
{
|
||||||
|
u64 one[ECC_MAX_DIGITS] = { 1, };
|
||||||
|
u64 res[ECC_MAX_DIGITS];
|
||||||
|
|
||||||
|
if (!private_key)
|
||||||
|
return -EINVAL;
|
||||||
|
|
||||||
|
if (curve->g.ndigits != ndigits)
|
||||||
|
return -EINVAL;
|
||||||
|
|
||||||
|
/* Make sure the private key is in the range [2, n-3]. */
|
||||||
|
if (vli_cmp(one, private_key, ndigits) != -1)
|
||||||
|
return -EINVAL;
|
||||||
|
vli_sub(res, curve->n, one, ndigits);
|
||||||
|
vli_sub(res, res, one, ndigits);
|
||||||
|
if (vli_cmp(res, private_key, ndigits) != 1)
|
||||||
|
return -EINVAL;
|
||||||
|
|
||||||
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
int ecc_is_key_valid(unsigned int curve_id, unsigned int ndigits,
|
int ecc_is_key_valid(unsigned int curve_id, unsigned int ndigits,
|
||||||
|
|
@ -918,22 +942,12 @@ int ecc_is_key_valid(unsigned int curve_id, unsigned int ndigits,
|
||||||
int nbytes;
|
int nbytes;
|
||||||
const struct ecc_curve *curve = ecc_get_curve(curve_id);
|
const struct ecc_curve *curve = ecc_get_curve(curve_id);
|
||||||
|
|
||||||
if (!private_key)
|
|
||||||
return -EINVAL;
|
|
||||||
|
|
||||||
nbytes = ndigits << ECC_DIGITS_TO_BYTES_SHIFT;
|
nbytes = ndigits << ECC_DIGITS_TO_BYTES_SHIFT;
|
||||||
|
|
||||||
if (private_key_len != nbytes)
|
if (private_key_len != nbytes)
|
||||||
return -EINVAL;
|
return -EINVAL;
|
||||||
|
|
||||||
if (vli_is_zero(private_key, ndigits))
|
return __ecc_is_key_valid(curve, private_key, ndigits);
|
||||||
return -EINVAL;
|
|
||||||
|
|
||||||
/* Make sure the private key is in the range [1, n-1]. */
|
|
||||||
if (vli_cmp(curve->n, private_key, ndigits) != 1)
|
|
||||||
return -EINVAL;
|
|
||||||
|
|
||||||
return 0;
|
|
||||||
}
|
}
|
||||||
|
|
||||||
/*
|
/*
|
||||||
|
|
@ -979,11 +993,8 @@ int ecc_gen_privkey(unsigned int curve_id, unsigned int ndigits, u64 *privkey)
|
||||||
if (err)
|
if (err)
|
||||||
return err;
|
return err;
|
||||||
|
|
||||||
if (vli_is_zero(priv, ndigits))
|
/* Make sure the private key is in the valid range. */
|
||||||
return -EINVAL;
|
if (__ecc_is_key_valid(curve, priv, ndigits))
|
||||||
|
|
||||||
/* Make sure the private key is in the range [1, n-1]. */
|
|
||||||
if (vli_cmp(curve->n, priv, ndigits) != 1)
|
|
||||||
return -EINVAL;
|
return -EINVAL;
|
||||||
|
|
||||||
ecc_swap_digits(priv, privkey, ndigits);
|
ecc_swap_digits(priv, privkey, ndigits);
|
||||||
|
|
|
||||||
|
|
@ -285,8 +285,7 @@ static int binder_update_page_range(struct binder_alloc *alloc, int allocate,
|
||||||
return 0;
|
return 0;
|
||||||
|
|
||||||
free_range:
|
free_range:
|
||||||
for (page_addr = end - PAGE_SIZE; page_addr >= start;
|
for (page_addr = end - PAGE_SIZE; 1; page_addr -= PAGE_SIZE) {
|
||||||
page_addr -= PAGE_SIZE) {
|
|
||||||
bool ret;
|
bool ret;
|
||||||
size_t index;
|
size_t index;
|
||||||
|
|
||||||
|
|
@ -299,6 +298,8 @@ static int binder_update_page_range(struct binder_alloc *alloc, int allocate,
|
||||||
WARN_ON(!ret);
|
WARN_ON(!ret);
|
||||||
|
|
||||||
trace_binder_free_lru_end(alloc, index);
|
trace_binder_free_lru_end(alloc, index);
|
||||||
|
if (page_addr == start)
|
||||||
|
break;
|
||||||
continue;
|
continue;
|
||||||
|
|
||||||
err_vm_insert_page_failed:
|
err_vm_insert_page_failed:
|
||||||
|
|
@ -306,7 +307,8 @@ static int binder_update_page_range(struct binder_alloc *alloc, int allocate,
|
||||||
page->page_ptr = NULL;
|
page->page_ptr = NULL;
|
||||||
err_alloc_page_failed:
|
err_alloc_page_failed:
|
||||||
err_page_ptr_cleared:
|
err_page_ptr_cleared:
|
||||||
;
|
if (page_addr == start)
|
||||||
|
break;
|
||||||
}
|
}
|
||||||
err_no_vma:
|
err_no_vma:
|
||||||
if (mm) {
|
if (mm) {
|
||||||
|
|
@ -848,14 +850,20 @@ void binder_alloc_print_pages(struct seq_file *m,
|
||||||
int free = 0;
|
int free = 0;
|
||||||
|
|
||||||
mutex_lock(&alloc->mutex);
|
mutex_lock(&alloc->mutex);
|
||||||
for (i = 0; i < alloc->buffer_size / PAGE_SIZE; i++) {
|
/*
|
||||||
page = &alloc->pages[i];
|
* Make sure the binder_alloc is fully initialized, otherwise we might
|
||||||
if (!page->page_ptr)
|
* read inconsistent state.
|
||||||
free++;
|
*/
|
||||||
else if (list_empty(&page->lru))
|
if (binder_alloc_get_vma(alloc) != NULL) {
|
||||||
active++;
|
for (i = 0; i < alloc->buffer_size / PAGE_SIZE; i++) {
|
||||||
else
|
page = &alloc->pages[i];
|
||||||
lru++;
|
if (!page->page_ptr)
|
||||||
|
free++;
|
||||||
|
else if (list_empty(&page->lru))
|
||||||
|
active++;
|
||||||
|
else
|
||||||
|
lru++;
|
||||||
|
}
|
||||||
}
|
}
|
||||||
mutex_unlock(&alloc->mutex);
|
mutex_unlock(&alloc->mutex);
|
||||||
seq_printf(m, " pages: %d:%d:%d\n", active, lru, free);
|
seq_printf(m, " pages: %d:%d:%d\n", active, lru, free);
|
||||||
|
|
|
||||||
|
|
@ -1014,8 +1014,10 @@ static void rsxx_pci_remove(struct pci_dev *dev)
|
||||||
|
|
||||||
cancel_work_sync(&card->event_work);
|
cancel_work_sync(&card->event_work);
|
||||||
|
|
||||||
|
destroy_workqueue(card->event_wq);
|
||||||
rsxx_destroy_dev(card);
|
rsxx_destroy_dev(card);
|
||||||
rsxx_dma_destroy(card);
|
rsxx_dma_destroy(card);
|
||||||
|
destroy_workqueue(card->creg_ctrl.creg_wq);
|
||||||
|
|
||||||
spin_lock_irqsave(&card->irq_lock, flags);
|
spin_lock_irqsave(&card->irq_lock, flags);
|
||||||
rsxx_disable_ier_and_isr(card, CR_INTR_ALL);
|
rsxx_disable_ier_and_isr(card, CR_INTR_ALL);
|
||||||
|
|
|
||||||
|
|
@ -217,8 +217,13 @@ static int sysc_get_clocks(struct sysc *ddata)
|
||||||
if (!ddata->clocks)
|
if (!ddata->clocks)
|
||||||
return -ENOMEM;
|
return -ENOMEM;
|
||||||
|
|
||||||
for (i = 0; i < ddata->nr_clocks; i++) {
|
for (i = 0; i < SYSC_MAX_CLOCKS; i++) {
|
||||||
error = sysc_get_one_clock(ddata, ddata->clock_roles[i]);
|
const char *name = ddata->clock_roles[i];
|
||||||
|
|
||||||
|
if (!name)
|
||||||
|
continue;
|
||||||
|
|
||||||
|
error = sysc_get_one_clock(ddata, name);
|
||||||
if (error && error != -ENOENT)
|
if (error && error != -ENOENT)
|
||||||
return error;
|
return error;
|
||||||
}
|
}
|
||||||
|
|
|
||||||
|
|
@ -708,6 +708,10 @@ static int lp_set_timeout64(unsigned int minor, void __user *arg)
|
||||||
if (copy_from_user(karg, arg, sizeof(karg)))
|
if (copy_from_user(karg, arg, sizeof(karg)))
|
||||||
return -EFAULT;
|
return -EFAULT;
|
||||||
|
|
||||||
|
/* sparc64 suseconds_t is 32-bit only */
|
||||||
|
if (IS_ENABLED(CONFIG_SPARC64) && !in_compat_syscall())
|
||||||
|
karg[1] >>= 32;
|
||||||
|
|
||||||
return lp_set_timeout(minor, karg[0], karg[1]);
|
return lp_set_timeout(minor, karg[0], karg[1]);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -53,7 +53,7 @@ static const struct clk_ops clk_cpumux_ops = {
|
||||||
.set_parent = clk_cpumux_set_parent,
|
.set_parent = clk_cpumux_set_parent,
|
||||||
};
|
};
|
||||||
|
|
||||||
static struct clk __init *
|
static struct clk *
|
||||||
mtk_clk_register_cpumux(const struct mtk_composite *mux,
|
mtk_clk_register_cpumux(const struct mtk_composite *mux,
|
||||||
struct regmap *regmap)
|
struct regmap *regmap)
|
||||||
{
|
{
|
||||||
|
|
@ -84,9 +84,9 @@ mtk_clk_register_cpumux(const struct mtk_composite *mux,
|
||||||
return clk;
|
return clk;
|
||||||
}
|
}
|
||||||
|
|
||||||
int __init mtk_clk_register_cpumuxes(struct device_node *node,
|
int mtk_clk_register_cpumuxes(struct device_node *node,
|
||||||
const struct mtk_composite *clks, int num,
|
const struct mtk_composite *clks, int num,
|
||||||
struct clk_onecell_data *clk_data)
|
struct clk_onecell_data *clk_data)
|
||||||
{
|
{
|
||||||
int i;
|
int i;
|
||||||
struct clk *clk;
|
struct clk *clk;
|
||||||
|
|
|
||||||
|
|
@ -513,7 +513,7 @@ static const struct mtk_gate peri_clks[] = {
|
||||||
GATE_PERI1(CLK_PERI_IRTX_PD, "peri_irtx_pd", "irtx_sel", 2),
|
GATE_PERI1(CLK_PERI_IRTX_PD, "peri_irtx_pd", "irtx_sel", 2),
|
||||||
};
|
};
|
||||||
|
|
||||||
static struct mtk_composite infra_muxes[] __initdata = {
|
static struct mtk_composite infra_muxes[] = {
|
||||||
MUX(CLK_INFRA_MUX1_SEL, "infra_mux1_sel", infra_mux1_parents,
|
MUX(CLK_INFRA_MUX1_SEL, "infra_mux1_sel", infra_mux1_parents,
|
||||||
0x000, 2, 2),
|
0x000, 2, 2),
|
||||||
};
|
};
|
||||||
|
|
@ -652,7 +652,7 @@ static int mtk_topckgen_init(struct platform_device *pdev)
|
||||||
return of_clk_add_provider(node, of_clk_src_onecell_get, clk_data);
|
return of_clk_add_provider(node, of_clk_src_onecell_get, clk_data);
|
||||||
}
|
}
|
||||||
|
|
||||||
static int __init mtk_infrasys_init(struct platform_device *pdev)
|
static int mtk_infrasys_init(struct platform_device *pdev)
|
||||||
{
|
{
|
||||||
struct device_node *node = pdev->dev.of_node;
|
struct device_node *node = pdev->dev.of_node;
|
||||||
struct clk_onecell_data *clk_data;
|
struct clk_onecell_data *clk_data;
|
||||||
|
|
|
||||||
|
|
@ -295,6 +295,12 @@ static struct clk_regmap gxl_hdmi_pll = {
|
||||||
.shift = 9,
|
.shift = 9,
|
||||||
.width = 5,
|
.width = 5,
|
||||||
},
|
},
|
||||||
|
/*
|
||||||
|
* On gxl, there is a register shift due to
|
||||||
|
* HHI_HDMI_PLL_CNTL1 which does not exist on gxbb,
|
||||||
|
* so we use the HHI_HDMI_PLL_CNTL2 define from GXBB
|
||||||
|
* instead which is defined at the same offset.
|
||||||
|
*/
|
||||||
.frac = {
|
.frac = {
|
||||||
/*
|
/*
|
||||||
* On gxl, there is a register shift due to
|
* On gxl, there is a register shift due to
|
||||||
|
|
@ -304,7 +310,7 @@ static struct clk_regmap gxl_hdmi_pll = {
|
||||||
*/
|
*/
|
||||||
.reg_off = HHI_HDMI_PLL_CNTL + 4,
|
.reg_off = HHI_HDMI_PLL_CNTL + 4,
|
||||||
.shift = 0,
|
.shift = 0,
|
||||||
.width = 12,
|
.width = 10,
|
||||||
},
|
},
|
||||||
.od = {
|
.od = {
|
||||||
.reg_off = HHI_HDMI_PLL_CNTL + 8,
|
.reg_off = HHI_HDMI_PLL_CNTL + 8,
|
||||||
|
|
|
||||||
|
|
@ -144,7 +144,7 @@ static struct clk_regmap meson8b_vid_pll = {
|
||||||
},
|
},
|
||||||
.n = {
|
.n = {
|
||||||
.reg_off = HHI_VID_PLL_CNTL,
|
.reg_off = HHI_VID_PLL_CNTL,
|
||||||
.shift = 9,
|
.shift = 10,
|
||||||
.width = 5,
|
.width = 5,
|
||||||
},
|
},
|
||||||
.od = {
|
.od = {
|
||||||
|
|
|
||||||
|
|
@ -2402,7 +2402,7 @@ static struct clk_branch gcc_ufs_phy_aux_clk = {
|
||||||
|
|
||||||
static struct clk_branch gcc_ufs_rx_symbol_0_clk = {
|
static struct clk_branch gcc_ufs_rx_symbol_0_clk = {
|
||||||
.halt_reg = 0x75014,
|
.halt_reg = 0x75014,
|
||||||
.halt_check = BRANCH_HALT,
|
.halt_check = BRANCH_HALT_SKIP,
|
||||||
.clkr = {
|
.clkr = {
|
||||||
.enable_reg = 0x75014,
|
.enable_reg = 0x75014,
|
||||||
.enable_mask = BIT(0),
|
.enable_mask = BIT(0),
|
||||||
|
|
@ -2415,7 +2415,7 @@ static struct clk_branch gcc_ufs_rx_symbol_0_clk = {
|
||||||
|
|
||||||
static struct clk_branch gcc_ufs_rx_symbol_1_clk = {
|
static struct clk_branch gcc_ufs_rx_symbol_1_clk = {
|
||||||
.halt_reg = 0x7605c,
|
.halt_reg = 0x7605c,
|
||||||
.halt_check = BRANCH_HALT,
|
.halt_check = BRANCH_HALT_SKIP,
|
||||||
.clkr = {
|
.clkr = {
|
||||||
.enable_reg = 0x7605c,
|
.enable_reg = 0x7605c,
|
||||||
.enable_mask = BIT(0),
|
.enable_mask = BIT(0),
|
||||||
|
|
@ -2428,7 +2428,7 @@ static struct clk_branch gcc_ufs_rx_symbol_1_clk = {
|
||||||
|
|
||||||
static struct clk_branch gcc_ufs_tx_symbol_0_clk = {
|
static struct clk_branch gcc_ufs_tx_symbol_0_clk = {
|
||||||
.halt_reg = 0x75010,
|
.halt_reg = 0x75010,
|
||||||
.halt_check = BRANCH_HALT,
|
.halt_check = BRANCH_HALT_SKIP,
|
||||||
.clkr = {
|
.clkr = {
|
||||||
.enable_reg = 0x75010,
|
.enable_reg = 0x75010,
|
||||||
.enable_mask = BIT(0),
|
.enable_mask = BIT(0),
|
||||||
|
|
@ -2743,25 +2743,25 @@ static struct gdsc *gcc_msm8998_gdscs[] = {
|
||||||
};
|
};
|
||||||
|
|
||||||
static const struct qcom_reset_map gcc_msm8998_resets[] = {
|
static const struct qcom_reset_map gcc_msm8998_resets[] = {
|
||||||
[GCC_BLSP1_QUP1_BCR] = { 0x102400 },
|
[GCC_BLSP1_QUP1_BCR] = { 0x19000 },
|
||||||
[GCC_BLSP1_QUP2_BCR] = { 0x110592 },
|
[GCC_BLSP1_QUP2_BCR] = { 0x1b000 },
|
||||||
[GCC_BLSP1_QUP3_BCR] = { 0x118784 },
|
[GCC_BLSP1_QUP3_BCR] = { 0x1d000 },
|
||||||
[GCC_BLSP1_QUP4_BCR] = { 0x126976 },
|
[GCC_BLSP1_QUP4_BCR] = { 0x1f000 },
|
||||||
[GCC_BLSP1_QUP5_BCR] = { 0x135168 },
|
[GCC_BLSP1_QUP5_BCR] = { 0x21000 },
|
||||||
[GCC_BLSP1_QUP6_BCR] = { 0x143360 },
|
[GCC_BLSP1_QUP6_BCR] = { 0x23000 },
|
||||||
[GCC_BLSP2_QUP1_BCR] = { 0x155648 },
|
[GCC_BLSP2_QUP1_BCR] = { 0x26000 },
|
||||||
[GCC_BLSP2_QUP2_BCR] = { 0x163840 },
|
[GCC_BLSP2_QUP2_BCR] = { 0x28000 },
|
||||||
[GCC_BLSP2_QUP3_BCR] = { 0x172032 },
|
[GCC_BLSP2_QUP3_BCR] = { 0x2a000 },
|
||||||
[GCC_BLSP2_QUP4_BCR] = { 0x180224 },
|
[GCC_BLSP2_QUP4_BCR] = { 0x2c000 },
|
||||||
[GCC_BLSP2_QUP5_BCR] = { 0x188416 },
|
[GCC_BLSP2_QUP5_BCR] = { 0x2e000 },
|
||||||
[GCC_BLSP2_QUP6_BCR] = { 0x196608 },
|
[GCC_BLSP2_QUP6_BCR] = { 0x30000 },
|
||||||
[GCC_PCIE_0_BCR] = { 0x438272 },
|
[GCC_PCIE_0_BCR] = { 0x6b000 },
|
||||||
[GCC_PDM_BCR] = { 0x208896 },
|
[GCC_PDM_BCR] = { 0x33000 },
|
||||||
[GCC_SDCC2_BCR] = { 0x81920 },
|
[GCC_SDCC2_BCR] = { 0x14000 },
|
||||||
[GCC_SDCC4_BCR] = { 0x90112 },
|
[GCC_SDCC4_BCR] = { 0x16000 },
|
||||||
[GCC_TSIF_BCR] = { 0x221184 },
|
[GCC_TSIF_BCR] = { 0x36000 },
|
||||||
[GCC_UFS_BCR] = { 0x479232 },
|
[GCC_UFS_BCR] = { 0x75000 },
|
||||||
[GCC_USB_30_BCR] = { 0x61440 },
|
[GCC_USB_30_BCR] = { 0xf000 },
|
||||||
};
|
};
|
||||||
|
|
||||||
static const struct regmap_config gcc_msm8998_regmap_config = {
|
static const struct regmap_config gcc_msm8998_regmap_config = {
|
||||||
|
|
|
||||||
|
|
@ -175,8 +175,8 @@ static const struct mssr_mod_clk r8a77990_mod_clks[] __initconst = {
|
||||||
DEF_MOD("ehci0", 703, R8A77990_CLK_S3D4),
|
DEF_MOD("ehci0", 703, R8A77990_CLK_S3D4),
|
||||||
DEF_MOD("hsusb", 704, R8A77990_CLK_S3D4),
|
DEF_MOD("hsusb", 704, R8A77990_CLK_S3D4),
|
||||||
DEF_MOD("csi40", 716, R8A77990_CLK_CSI0),
|
DEF_MOD("csi40", 716, R8A77990_CLK_CSI0),
|
||||||
DEF_MOD("du1", 723, R8A77990_CLK_S2D1),
|
DEF_MOD("du1", 723, R8A77990_CLK_S1D1),
|
||||||
DEF_MOD("du0", 724, R8A77990_CLK_S2D1),
|
DEF_MOD("du0", 724, R8A77990_CLK_S1D1),
|
||||||
DEF_MOD("lvds", 727, R8A77990_CLK_S2D1),
|
DEF_MOD("lvds", 727, R8A77990_CLK_S2D1),
|
||||||
|
|
||||||
DEF_MOD("vin5", 806, R8A77990_CLK_S1D2),
|
DEF_MOD("vin5", 806, R8A77990_CLK_S1D2),
|
||||||
|
|
|
||||||
|
|
@ -141,8 +141,8 @@ static const struct mssr_mod_clk r8a77995_mod_clks[] __initconst = {
|
||||||
DEF_MOD("vspbs", 627, R8A77995_CLK_S0D1),
|
DEF_MOD("vspbs", 627, R8A77995_CLK_S0D1),
|
||||||
DEF_MOD("ehci0", 703, R8A77995_CLK_S3D2),
|
DEF_MOD("ehci0", 703, R8A77995_CLK_S3D2),
|
||||||
DEF_MOD("hsusb", 704, R8A77995_CLK_S3D2),
|
DEF_MOD("hsusb", 704, R8A77995_CLK_S3D2),
|
||||||
DEF_MOD("du1", 723, R8A77995_CLK_S2D1),
|
DEF_MOD("du1", 723, R8A77995_CLK_S1D1),
|
||||||
DEF_MOD("du0", 724, R8A77995_CLK_S2D1),
|
DEF_MOD("du0", 724, R8A77995_CLK_S1D1),
|
||||||
DEF_MOD("lvds", 727, R8A77995_CLK_S2D1),
|
DEF_MOD("lvds", 727, R8A77995_CLK_S2D1),
|
||||||
DEF_MOD("vin7", 804, R8A77995_CLK_S1D2),
|
DEF_MOD("vin7", 804, R8A77995_CLK_S1D2),
|
||||||
DEF_MOD("vin6", 805, R8A77995_CLK_S1D2),
|
DEF_MOD("vin6", 805, R8A77995_CLK_S1D2),
|
||||||
|
|
|
||||||
|
|
@ -361,7 +361,7 @@ static struct clk * __init cpg_sd_clk_register(const struct cpg_core_clk *core,
|
||||||
struct sd_clock *clock;
|
struct sd_clock *clock;
|
||||||
struct clk *clk;
|
struct clk *clk;
|
||||||
unsigned int i;
|
unsigned int i;
|
||||||
u32 sd_fc;
|
u32 val;
|
||||||
|
|
||||||
clock = kzalloc(sizeof(*clock), GFP_KERNEL);
|
clock = kzalloc(sizeof(*clock), GFP_KERNEL);
|
||||||
if (!clock)
|
if (!clock)
|
||||||
|
|
@ -378,17 +378,9 @@ static struct clk * __init cpg_sd_clk_register(const struct cpg_core_clk *core,
|
||||||
clock->div_table = cpg_sd_div_table;
|
clock->div_table = cpg_sd_div_table;
|
||||||
clock->div_num = ARRAY_SIZE(cpg_sd_div_table);
|
clock->div_num = ARRAY_SIZE(cpg_sd_div_table);
|
||||||
|
|
||||||
sd_fc = readl(clock->csn.reg) & CPG_SD_FC_MASK;
|
val = readl(clock->csn.reg) & ~CPG_SD_FC_MASK;
|
||||||
for (i = 0; i < clock->div_num; i++)
|
val |= CPG_SD_STP_MASK | (clock->div_table[0].val & CPG_SD_FC_MASK);
|
||||||
if (sd_fc == (clock->div_table[i].val & CPG_SD_FC_MASK))
|
writel(val, clock->csn.reg);
|
||||||
break;
|
|
||||||
|
|
||||||
if (WARN_ON(i >= clock->div_num)) {
|
|
||||||
kfree(clock);
|
|
||||||
return ERR_PTR(-EINVAL);
|
|
||||||
}
|
|
||||||
|
|
||||||
clock->cur_div_idx = i;
|
|
||||||
|
|
||||||
clock->div_max = clock->div_table[0].div;
|
clock->div_max = clock->div_table[0].div;
|
||||||
clock->div_min = clock->div_max;
|
clock->div_min = clock->div_max;
|
||||||
|
|
|
||||||
|
|
@ -362,8 +362,8 @@ static struct rockchip_clk_branch common_clk_branches[] __initdata = {
|
||||||
RK2928_CLKGATE_CON(2), 5, GFLAGS),
|
RK2928_CLKGATE_CON(2), 5, GFLAGS),
|
||||||
MUX(SCLK_MAC, "sclk_macref", mux_sclk_macref_p, CLK_SET_RATE_PARENT,
|
MUX(SCLK_MAC, "sclk_macref", mux_sclk_macref_p, CLK_SET_RATE_PARENT,
|
||||||
RK2928_CLKSEL_CON(21), 4, 1, MFLAGS),
|
RK2928_CLKSEL_CON(21), 4, 1, MFLAGS),
|
||||||
GATE(0, "sclk_mac_lbtest", "sclk_macref",
|
GATE(0, "sclk_mac_lbtest", "sclk_macref", 0,
|
||||||
RK2928_CLKGATE_CON(2), 12, 0, GFLAGS),
|
RK2928_CLKGATE_CON(2), 12, GFLAGS),
|
||||||
|
|
||||||
COMPOSITE(0, "hsadc_src", mux_pll_src_gpll_cpll_p, 0,
|
COMPOSITE(0, "hsadc_src", mux_pll_src_gpll_cpll_p, 0,
|
||||||
RK2928_CLKSEL_CON(22), 0, 1, MFLAGS, 8, 8, DFLAGS,
|
RK2928_CLKSEL_CON(22), 0, 1, MFLAGS, 8, 8, DFLAGS,
|
||||||
|
|
@ -391,8 +391,8 @@ static struct rockchip_clk_branch common_clk_branches[] __initdata = {
|
||||||
* Clock-Architecture Diagram 4
|
* Clock-Architecture Diagram 4
|
||||||
*/
|
*/
|
||||||
|
|
||||||
GATE(SCLK_SMC, "sclk_smc", "hclk_peri",
|
GATE(SCLK_SMC, "sclk_smc", "hclk_peri", 0,
|
||||||
RK2928_CLKGATE_CON(2), 4, 0, GFLAGS),
|
RK2928_CLKGATE_CON(2), 4, GFLAGS),
|
||||||
|
|
||||||
COMPOSITE_NOMUX(SCLK_SPI0, "sclk_spi0", "pclk_peri", 0,
|
COMPOSITE_NOMUX(SCLK_SPI0, "sclk_spi0", "pclk_peri", 0,
|
||||||
RK2928_CLKSEL_CON(25), 0, 7, DFLAGS,
|
RK2928_CLKSEL_CON(25), 0, 7, DFLAGS,
|
||||||
|
|
|
||||||
|
|
@ -392,7 +392,7 @@ static struct rockchip_clk_branch rk3328_clk_branches[] __initdata = {
|
||||||
RK3328_CLKGATE_CON(1), 5, GFLAGS,
|
RK3328_CLKGATE_CON(1), 5, GFLAGS,
|
||||||
&rk3328_i2s1_fracmux),
|
&rk3328_i2s1_fracmux),
|
||||||
GATE(SCLK_I2S1, "clk_i2s1", "i2s1_pre", CLK_SET_RATE_PARENT,
|
GATE(SCLK_I2S1, "clk_i2s1", "i2s1_pre", CLK_SET_RATE_PARENT,
|
||||||
RK3328_CLKGATE_CON(0), 6, GFLAGS),
|
RK3328_CLKGATE_CON(1), 6, GFLAGS),
|
||||||
COMPOSITE_NODIV(SCLK_I2S1_OUT, "i2s1_out", mux_i2s1out_p, 0,
|
COMPOSITE_NODIV(SCLK_I2S1_OUT, "i2s1_out", mux_i2s1out_p, 0,
|
||||||
RK3328_CLKSEL_CON(8), 12, 1, MFLAGS,
|
RK3328_CLKSEL_CON(8), 12, 1, MFLAGS,
|
||||||
RK3328_CLKGATE_CON(1), 7, GFLAGS),
|
RK3328_CLKGATE_CON(1), 7, GFLAGS),
|
||||||
|
|
|
||||||
|
|
@ -582,7 +582,7 @@ static const char * const dsi_dphy_parents[] = { "pll-video0", "pll-periph0" };
|
||||||
static const u8 dsi_dphy_table[] = { 0, 2, };
|
static const u8 dsi_dphy_table[] = { 0, 2, };
|
||||||
static SUNXI_CCU_M_WITH_MUX_TABLE_GATE(dsi_dphy_clk, "dsi-dphy",
|
static SUNXI_CCU_M_WITH_MUX_TABLE_GATE(dsi_dphy_clk, "dsi-dphy",
|
||||||
dsi_dphy_parents, dsi_dphy_table,
|
dsi_dphy_parents, dsi_dphy_table,
|
||||||
0x168, 0, 4, 8, 2, BIT(31), CLK_SET_RATE_PARENT);
|
0x168, 0, 4, 8, 2, BIT(15), CLK_SET_RATE_PARENT);
|
||||||
|
|
||||||
static SUNXI_CCU_M_WITH_GATE(gpu_clk, "gpu", "pll-gpu",
|
static SUNXI_CCU_M_WITH_GATE(gpu_clk, "gpu", "pll-gpu",
|
||||||
0x1a0, 0, 3, BIT(31), CLK_SET_RATE_PARENT);
|
0x1a0, 0, 3, BIT(31), CLK_SET_RATE_PARENT);
|
||||||
|
|
|
||||||
|
|
@ -475,7 +475,7 @@ static const char * const csi_sclk_parents[] = { "pll-periph0", "pll-periph1" };
|
||||||
static SUNXI_CCU_M_WITH_MUX_GATE(csi_sclk_clk, "csi-sclk", csi_sclk_parents,
|
static SUNXI_CCU_M_WITH_MUX_GATE(csi_sclk_clk, "csi-sclk", csi_sclk_parents,
|
||||||
0x134, 16, 4, 24, 3, BIT(31), 0);
|
0x134, 16, 4, 24, 3, BIT(31), 0);
|
||||||
|
|
||||||
static const char * const csi_mclk_parents[] = { "osc24M", "pll-video", "pll-periph0" };
|
static const char * const csi_mclk_parents[] = { "osc24M", "pll-video", "pll-periph1" };
|
||||||
static SUNXI_CCU_M_WITH_MUX_GATE(csi_mclk_clk, "csi-mclk", csi_mclk_parents,
|
static SUNXI_CCU_M_WITH_MUX_GATE(csi_mclk_clk, "csi-mclk", csi_mclk_parents,
|
||||||
0x134, 0, 5, 8, 3, BIT(15), 0);
|
0x134, 0, 5, 8, 3, BIT(15), 0);
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -373,12 +373,8 @@ static u32 crypto4xx_build_sdr(struct crypto4xx_device *dev)
|
||||||
dma_alloc_coherent(dev->core_dev->device,
|
dma_alloc_coherent(dev->core_dev->device,
|
||||||
PPC4XX_SD_BUFFER_SIZE * PPC4XX_NUM_SD,
|
PPC4XX_SD_BUFFER_SIZE * PPC4XX_NUM_SD,
|
||||||
&dev->scatter_buffer_pa, GFP_ATOMIC);
|
&dev->scatter_buffer_pa, GFP_ATOMIC);
|
||||||
if (!dev->scatter_buffer_va) {
|
if (!dev->scatter_buffer_va)
|
||||||
dma_free_coherent(dev->core_dev->device,
|
|
||||||
sizeof(struct ce_sd) * PPC4XX_NUM_SD,
|
|
||||||
dev->sdr, dev->sdr_pa);
|
|
||||||
return -ENOMEM;
|
return -ENOMEM;
|
||||||
}
|
|
||||||
|
|
||||||
for (i = 0; i < PPC4XX_NUM_SD; i++) {
|
for (i = 0; i < PPC4XX_NUM_SD; i++) {
|
||||||
dev->sdr[i].ptr = dev->scatter_buffer_pa +
|
dev->sdr[i].ptr = dev->scatter_buffer_pa +
|
||||||
|
|
|
||||||
|
|
@ -493,6 +493,29 @@ static inline bool atmel_aes_is_encrypt(const struct atmel_aes_dev *dd)
|
||||||
static void atmel_aes_authenc_complete(struct atmel_aes_dev *dd, int err);
|
static void atmel_aes_authenc_complete(struct atmel_aes_dev *dd, int err);
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
static void atmel_aes_set_iv_as_last_ciphertext_block(struct atmel_aes_dev *dd)
|
||||||
|
{
|
||||||
|
struct ablkcipher_request *req = ablkcipher_request_cast(dd->areq);
|
||||||
|
struct atmel_aes_reqctx *rctx = ablkcipher_request_ctx(req);
|
||||||
|
struct crypto_ablkcipher *ablkcipher = crypto_ablkcipher_reqtfm(req);
|
||||||
|
unsigned int ivsize = crypto_ablkcipher_ivsize(ablkcipher);
|
||||||
|
|
||||||
|
if (req->nbytes < ivsize)
|
||||||
|
return;
|
||||||
|
|
||||||
|
if (rctx->mode & AES_FLAGS_ENCRYPT) {
|
||||||
|
scatterwalk_map_and_copy(req->info, req->dst,
|
||||||
|
req->nbytes - ivsize, ivsize, 0);
|
||||||
|
} else {
|
||||||
|
if (req->src == req->dst)
|
||||||
|
memcpy(req->info, rctx->lastc, ivsize);
|
||||||
|
else
|
||||||
|
scatterwalk_map_and_copy(req->info, req->src,
|
||||||
|
req->nbytes - ivsize,
|
||||||
|
ivsize, 0);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
static inline int atmel_aes_complete(struct atmel_aes_dev *dd, int err)
|
static inline int atmel_aes_complete(struct atmel_aes_dev *dd, int err)
|
||||||
{
|
{
|
||||||
#ifdef CONFIG_CRYPTO_DEV_ATMEL_AUTHENC
|
#ifdef CONFIG_CRYPTO_DEV_ATMEL_AUTHENC
|
||||||
|
|
@ -503,26 +526,8 @@ static inline int atmel_aes_complete(struct atmel_aes_dev *dd, int err)
|
||||||
clk_disable(dd->iclk);
|
clk_disable(dd->iclk);
|
||||||
dd->flags &= ~AES_FLAGS_BUSY;
|
dd->flags &= ~AES_FLAGS_BUSY;
|
||||||
|
|
||||||
if (!dd->ctx->is_aead) {
|
if (!dd->ctx->is_aead)
|
||||||
struct ablkcipher_request *req =
|
atmel_aes_set_iv_as_last_ciphertext_block(dd);
|
||||||
ablkcipher_request_cast(dd->areq);
|
|
||||||
struct atmel_aes_reqctx *rctx = ablkcipher_request_ctx(req);
|
|
||||||
struct crypto_ablkcipher *ablkcipher =
|
|
||||||
crypto_ablkcipher_reqtfm(req);
|
|
||||||
int ivsize = crypto_ablkcipher_ivsize(ablkcipher);
|
|
||||||
|
|
||||||
if (rctx->mode & AES_FLAGS_ENCRYPT) {
|
|
||||||
scatterwalk_map_and_copy(req->info, req->dst,
|
|
||||||
req->nbytes - ivsize, ivsize, 0);
|
|
||||||
} else {
|
|
||||||
if (req->src == req->dst) {
|
|
||||||
memcpy(req->info, rctx->lastc, ivsize);
|
|
||||||
} else {
|
|
||||||
scatterwalk_map_and_copy(req->info, req->src,
|
|
||||||
req->nbytes - ivsize, ivsize, 0);
|
|
||||||
}
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
if (dd->is_async)
|
if (dd->is_async)
|
||||||
dd->areq->complete(dd->areq, err);
|
dd->areq->complete(dd->areq, err);
|
||||||
|
|
@ -1128,10 +1133,12 @@ static int atmel_aes_crypt(struct ablkcipher_request *req, unsigned long mode)
|
||||||
rctx->mode = mode;
|
rctx->mode = mode;
|
||||||
|
|
||||||
if (!(mode & AES_FLAGS_ENCRYPT) && (req->src == req->dst)) {
|
if (!(mode & AES_FLAGS_ENCRYPT) && (req->src == req->dst)) {
|
||||||
int ivsize = crypto_ablkcipher_ivsize(ablkcipher);
|
unsigned int ivsize = crypto_ablkcipher_ivsize(ablkcipher);
|
||||||
|
|
||||||
scatterwalk_map_and_copy(rctx->lastc, req->src,
|
if (req->nbytes >= ivsize)
|
||||||
(req->nbytes - ivsize), ivsize, 0);
|
scatterwalk_map_and_copy(rctx->lastc, req->src,
|
||||||
|
req->nbytes - ivsize,
|
||||||
|
ivsize, 0);
|
||||||
}
|
}
|
||||||
|
|
||||||
return atmel_aes_handle_queue(dd, &req->base);
|
return atmel_aes_handle_queue(dd, &req->base);
|
||||||
|
|
|
||||||
|
|
@ -4634,12 +4634,16 @@ static int spu_register_ahash(struct iproc_alg_s *driver_alg)
|
||||||
hash->halg.statesize = sizeof(struct spu_hash_export_s);
|
hash->halg.statesize = sizeof(struct spu_hash_export_s);
|
||||||
|
|
||||||
if (driver_alg->auth_info.mode != HASH_MODE_HMAC) {
|
if (driver_alg->auth_info.mode != HASH_MODE_HMAC) {
|
||||||
hash->setkey = ahash_setkey;
|
|
||||||
hash->init = ahash_init;
|
hash->init = ahash_init;
|
||||||
hash->update = ahash_update;
|
hash->update = ahash_update;
|
||||||
hash->final = ahash_final;
|
hash->final = ahash_final;
|
||||||
hash->finup = ahash_finup;
|
hash->finup = ahash_finup;
|
||||||
hash->digest = ahash_digest;
|
hash->digest = ahash_digest;
|
||||||
|
if ((driver_alg->auth_info.alg == HASH_ALG_AES) &&
|
||||||
|
((driver_alg->auth_info.mode == HASH_MODE_XCBC) ||
|
||||||
|
(driver_alg->auth_info.mode == HASH_MODE_CMAC))) {
|
||||||
|
hash->setkey = ahash_setkey;
|
||||||
|
}
|
||||||
} else {
|
} else {
|
||||||
hash->setkey = ahash_hmac_setkey;
|
hash->setkey = ahash_hmac_setkey;
|
||||||
hash->init = ahash_hmac_init;
|
hash->init = ahash_hmac_init;
|
||||||
|
|
|
||||||
|
|
@ -340,6 +340,7 @@ static struct ccp_dma_desc *ccp_alloc_dma_desc(struct ccp_dma_chan *chan,
|
||||||
desc->tx_desc.flags = flags;
|
desc->tx_desc.flags = flags;
|
||||||
desc->tx_desc.tx_submit = ccp_tx_submit;
|
desc->tx_desc.tx_submit = ccp_tx_submit;
|
||||||
desc->ccp = chan->ccp;
|
desc->ccp = chan->ccp;
|
||||||
|
INIT_LIST_HEAD(&desc->entry);
|
||||||
INIT_LIST_HEAD(&desc->pending);
|
INIT_LIST_HEAD(&desc->pending);
|
||||||
INIT_LIST_HEAD(&desc->active);
|
INIT_LIST_HEAD(&desc->active);
|
||||||
desc->status = DMA_IN_PROGRESS;
|
desc->status = DMA_IN_PROGRESS;
|
||||||
|
|
|
||||||
|
|
@ -1797,13 +1797,10 @@ static struct dma_chan *coh901318_xlate(struct of_phandle_args *dma_spec,
|
||||||
static int coh901318_config(struct coh901318_chan *cohc,
|
static int coh901318_config(struct coh901318_chan *cohc,
|
||||||
struct coh901318_params *param)
|
struct coh901318_params *param)
|
||||||
{
|
{
|
||||||
unsigned long flags;
|
|
||||||
const struct coh901318_params *p;
|
const struct coh901318_params *p;
|
||||||
int channel = cohc->id;
|
int channel = cohc->id;
|
||||||
void __iomem *virtbase = cohc->base->virtbase;
|
void __iomem *virtbase = cohc->base->virtbase;
|
||||||
|
|
||||||
spin_lock_irqsave(&cohc->lock, flags);
|
|
||||||
|
|
||||||
if (param)
|
if (param)
|
||||||
p = param;
|
p = param;
|
||||||
else
|
else
|
||||||
|
|
@ -1823,8 +1820,6 @@ static int coh901318_config(struct coh901318_chan *cohc,
|
||||||
coh901318_set_conf(cohc, p->config);
|
coh901318_set_conf(cohc, p->config);
|
||||||
coh901318_set_ctrl(cohc, p->ctrl_lli_last);
|
coh901318_set_ctrl(cohc, p->ctrl_lli_last);
|
||||||
|
|
||||||
spin_unlock_irqrestore(&cohc->lock, flags);
|
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -160,12 +160,14 @@ static void dwc_initialize_chan_idma32(struct dw_dma_chan *dwc)
|
||||||
|
|
||||||
static void dwc_initialize_chan_dw(struct dw_dma_chan *dwc)
|
static void dwc_initialize_chan_dw(struct dw_dma_chan *dwc)
|
||||||
{
|
{
|
||||||
|
struct dw_dma *dw = to_dw_dma(dwc->chan.device);
|
||||||
u32 cfghi = DWC_CFGH_FIFO_MODE;
|
u32 cfghi = DWC_CFGH_FIFO_MODE;
|
||||||
u32 cfglo = DWC_CFGL_CH_PRIOR(dwc->priority);
|
u32 cfglo = DWC_CFGL_CH_PRIOR(dwc->priority);
|
||||||
bool hs_polarity = dwc->dws.hs_polarity;
|
bool hs_polarity = dwc->dws.hs_polarity;
|
||||||
|
|
||||||
cfghi |= DWC_CFGH_DST_PER(dwc->dws.dst_id);
|
cfghi |= DWC_CFGH_DST_PER(dwc->dws.dst_id);
|
||||||
cfghi |= DWC_CFGH_SRC_PER(dwc->dws.src_id);
|
cfghi |= DWC_CFGH_SRC_PER(dwc->dws.src_id);
|
||||||
|
cfghi |= DWC_CFGH_PROTCTL(dw->pdata->protctl);
|
||||||
|
|
||||||
/* Set polarity of handshake interface */
|
/* Set polarity of handshake interface */
|
||||||
cfglo |= hs_polarity ? DWC_CFGL_HS_DST_POL | DWC_CFGL_HS_SRC_POL : 0;
|
cfglo |= hs_polarity ? DWC_CFGL_HS_DST_POL | DWC_CFGL_HS_SRC_POL : 0;
|
||||||
|
|
|
||||||
|
|
@ -162,6 +162,12 @@ dw_dma_parse_dt(struct platform_device *pdev)
|
||||||
pdata->multi_block[tmp] = 1;
|
pdata->multi_block[tmp] = 1;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
if (!of_property_read_u32(np, "snps,dma-protection-control", &tmp)) {
|
||||||
|
if (tmp > CHAN_PROTCTL_MASK)
|
||||||
|
return NULL;
|
||||||
|
pdata->protctl = tmp;
|
||||||
|
}
|
||||||
|
|
||||||
return pdata;
|
return pdata;
|
||||||
}
|
}
|
||||||
#else
|
#else
|
||||||
|
|
|
||||||
|
|
@ -200,6 +200,10 @@ enum dw_dma_msize {
|
||||||
#define DWC_CFGH_FCMODE (1 << 0)
|
#define DWC_CFGH_FCMODE (1 << 0)
|
||||||
#define DWC_CFGH_FIFO_MODE (1 << 1)
|
#define DWC_CFGH_FIFO_MODE (1 << 1)
|
||||||
#define DWC_CFGH_PROTCTL(x) ((x) << 2)
|
#define DWC_CFGH_PROTCTL(x) ((x) << 2)
|
||||||
|
#define DWC_CFGH_PROTCTL_DATA (0 << 2) /* data access - always set */
|
||||||
|
#define DWC_CFGH_PROTCTL_PRIV (1 << 2) /* privileged -> AHB HPROT[1] */
|
||||||
|
#define DWC_CFGH_PROTCTL_BUFFER (2 << 2) /* bufferable -> AHB HPROT[2] */
|
||||||
|
#define DWC_CFGH_PROTCTL_CACHE (4 << 2) /* cacheable -> AHB HPROT[3] */
|
||||||
#define DWC_CFGH_DS_UPD_EN (1 << 5)
|
#define DWC_CFGH_DS_UPD_EN (1 << 5)
|
||||||
#define DWC_CFGH_SS_UPD_EN (1 << 6)
|
#define DWC_CFGH_SS_UPD_EN (1 << 6)
|
||||||
#define DWC_CFGH_SRC_PER(x) ((x) << 7)
|
#define DWC_CFGH_SRC_PER(x) ((x) << 7)
|
||||||
|
|
|
||||||
|
|
@ -321,12 +321,10 @@ static int max8997_muic_handle_usb(struct max8997_muic_info *info,
|
||||||
{
|
{
|
||||||
int ret = 0;
|
int ret = 0;
|
||||||
|
|
||||||
if (usb_type == MAX8997_USB_HOST) {
|
ret = max8997_muic_set_path(info, info->path_usb, attached);
|
||||||
ret = max8997_muic_set_path(info, info->path_usb, attached);
|
if (ret < 0) {
|
||||||
if (ret < 0) {
|
dev_err(info->dev, "failed to update muic register\n");
|
||||||
dev_err(info->dev, "failed to update muic register\n");
|
return ret;
|
||||||
return ret;
|
|
||||||
}
|
|
||||||
}
|
}
|
||||||
|
|
||||||
switch (usb_type) {
|
switch (usb_type) {
|
||||||
|
|
|
||||||
|
|
@ -14,6 +14,7 @@
|
||||||
#include <linux/module.h>
|
#include <linux/module.h>
|
||||||
#include <linux/of_platform.h>
|
#include <linux/of_platform.h>
|
||||||
#include <linux/platform_device.h>
|
#include <linux/platform_device.h>
|
||||||
|
#include <linux/slab.h>
|
||||||
#include <soc/bcm2835/raspberrypi-firmware.h>
|
#include <soc/bcm2835/raspberrypi-firmware.h>
|
||||||
|
|
||||||
#define MBOX_MSG(chan, data28) (((data28) & ~0xf) | ((chan) & 0xf))
|
#define MBOX_MSG(chan, data28) (((data28) & ~0xf) | ((chan) & 0xf))
|
||||||
|
|
@ -21,8 +22,6 @@
|
||||||
#define MBOX_DATA28(msg) ((msg) & ~0xf)
|
#define MBOX_DATA28(msg) ((msg) & ~0xf)
|
||||||
#define MBOX_CHAN_PROPERTY 8
|
#define MBOX_CHAN_PROPERTY 8
|
||||||
|
|
||||||
#define MAX_RPI_FW_PROP_BUF_SIZE 32
|
|
||||||
|
|
||||||
static struct platform_device *rpi_hwmon;
|
static struct platform_device *rpi_hwmon;
|
||||||
|
|
||||||
struct rpi_firmware {
|
struct rpi_firmware {
|
||||||
|
|
@ -144,28 +143,30 @@ EXPORT_SYMBOL_GPL(rpi_firmware_property_list);
|
||||||
int rpi_firmware_property(struct rpi_firmware *fw,
|
int rpi_firmware_property(struct rpi_firmware *fw,
|
||||||
u32 tag, void *tag_data, size_t buf_size)
|
u32 tag, void *tag_data, size_t buf_size)
|
||||||
{
|
{
|
||||||
/* Single tags are very small (generally 8 bytes), so the
|
struct rpi_firmware_property_tag_header *header;
|
||||||
* stack should be safe.
|
|
||||||
*/
|
|
||||||
u8 data[sizeof(struct rpi_firmware_property_tag_header) +
|
|
||||||
MAX_RPI_FW_PROP_BUF_SIZE];
|
|
||||||
struct rpi_firmware_property_tag_header *header =
|
|
||||||
(struct rpi_firmware_property_tag_header *)data;
|
|
||||||
int ret;
|
int ret;
|
||||||
|
|
||||||
if (WARN_ON(buf_size > sizeof(data) - sizeof(*header)))
|
/* Some mailboxes can use over 1k bytes. Rather than checking
|
||||||
return -EINVAL;
|
* size and using stack or kmalloc depending on requirements,
|
||||||
|
* just use kmalloc. Mailboxes don't get called enough to worry
|
||||||
|
* too much about the time taken in the allocation.
|
||||||
|
*/
|
||||||
|
void *data = kmalloc(sizeof(*header) + buf_size, GFP_KERNEL);
|
||||||
|
|
||||||
|
if (!data)
|
||||||
|
return -ENOMEM;
|
||||||
|
|
||||||
|
header = data;
|
||||||
header->tag = tag;
|
header->tag = tag;
|
||||||
header->buf_size = buf_size;
|
header->buf_size = buf_size;
|
||||||
header->req_resp_size = 0;
|
header->req_resp_size = 0;
|
||||||
memcpy(data + sizeof(struct rpi_firmware_property_tag_header),
|
memcpy(data + sizeof(*header), tag_data, buf_size);
|
||||||
tag_data, buf_size);
|
|
||||||
|
|
||||||
ret = rpi_firmware_property_list(fw, &data, buf_size + sizeof(*header));
|
ret = rpi_firmware_property_list(fw, data, buf_size + sizeof(*header));
|
||||||
memcpy(tag_data,
|
|
||||||
data + sizeof(struct rpi_firmware_property_tag_header),
|
memcpy(tag_data, data + sizeof(*header), buf_size);
|
||||||
buf_size);
|
|
||||||
|
kfree(data);
|
||||||
|
|
||||||
return ret;
|
return ret;
|
||||||
}
|
}
|
||||||
|
|
|
||||||
|
|
@ -721,7 +721,7 @@ static void i810_dma_dispatch_vertex(struct drm_device *dev,
|
||||||
if (nbox > I810_NR_SAREA_CLIPRECTS)
|
if (nbox > I810_NR_SAREA_CLIPRECTS)
|
||||||
nbox = I810_NR_SAREA_CLIPRECTS;
|
nbox = I810_NR_SAREA_CLIPRECTS;
|
||||||
|
|
||||||
if (used > 4 * 1024)
|
if (used < 0 || used > 4 * 1024)
|
||||||
used = 0;
|
used = 0;
|
||||||
|
|
||||||
if (sarea_priv->dirty)
|
if (sarea_priv->dirty)
|
||||||
|
|
@ -1041,7 +1041,7 @@ static void i810_dma_dispatch_mc(struct drm_device *dev, struct drm_buf *buf, in
|
||||||
if (u != I810_BUF_CLIENT)
|
if (u != I810_BUF_CLIENT)
|
||||||
DRM_DEBUG("MC found buffer that isn't mine!\n");
|
DRM_DEBUG("MC found buffer that isn't mine!\n");
|
||||||
|
|
||||||
if (used > 4 * 1024)
|
if (used < 0 || used > 4 * 1024)
|
||||||
used = 0;
|
used = 0;
|
||||||
|
|
||||||
sarea_priv->dirty = 0x7f;
|
sarea_priv->dirty = 0x7f;
|
||||||
|
|
|
||||||
|
|
@ -53,12 +53,8 @@ static int msm_gpu_release(struct inode *inode, struct file *file)
|
||||||
struct msm_gpu_show_priv *show_priv = m->private;
|
struct msm_gpu_show_priv *show_priv = m->private;
|
||||||
struct msm_drm_private *priv = show_priv->dev->dev_private;
|
struct msm_drm_private *priv = show_priv->dev->dev_private;
|
||||||
struct msm_gpu *gpu = priv->gpu;
|
struct msm_gpu *gpu = priv->gpu;
|
||||||
int ret;
|
|
||||||
|
|
||||||
ret = mutex_lock_interruptible(&show_priv->dev->struct_mutex);
|
|
||||||
if (ret)
|
|
||||||
return ret;
|
|
||||||
|
|
||||||
|
mutex_lock(&show_priv->dev->struct_mutex);
|
||||||
gpu->funcs->gpu_state_put(show_priv->state);
|
gpu->funcs->gpu_state_put(show_priv->state);
|
||||||
mutex_unlock(&show_priv->dev->struct_mutex);
|
mutex_unlock(&show_priv->dev->struct_mutex);
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -423,7 +423,7 @@ static void sun4i_tcon0_mode_set_rgb(struct sun4i_tcon *tcon,
|
||||||
|
|
||||||
WARN_ON(!tcon->quirks->has_channel_0);
|
WARN_ON(!tcon->quirks->has_channel_0);
|
||||||
|
|
||||||
tcon->dclk_min_div = 6;
|
tcon->dclk_min_div = 1;
|
||||||
tcon->dclk_max_div = 127;
|
tcon->dclk_max_div = 127;
|
||||||
sun4i_tcon0_mode_set_common(tcon, mode);
|
sun4i_tcon0_mode_set_common(tcon, mode);
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -59,7 +59,7 @@ static inline u32 host1x_uclass_incr_syncpt_r(void)
|
||||||
host1x_uclass_incr_syncpt_r()
|
host1x_uclass_incr_syncpt_r()
|
||||||
static inline u32 host1x_uclass_incr_syncpt_cond_f(u32 v)
|
static inline u32 host1x_uclass_incr_syncpt_cond_f(u32 v)
|
||||||
{
|
{
|
||||||
return (v & 0xff) << 8;
|
return (v & 0xff) << 10;
|
||||||
}
|
}
|
||||||
#define HOST1X_UCLASS_INCR_SYNCPT_COND_F(v) \
|
#define HOST1X_UCLASS_INCR_SYNCPT_COND_F(v) \
|
||||||
host1x_uclass_incr_syncpt_cond_f(v)
|
host1x_uclass_incr_syncpt_cond_f(v)
|
||||||
|
|
|
||||||
|
|
@ -655,10 +655,13 @@ static ssize_t cyc_threshold_store(struct device *dev,
|
||||||
|
|
||||||
if (kstrtoul(buf, 16, &val))
|
if (kstrtoul(buf, 16, &val))
|
||||||
return -EINVAL;
|
return -EINVAL;
|
||||||
|
|
||||||
|
/* mask off max threshold before checking min value */
|
||||||
|
val &= ETM_CYC_THRESHOLD_MASK;
|
||||||
if (val < drvdata->ccitmin)
|
if (val < drvdata->ccitmin)
|
||||||
return -EINVAL;
|
return -EINVAL;
|
||||||
|
|
||||||
config->ccctlr = val & ETM_CYC_THRESHOLD_MASK;
|
config->ccctlr = val;
|
||||||
return size;
|
return size;
|
||||||
}
|
}
|
||||||
static DEVICE_ATTR_RW(cyc_threshold);
|
static DEVICE_ATTR_RW(cyc_threshold);
|
||||||
|
|
@ -689,14 +692,16 @@ static ssize_t bb_ctrl_store(struct device *dev,
|
||||||
return -EINVAL;
|
return -EINVAL;
|
||||||
if (!drvdata->nr_addr_cmp)
|
if (!drvdata->nr_addr_cmp)
|
||||||
return -EINVAL;
|
return -EINVAL;
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Bit[7:0] selects which address range comparator is used for
|
* Bit[8] controls include(1) / exclude(0), bits[0-7] select
|
||||||
* branch broadcast control.
|
* individual range comparators. If include then at least 1
|
||||||
|
* range must be selected.
|
||||||
*/
|
*/
|
||||||
if (BMVAL(val, 0, 7) > drvdata->nr_addr_cmp)
|
if ((val & BIT(8)) && (BMVAL(val, 0, 7) == 0))
|
||||||
return -EINVAL;
|
return -EINVAL;
|
||||||
|
|
||||||
config->bb_ctrl = val;
|
config->bb_ctrl = val & GENMASK(8, 0);
|
||||||
return size;
|
return size;
|
||||||
}
|
}
|
||||||
static DEVICE_ATTR_RW(bb_ctrl);
|
static DEVICE_ATTR_RW(bb_ctrl);
|
||||||
|
|
@ -1329,8 +1334,8 @@ static ssize_t seq_event_store(struct device *dev,
|
||||||
|
|
||||||
spin_lock(&drvdata->spinlock);
|
spin_lock(&drvdata->spinlock);
|
||||||
idx = config->seq_idx;
|
idx = config->seq_idx;
|
||||||
/* RST, bits[7:0] */
|
/* Seq control has two masks B[15:8] F[7:0] */
|
||||||
config->seq_ctrl[idx] = val & 0xFF;
|
config->seq_ctrl[idx] = val & 0xFFFF;
|
||||||
spin_unlock(&drvdata->spinlock);
|
spin_unlock(&drvdata->spinlock);
|
||||||
return size;
|
return size;
|
||||||
}
|
}
|
||||||
|
|
@ -1585,7 +1590,7 @@ static ssize_t res_ctrl_store(struct device *dev,
|
||||||
if (idx % 2 != 0)
|
if (idx % 2 != 0)
|
||||||
/* PAIRINV, bit[21] */
|
/* PAIRINV, bit[21] */
|
||||||
val &= ~BIT(21);
|
val &= ~BIT(21);
|
||||||
config->res_ctrl[idx] = val;
|
config->res_ctrl[idx] = val & GENMASK(21, 0);
|
||||||
spin_unlock(&drvdata->spinlock);
|
spin_unlock(&drvdata->spinlock);
|
||||||
return size;
|
return size;
|
||||||
}
|
}
|
||||||
|
|
|
||||||
|
|
@ -1090,7 +1090,8 @@ static int i2c_imx_probe(struct platform_device *pdev)
|
||||||
/* Get I2C clock */
|
/* Get I2C clock */
|
||||||
i2c_imx->clk = devm_clk_get(&pdev->dev, NULL);
|
i2c_imx->clk = devm_clk_get(&pdev->dev, NULL);
|
||||||
if (IS_ERR(i2c_imx->clk)) {
|
if (IS_ERR(i2c_imx->clk)) {
|
||||||
dev_err(&pdev->dev, "can't get I2C clock\n");
|
if (PTR_ERR(i2c_imx->clk) != -EPROBE_DEFER)
|
||||||
|
dev_err(&pdev->dev, "can't get I2C clock\n");
|
||||||
return PTR_ERR(i2c_imx->clk);
|
return PTR_ERR(i2c_imx->clk);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -253,14 +253,14 @@ static int of_i2c_notify(struct notifier_block *nb, unsigned long action,
|
||||||
}
|
}
|
||||||
|
|
||||||
client = of_i2c_register_device(adap, rd->dn);
|
client = of_i2c_register_device(adap, rd->dn);
|
||||||
put_device(&adap->dev);
|
|
||||||
|
|
||||||
if (IS_ERR(client)) {
|
if (IS_ERR(client)) {
|
||||||
dev_err(&adap->dev, "failed to create client for '%pOF'\n",
|
dev_err(&adap->dev, "failed to create client for '%pOF'\n",
|
||||||
rd->dn);
|
rd->dn);
|
||||||
|
put_device(&adap->dev);
|
||||||
of_node_clear_flag(rd->dn, OF_POPULATED);
|
of_node_clear_flag(rd->dn, OF_POPULATED);
|
||||||
return notifier_from_errno(PTR_ERR(client));
|
return notifier_from_errno(PTR_ERR(client));
|
||||||
}
|
}
|
||||||
|
put_device(&adap->dev);
|
||||||
break;
|
break;
|
||||||
case OF_RECONFIG_CHANGE_REMOVE:
|
case OF_RECONFIG_CHANGE_REMOVE:
|
||||||
/* already depopulated? */
|
/* already depopulated? */
|
||||||
|
|
|
||||||
|
|
@ -2798,7 +2798,8 @@ static int peer_abort(struct c4iw_dev *dev, struct sk_buff *skb)
|
||||||
break;
|
break;
|
||||||
case MPA_REQ_SENT:
|
case MPA_REQ_SENT:
|
||||||
(void)stop_ep_timer(ep);
|
(void)stop_ep_timer(ep);
|
||||||
if (mpa_rev == 1 || (mpa_rev == 2 && ep->tried_with_mpa_v1))
|
if (status != CPL_ERR_CONN_RESET || mpa_rev == 1 ||
|
||||||
|
(mpa_rev == 2 && ep->tried_with_mpa_v1))
|
||||||
connect_reply_upcall(ep, -ECONNRESET);
|
connect_reply_upcall(ep, -ECONNRESET);
|
||||||
else {
|
else {
|
||||||
/*
|
/*
|
||||||
|
|
|
||||||
|
|
@ -1074,6 +1074,8 @@ static void log_state_transition(struct hfi1_pportdata *ppd, u32 state);
|
||||||
static void log_physical_state(struct hfi1_pportdata *ppd, u32 state);
|
static void log_physical_state(struct hfi1_pportdata *ppd, u32 state);
|
||||||
static int wait_physical_linkstate(struct hfi1_pportdata *ppd, u32 state,
|
static int wait_physical_linkstate(struct hfi1_pportdata *ppd, u32 state,
|
||||||
int msecs);
|
int msecs);
|
||||||
|
static int wait_phys_link_out_of_offline(struct hfi1_pportdata *ppd,
|
||||||
|
int msecs);
|
||||||
static void read_planned_down_reason_code(struct hfi1_devdata *dd, u8 *pdrrc);
|
static void read_planned_down_reason_code(struct hfi1_devdata *dd, u8 *pdrrc);
|
||||||
static void read_link_down_reason(struct hfi1_devdata *dd, u8 *ldr);
|
static void read_link_down_reason(struct hfi1_devdata *dd, u8 *ldr);
|
||||||
static void handle_temp_err(struct hfi1_devdata *dd);
|
static void handle_temp_err(struct hfi1_devdata *dd);
|
||||||
|
|
@ -10769,13 +10771,15 @@ int set_link_state(struct hfi1_pportdata *ppd, u32 state)
|
||||||
break;
|
break;
|
||||||
|
|
||||||
ppd->port_error_action = 0;
|
ppd->port_error_action = 0;
|
||||||
ppd->host_link_state = HLS_DN_POLL;
|
|
||||||
|
|
||||||
if (quick_linkup) {
|
if (quick_linkup) {
|
||||||
/* quick linkup does not go into polling */
|
/* quick linkup does not go into polling */
|
||||||
ret = do_quick_linkup(dd);
|
ret = do_quick_linkup(dd);
|
||||||
} else {
|
} else {
|
||||||
ret1 = set_physical_link_state(dd, PLS_POLLING);
|
ret1 = set_physical_link_state(dd, PLS_POLLING);
|
||||||
|
if (!ret1)
|
||||||
|
ret1 = wait_phys_link_out_of_offline(ppd,
|
||||||
|
3000);
|
||||||
if (ret1 != HCMD_SUCCESS) {
|
if (ret1 != HCMD_SUCCESS) {
|
||||||
dd_dev_err(dd,
|
dd_dev_err(dd,
|
||||||
"Failed to transition to Polling link state, return 0x%x\n",
|
"Failed to transition to Polling link state, return 0x%x\n",
|
||||||
|
|
@ -10783,6 +10787,14 @@ int set_link_state(struct hfi1_pportdata *ppd, u32 state)
|
||||||
ret = -EINVAL;
|
ret = -EINVAL;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Change the host link state after requesting DC8051 to
|
||||||
|
* change its physical state so that we can ignore any
|
||||||
|
* interrupt with stale LNI(XX) error, which will not be
|
||||||
|
* cleared until DC8051 transitions to Polling state.
|
||||||
|
*/
|
||||||
|
ppd->host_link_state = HLS_DN_POLL;
|
||||||
ppd->offline_disabled_reason =
|
ppd->offline_disabled_reason =
|
||||||
HFI1_ODR_MASK(OPA_LINKDOWN_REASON_NONE);
|
HFI1_ODR_MASK(OPA_LINKDOWN_REASON_NONE);
|
||||||
/*
|
/*
|
||||||
|
|
@ -12914,6 +12926,39 @@ static int wait_phys_link_offline_substates(struct hfi1_pportdata *ppd,
|
||||||
return read_state;
|
return read_state;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
/*
|
||||||
|
* wait_phys_link_out_of_offline - wait for any out of offline state
|
||||||
|
* @ppd: port device
|
||||||
|
* @msecs: the number of milliseconds to wait
|
||||||
|
*
|
||||||
|
* Wait up to msecs milliseconds for any out of offline physical link
|
||||||
|
* state change to occur.
|
||||||
|
* Returns 0 if at least one state is reached, otherwise -ETIMEDOUT.
|
||||||
|
*/
|
||||||
|
static int wait_phys_link_out_of_offline(struct hfi1_pportdata *ppd,
|
||||||
|
int msecs)
|
||||||
|
{
|
||||||
|
u32 read_state;
|
||||||
|
unsigned long timeout;
|
||||||
|
|
||||||
|
timeout = jiffies + msecs_to_jiffies(msecs);
|
||||||
|
while (1) {
|
||||||
|
read_state = read_physical_state(ppd->dd);
|
||||||
|
if ((read_state & 0xF0) != PLS_OFFLINE)
|
||||||
|
break;
|
||||||
|
if (time_after(jiffies, timeout)) {
|
||||||
|
dd_dev_err(ppd->dd,
|
||||||
|
"timeout waiting for phy link out of offline. Read state 0x%x, %dms\n",
|
||||||
|
read_state, msecs);
|
||||||
|
return -ETIMEDOUT;
|
||||||
|
}
|
||||||
|
usleep_range(1950, 2050); /* sleep 2ms-ish */
|
||||||
|
}
|
||||||
|
|
||||||
|
log_state_transition(ppd, read_state);
|
||||||
|
return read_state;
|
||||||
|
}
|
||||||
|
|
||||||
#define CLEAR_STATIC_RATE_CONTROL_SMASK(r) \
|
#define CLEAR_STATIC_RATE_CONTROL_SMASK(r) \
|
||||||
(r &= ~SEND_CTXT_CHECK_ENABLE_DISALLOW_PBC_STATIC_RATE_CONTROL_SMASK)
|
(r &= ~SEND_CTXT_CHECK_ENABLE_DISALLOW_PBC_STATIC_RATE_CONTROL_SMASK)
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -57,7 +57,6 @@
|
||||||
|
|
||||||
#define HFI1_VNIC_TXREQ_NAME_LEN 32
|
#define HFI1_VNIC_TXREQ_NAME_LEN 32
|
||||||
#define HFI1_VNIC_SDMA_DESC_WTRMRK 64
|
#define HFI1_VNIC_SDMA_DESC_WTRMRK 64
|
||||||
#define HFI1_VNIC_SDMA_RETRY_COUNT 1
|
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* struct vnic_txreq - VNIC transmit descriptor
|
* struct vnic_txreq - VNIC transmit descriptor
|
||||||
|
|
@ -67,7 +66,6 @@
|
||||||
* @pad: pad buffer
|
* @pad: pad buffer
|
||||||
* @plen: pad length
|
* @plen: pad length
|
||||||
* @pbc_val: pbc value
|
* @pbc_val: pbc value
|
||||||
* @retry_count: tx retry count
|
|
||||||
*/
|
*/
|
||||||
struct vnic_txreq {
|
struct vnic_txreq {
|
||||||
struct sdma_txreq txreq;
|
struct sdma_txreq txreq;
|
||||||
|
|
@ -77,8 +75,6 @@ struct vnic_txreq {
|
||||||
unsigned char pad[HFI1_VNIC_MAX_PAD];
|
unsigned char pad[HFI1_VNIC_MAX_PAD];
|
||||||
u16 plen;
|
u16 plen;
|
||||||
__le64 pbc_val;
|
__le64 pbc_val;
|
||||||
|
|
||||||
u32 retry_count;
|
|
||||||
};
|
};
|
||||||
|
|
||||||
static void vnic_sdma_complete(struct sdma_txreq *txreq,
|
static void vnic_sdma_complete(struct sdma_txreq *txreq,
|
||||||
|
|
@ -196,7 +192,6 @@ int hfi1_vnic_send_dma(struct hfi1_devdata *dd, u8 q_idx,
|
||||||
ret = build_vnic_tx_desc(sde, tx, pbc);
|
ret = build_vnic_tx_desc(sde, tx, pbc);
|
||||||
if (unlikely(ret))
|
if (unlikely(ret))
|
||||||
goto free_desc;
|
goto free_desc;
|
||||||
tx->retry_count = 0;
|
|
||||||
|
|
||||||
ret = sdma_send_txreq(sde, &vnic_sdma->wait, &tx->txreq,
|
ret = sdma_send_txreq(sde, &vnic_sdma->wait, &tx->txreq,
|
||||||
vnic_sdma->pkts_sent);
|
vnic_sdma->pkts_sent);
|
||||||
|
|
@ -238,14 +233,14 @@ static int hfi1_vnic_sdma_sleep(struct sdma_engine *sde,
|
||||||
struct hfi1_vnic_sdma *vnic_sdma =
|
struct hfi1_vnic_sdma *vnic_sdma =
|
||||||
container_of(wait, struct hfi1_vnic_sdma, wait);
|
container_of(wait, struct hfi1_vnic_sdma, wait);
|
||||||
struct hfi1_ibdev *dev = &vnic_sdma->dd->verbs_dev;
|
struct hfi1_ibdev *dev = &vnic_sdma->dd->verbs_dev;
|
||||||
struct vnic_txreq *tx = container_of(txreq, struct vnic_txreq, txreq);
|
|
||||||
|
|
||||||
if (sdma_progress(sde, seq, txreq))
|
write_seqlock(&dev->iowait_lock);
|
||||||
if (tx->retry_count++ < HFI1_VNIC_SDMA_RETRY_COUNT)
|
if (sdma_progress(sde, seq, txreq)) {
|
||||||
return -EAGAIN;
|
write_sequnlock(&dev->iowait_lock);
|
||||||
|
return -EAGAIN;
|
||||||
|
}
|
||||||
|
|
||||||
vnic_sdma->state = HFI1_VNIC_SDMA_Q_DEFERRED;
|
vnic_sdma->state = HFI1_VNIC_SDMA_Q_DEFERRED;
|
||||||
write_seqlock(&dev->iowait_lock);
|
|
||||||
if (list_empty(&vnic_sdma->wait.list))
|
if (list_empty(&vnic_sdma->wait.list))
|
||||||
iowait_queue(pkts_sent, wait, &sde->dmawait);
|
iowait_queue(pkts_sent, wait, &sde->dmawait);
|
||||||
write_sequnlock(&dev->iowait_lock);
|
write_sequnlock(&dev->iowait_lock);
|
||||||
|
|
|
||||||
Some files were not shown because too many files have changed in this diff Show more
Loading…
Reference in a new issue