From a2a3dfb8efc5d14cf39358ae0ec1da39667c2e6c Mon Sep 17 00:00:00 2001 From: john stultz Date: Tue, 25 Oct 2011 11:46:10 -0700 Subject: [PATCH 01/56] clocksource: m86k: Convert to clocksource_register_hz/khz Updated to merge the valid bits of the two m68k patches. This converts the m86k clocksources to use clocksource_register_hz/khz This is untested, so any assistance in testing would be appreciated! CC: Geert Uytterhoeven CC: Greg Ungerer Signed-off-by: John Stultz Signed-off-by: Greg Ungerer --- arch/m68k/platform/68328/timers.c | 4 +--- arch/m68k/platform/coldfire/dma_timer.c | 5 +---- arch/m68k/platform/coldfire/pit.c | 4 +--- arch/m68k/platform/coldfire/sltimers.c | 4 +--- arch/m68k/platform/coldfire/timers.c | 4 +--- 5 files changed, 5 insertions(+), 16 deletions(-) diff --git a/arch/m68k/platform/68328/timers.c b/arch/m68k/platform/68328/timers.c index 309f725995bf..f2678866067b 100644 --- a/arch/m68k/platform/68328/timers.c +++ b/arch/m68k/platform/68328/timers.c @@ -93,7 +93,6 @@ static struct clocksource m68328_clk = { .name = "timer", .rating = 250, .read = m68328_read_clk, - .shift = 20, .mask = CLOCKSOURCE_MASK(32), .flags = CLOCK_SOURCE_IS_CONTINUOUS, }; @@ -115,8 +114,7 @@ void hw_timer_init(void) /* Enable timer 1 */ TCTL |= TCTL_TEN; - m68328_clk.mult = clocksource_hz2mult(TICKS_PER_JIFFY*HZ, m68328_clk.shift); - clocksource_register(&m68328_clk); + clocksource_register_hz(&m68328_clk, TICKS_PER_JIFFY*HZ); } /***************************************************************************/ diff --git a/arch/m68k/platform/coldfire/dma_timer.c b/arch/m68k/platform/coldfire/dma_timer.c index a5f562823d7a..235ad57c4707 100644 --- a/arch/m68k/platform/coldfire/dma_timer.c +++ b/arch/m68k/platform/coldfire/dma_timer.c @@ -44,7 +44,6 @@ static struct clocksource clocksource_cf_dt = { .rating = 200, .read = cf_dt_get_cycles, .mask = CLOCKSOURCE_MASK(32), - .shift = 20, .flags = CLOCK_SOURCE_IS_CONTINUOUS, }; @@ -60,9 +59,7 @@ static int __init init_cf_dt_clocksource(void) __raw_writeb(0x00, DTER0); __raw_writel(0x00000000, DTRR0); __raw_writew(DMA_DTMR_CLK_DIV_16 | DMA_DTMR_ENABLE, DTMR0); - clocksource_cf_dt.mult = clocksource_hz2mult(DMA_FREQ, - clocksource_cf_dt.shift); - return clocksource_register(&clocksource_cf_dt); + return clocksource_register_hz(&clocksource_cf_dt, DMA_FREQ); } arch_initcall(init_cf_dt_clocksource); diff --git a/arch/m68k/platform/coldfire/pit.c b/arch/m68k/platform/coldfire/pit.c index c2b980926bec..02663d25822d 100644 --- a/arch/m68k/platform/coldfire/pit.c +++ b/arch/m68k/platform/coldfire/pit.c @@ -144,7 +144,6 @@ static struct clocksource pit_clk = { .name = "pit", .rating = 100, .read = pit_read_clk, - .shift = 20, .mask = CLOCKSOURCE_MASK(32), }; @@ -162,8 +161,7 @@ void hw_timer_init(void) setup_irq(MCFINT_VECBASE + MCFINT_PIT1, &pit_irq); - pit_clk.mult = clocksource_hz2mult(FREQ, pit_clk.shift); - clocksource_register(&pit_clk); + clocksource_register_hz(&pit_clk, FREQ); } /***************************************************************************/ diff --git a/arch/m68k/platform/coldfire/sltimers.c b/arch/m68k/platform/coldfire/sltimers.c index 6a85daf9a7fd..b7f822b552bb 100644 --- a/arch/m68k/platform/coldfire/sltimers.c +++ b/arch/m68k/platform/coldfire/sltimers.c @@ -114,7 +114,6 @@ static struct clocksource mcfslt_clk = { .name = "slt", .rating = 250, .read = mcfslt_read_clk, - .shift = 20, .mask = CLOCKSOURCE_MASK(32), .flags = CLOCK_SOURCE_IS_CONTINUOUS, }; @@ -136,8 +135,7 @@ void hw_timer_init(void) setup_irq(MCF_IRQ_TIMER, &mcfslt_timer_irq); - mcfslt_clk.mult = clocksource_hz2mult(MCF_BUSCLK, mcfslt_clk.shift); - clocksource_register(&mcfslt_clk); + clocksource_register_hz(&mcfslt_clk, MCF_BUSCLK); #ifdef CONFIG_HIGHPROFILE mcfslt_profile_init(); diff --git a/arch/m68k/platform/coldfire/timers.c b/arch/m68k/platform/coldfire/timers.c index 60242f65fea9..0d90da32fcdb 100644 --- a/arch/m68k/platform/coldfire/timers.c +++ b/arch/m68k/platform/coldfire/timers.c @@ -88,7 +88,6 @@ static struct clocksource mcftmr_clk = { .name = "tmr", .rating = 250, .read = mcftmr_read_clk, - .shift = 20, .mask = CLOCKSOURCE_MASK(32), .flags = CLOCK_SOURCE_IS_CONTINUOUS, }; @@ -109,8 +108,7 @@ void hw_timer_init(void) __raw_writew(MCFTIMER_TMR_ENORI | MCFTIMER_TMR_CLK16 | MCFTIMER_TMR_RESTART | MCFTIMER_TMR_ENABLE, TA(MCFTIMER_TMR)); - mcftmr_clk.mult = clocksource_hz2mult(FREQ, mcftmr_clk.shift); - clocksource_register(&mcftmr_clk); + clocksource_register_hz(&mcftmr_clk, FREQ); setup_irq(MCF_IRQ_TIMER, &mcftmr_timer_irq); From d85b40948654dee3be1d8e43b0fce511c1b42d78 Mon Sep 17 00:00:00 2001 From: Mark Brown Date: Wed, 26 Oct 2011 09:51:55 +0200 Subject: [PATCH 02/56] m68k: Fall back to __gpio_to_irq() for non-arch GPIOs gpiolib provides __gpio_to_irq() to map gpiolib gpios to interrupts - hook that up on m68k. Signed-off-by: Mark Brown Signed-off-by: Greg Ungerer --- arch/m68k/include/asm/gpio.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/m68k/include/asm/gpio.h b/arch/m68k/include/asm/gpio.h index b2046839f4b2..00d0071de4c3 100644 --- a/arch/m68k/include/asm/gpio.h +++ b/arch/m68k/include/asm/gpio.h @@ -225,7 +225,8 @@ static inline void gpio_set_value(unsigned gpio, int value) static inline int gpio_to_irq(unsigned gpio) { - return (gpio < MCFGPIO_IRQ_MAX) ? gpio + MCFGPIO_IRQ_VECBASE : -EINVAL; + return (gpio < MCFGPIO_IRQ_MAX) ? gpio + MCFGPIO_IRQ_VECBASE + : __gpio_to_irq(gpio); } static inline int irq_to_gpio(unsigned irq) From ed3da2c443e8d566a8eb0ab86069aefc7e928c74 Mon Sep 17 00:00:00 2001 From: Greg Ungerer Date: Tue, 30 Aug 2011 15:30:09 +1000 Subject: [PATCH 03/56] m68knommu: remove unused fasthandler declaration The fasthandler code was removed long ago. Remove the now unused declaration of it. Signed-off-by: Greg Ungerer --- arch/m68k/platform/coldfire/entry.S | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/m68k/platform/coldfire/entry.S b/arch/m68k/platform/coldfire/entry.S index 3157461a8d1d..f567a163bc40 100644 --- a/arch/m68k/platform/coldfire/entry.S +++ b/arch/m68k/platform/coldfire/entry.S @@ -54,7 +54,6 @@ sw_usp: .globl ret_from_signal .globl sys_call_table .globl inthandler -.globl fasthandler enosys: mov.l #sys_ni_syscall,%d3 From 409ee2455c95495e182379883a568df1d40f5864 Mon Sep 17 00:00:00 2001 From: Greg Ungerer Date: Tue, 30 Aug 2011 16:11:05 +1000 Subject: [PATCH 04/56] m68k: merge the init_task code for mmu and non-mmu targets The init_task code can be the same for both mmu and non-mmu targets. None of the alignment carried out in the the current init_task code is necessary. The linker script takes care of aligning the init_thread structure to a THREAD SIZE boundary, and that is all we need. So use the init_task.c code for all target types, that makes m68k code consistent with what most other architectures do. Signed-off-by: Greg Ungerer Acked-by: Geert Uytterhoeven --- arch/m68k/kernel/Makefile | 7 ++----- arch/m68k/kernel/init_task.c | 3 +-- arch/m68k/kernel/process_mm.c | 16 ---------------- 3 files changed, 3 insertions(+), 23 deletions(-) diff --git a/arch/m68k/kernel/Makefile b/arch/m68k/kernel/Makefile index c5696193281a..ea0a39671438 100644 --- a/arch/m68k/kernel/Makefile +++ b/arch/m68k/kernel/Makefile @@ -6,15 +6,12 @@ extra-$(CONFIG_MMU) := head.o extra-$(CONFIG_SUN3) := sun3-head.o extra-y += vmlinux.lds -obj-y := entry.o irq.o m68k_ksyms.o module.o process.o ptrace.o setup.o \ - signal.o sys_m68k.o syscalltable.o time.o traps.o +obj-y := entry.o init_task.o irq.o m68k_ksyms.o module.o process.o ptrace.o +obj-y += setup.o signal.o sys_m68k.o syscalltable.o time.o traps.o obj-$(CONFIG_MMU) += ints.o vectors.o ifndef CONFIG_MMU_SUN3 obj-y += dma.o endif -ifndef CONFIG_MMU -obj-y += init_task.o -endif diff --git a/arch/m68k/kernel/init_task.c b/arch/m68k/kernel/init_task.c index cbf9dc3cc51d..c744cfc6bfa1 100644 --- a/arch/m68k/kernel/init_task.c +++ b/arch/m68k/kernel/init_task.c @@ -19,7 +19,6 @@ static struct sighand_struct init_sighand = INIT_SIGHAND(init_sighand); * * All other task structs will be allocated on slabs in fork.c */ -__asm__(".align 4"); struct task_struct init_task = INIT_TASK(init_task); EXPORT_SYMBOL(init_task); @@ -27,7 +26,7 @@ EXPORT_SYMBOL(init_task); /* * Initial thread structure. * - * We need to make sure that this is 8192-byte aligned due to the + * We need to make sure that this is THREAD size aligned due to the * way process stacks are handled. This is done by having a special * "init_task" linker map entry.. */ diff --git a/arch/m68k/kernel/process_mm.c b/arch/m68k/kernel/process_mm.c index 1bc223aa07ec..58a3253f3eb9 100644 --- a/arch/m68k/kernel/process_mm.c +++ b/arch/m68k/kernel/process_mm.c @@ -33,22 +33,6 @@ #include #include -/* - * Initial task/thread structure. Make this a per-architecture thing, - * because different architectures tend to have different - * alignment requirements and potentially different initial - * setup. - */ -static struct signal_struct init_signals = INIT_SIGNALS(init_signals); -static struct sighand_struct init_sighand = INIT_SIGHAND(init_sighand); -union thread_union init_thread_union __init_task_data - __attribute__((aligned(THREAD_SIZE))) = - { INIT_THREAD_INFO(init_task) }; - -/* initial task structure */ -struct task_struct init_task = INIT_TASK(init_task); - -EXPORT_SYMBOL(init_task); asmlinkage void ret_from_fork(void); From 8d362b0dea1a35bea8d7d281317eb7ccb713edcb Mon Sep 17 00:00:00 2001 From: Greg Ungerer Date: Fri, 2 Sep 2011 14:20:06 +1000 Subject: [PATCH 05/56] m68k: remove duplicate asm offset for task thread.info We have a duplicate name and definition for the offset of the thread.info struct within the task struct in our asm-offsets.c code. Remove one of them, and consolidate to use a single define, TASK_INFO. Signed-off-by: Greg Ungerer Acked-by: Geert Uytterhoeven --- arch/m68k/include/asm/thread_info.h | 2 +- arch/m68k/kernel/asm-offsets.c | 1 - 2 files changed, 1 insertion(+), 2 deletions(-) diff --git a/arch/m68k/include/asm/thread_info.h b/arch/m68k/include/asm/thread_info.h index 790988967ba7..e4e2159ca6ec 100644 --- a/arch/m68k/include/asm/thread_info.h +++ b/arch/m68k/include/asm/thread_info.h @@ -57,7 +57,7 @@ struct thread_info { #define task_thread_info(tsk) ((struct thread_info *) NULL) #else #include -#define task_thread_info(tsk) ((struct thread_info *)((char *)tsk+TASK_TINFO)) +#define task_thread_info(tsk) ((struct thread_info *)((char *)tsk+TASK_INFO)) #endif #define init_thread_info (init_task.thread.info) diff --git a/arch/m68k/kernel/asm-offsets.c b/arch/m68k/kernel/asm-offsets.c index 983fed9d469b..f6a54e203e8e 100644 --- a/arch/m68k/kernel/asm-offsets.c +++ b/arch/m68k/kernel/asm-offsets.c @@ -25,7 +25,6 @@ int main(void) DEFINE(TASK_THREAD, offsetof(struct task_struct, thread)); DEFINE(TASK_MM, offsetof(struct task_struct, mm)); DEFINE(TASK_INFO, offsetof(struct task_struct, thread.info)); - DEFINE(TASK_TINFO, offsetof(struct task_struct, thread.info)); /* offsets into the thread struct */ DEFINE(THREAD_KSP, offsetof(struct thread_struct, ksp)); From d25ba98afce7c87afa39f553a3ff8effed87db03 Mon Sep 17 00:00:00 2001 From: Greg Ungerer Date: Fri, 2 Sep 2011 14:29:34 +1000 Subject: [PATCH 06/56] m68k: remove thread_info struct from thread struct Currently on m68k we have a comeplete thread_info structure stored inside of the thread_struct, and we also have it in the initial part of the kernel stack. Mostly the code currently uses the one inside of the thread_struct, only using the "task" pointer from the stack based one. This is wasteful and confusing, we should only have the single instance of thread_info inside the stack page. And this is the norm for all other architectures. This change makes m68k handle thread_info consistently on both MMU enabled and non-MMU setups. Signed-off-by: Greg Ungerer --- arch/m68k/include/asm/processor.h | 2 -- arch/m68k/include/asm/thread_info.h | 30 ---------------------------- arch/m68k/kernel/asm-offsets.c | 2 +- arch/m68k/kernel/entry_mm.S | 31 +++++++++++++++++++---------- 4 files changed, 22 insertions(+), 43 deletions(-) diff --git a/arch/m68k/include/asm/processor.h b/arch/m68k/include/asm/processor.h index 568facf30276..7ec06096a6fb 100644 --- a/arch/m68k/include/asm/processor.h +++ b/arch/m68k/include/asm/processor.h @@ -88,14 +88,12 @@ struct thread_struct { unsigned long fp[8*3]; unsigned long fpcntl[3]; /* fp control regs */ unsigned char fpstate[FPSTATESIZE]; /* floating point state */ - struct thread_info info; }; #define INIT_THREAD { \ .ksp = sizeof(init_stack) + (unsigned long) init_stack, \ .sr = PS_S, \ .fs = __KERNEL_DS, \ - .info = INIT_THREAD_INFO(init_task), \ } #ifdef CONFIG_MMU diff --git a/arch/m68k/include/asm/thread_info.h b/arch/m68k/include/asm/thread_info.h index e4e2159ca6ec..01cef3ceff46 100644 --- a/arch/m68k/include/asm/thread_info.h +++ b/arch/m68k/include/asm/thread_info.h @@ -47,34 +47,6 @@ struct thread_info { #define init_stack (init_thread_union.stack) -#ifdef CONFIG_MMU - -#ifndef __ASSEMBLY__ -#include -#endif - -#ifdef ASM_OFFSETS_C -#define task_thread_info(tsk) ((struct thread_info *) NULL) -#else -#include -#define task_thread_info(tsk) ((struct thread_info *)((char *)tsk+TASK_INFO)) -#endif - -#define init_thread_info (init_task.thread.info) -#define task_stack_page(tsk) ((tsk)->stack) -#define current_thread_info() task_thread_info(current) - -#define __HAVE_THREAD_FUNCTIONS - -#define setup_thread_stack(p, org) ({ \ - *(struct task_struct **)(p)->stack = (p); \ - task_thread_info(p)->task = (p); \ -}) - -#define end_of_stack(p) ((unsigned long *)(p)->stack + 1) - -#else /* !CONFIG_MMU */ - #ifndef __ASSEMBLY__ /* how to get the thread information struct from C */ static inline struct thread_info *current_thread_info(void) @@ -92,8 +64,6 @@ static inline struct thread_info *current_thread_info(void) #define init_thread_info (init_thread_union.thread_info) -#endif /* CONFIG_MMU */ - /* entry.S relies on these definitions! * bits 0-7 are tested at every exception exit * bits 8-15 are also tested at syscall exit diff --git a/arch/m68k/kernel/asm-offsets.c b/arch/m68k/kernel/asm-offsets.c index f6a54e203e8e..a972b00cd77d 100644 --- a/arch/m68k/kernel/asm-offsets.c +++ b/arch/m68k/kernel/asm-offsets.c @@ -24,7 +24,7 @@ int main(void) /* offsets into the task struct */ DEFINE(TASK_THREAD, offsetof(struct task_struct, thread)); DEFINE(TASK_MM, offsetof(struct task_struct, mm)); - DEFINE(TASK_INFO, offsetof(struct task_struct, thread.info)); + DEFINE(TASK_STACK, offsetof(struct task_struct, stack)); /* offsets into the thread struct */ DEFINE(THREAD_KSP, offsetof(struct thread_struct, ksp)); diff --git a/arch/m68k/kernel/entry_mm.S b/arch/m68k/kernel/entry_mm.S index c713f514843d..675a854966a6 100644 --- a/arch/m68k/kernel/entry_mm.S +++ b/arch/m68k/kernel/entry_mm.S @@ -99,7 +99,8 @@ do_trace_exit: jra .Lret_from_exception ENTRY(ret_from_signal) - tstb %curptr@(TASK_INFO+TINFO_FLAGS+2) + movel %curptr@(TASK_STACK),%a1 + tstb %a1@(TINFO_FLAGS+2) jge 1f jbsr syscall_trace 1: RESTORE_SWITCH_STACK @@ -120,11 +121,13 @@ ENTRY(system_call) SAVE_ALL_SYS GET_CURRENT(%d1) + movel %d1,%a1 + | save top of frame movel %sp,%curptr@(TASK_THREAD+THREAD_ESP0) | syscall trace? - tstb %curptr@(TASK_INFO+TINFO_FLAGS+2) + tstb %a1@(TINFO_FLAGS+2) jmi do_trace_entry cmpl #NR_syscalls,%d0 jcc badsys @@ -133,7 +136,8 @@ syscall: movel %d0,%sp@(PT_OFF_D0) | save the return value ret_from_syscall: |oriw #0x0700,%sr - movew %curptr@(TASK_INFO+TINFO_FLAGS+2),%d0 + movel %curptr@(TASK_STACK),%a1 + movew %a1@(TINFO_FLAGS+2),%d0 jne syscall_exit_work 1: RESTORE_ALL @@ -159,7 +163,8 @@ ENTRY(ret_from_exception) andw #ALLOWINT,%sr resume_userspace: - moveb %curptr@(TASK_INFO+TINFO_FLAGS+3),%d0 + movel %curptr@(TASK_STACK),%a1 + moveb %a1@(TINFO_FLAGS+3),%d0 jne exit_work 1: RESTORE_ALL @@ -199,7 +204,8 @@ do_delayed_trace: ENTRY(auto_inthandler) SAVE_ALL_INT GET_CURRENT(%d0) - addqb #1,%curptr@(TASK_INFO+TINFO_PREEMPT+1) + movel %d0,%a1 + addqb #1,%a1@(TINFO_PREEMPT+1) | put exception # in d0 bfextu %sp@(PT_OFF_FORMATVEC){#4,#10},%d0 subw #VEC_SPUR,%d0 @@ -211,7 +217,8 @@ auto_irqhandler_fixup = . + 2 addql #8,%sp | pop parameters off stack ret_from_interrupt: - subqb #1,%curptr@(TASK_INFO+TINFO_PREEMPT+1) + movel %curptr@(TASK_STACK),%a1 + subqb #1,%a1@(TINFO_PREEMPT+1) jeq ret_from_last_interrupt 2: RESTORE_ALL @@ -232,7 +239,8 @@ ret_from_last_interrupt: ENTRY(user_inthandler) SAVE_ALL_INT GET_CURRENT(%d0) - addqb #1,%curptr@(TASK_INFO+TINFO_PREEMPT+1) + movel %d0,%a1 + addqb #1,%a1@(TINFO_PREEMPT+1) | put exception # in d0 bfextu %sp@(PT_OFF_FORMATVEC){#4,#10},%d0 user_irqvec_fixup = . + 2 @@ -243,7 +251,8 @@ user_irqvec_fixup = . + 2 jsr do_IRQ | process the IRQ addql #8,%sp | pop parameters off stack - subqb #1,%curptr@(TASK_INFO+TINFO_PREEMPT+1) + movel %curptr@(TASK_STACK),%a1 + subqb #1,%a1@(TINFO_PREEMPT+1) jeq ret_from_last_interrupt RESTORE_ALL @@ -252,13 +261,15 @@ user_irqvec_fixup = . + 2 ENTRY(bad_inthandler) SAVE_ALL_INT GET_CURRENT(%d0) - addqb #1,%curptr@(TASK_INFO+TINFO_PREEMPT+1) + movel %d0,%a1 + addqb #1,%a1@(TINFO_PREEMPT+1) movel %sp,%sp@- jsr handle_badint addql #4,%sp - subqb #1,%curptr@(TASK_INFO+TINFO_PREEMPT+1) + movel %curptr@(TASK_STACK),%a1 + subqb #1,%a1@(TINFO_PREEMPT+1) jeq ret_from_last_interrupt RESTORE_ALL From 5717a02becd2f5dae8b11cb5808de4e5369d607c Mon Sep 17 00:00:00 2001 From: Greg Ungerer Date: Wed, 19 Oct 2011 16:27:30 +1000 Subject: [PATCH 07/56] m68k: selection of GENERIC_ATOMIC64 is not MMU specific The selection of the CONFIG_GENERIC_ATOMIC64 option is not specific to the MMU being present and enabled. It is a property of certain CPU families. So select it based on those CPU types being selected. Signed-off-by: Greg Ungerer --- arch/m68k/Kconfig | 1 - arch/m68k/Kconfig.cpu | 4 ++++ 2 files changed, 4 insertions(+), 1 deletion(-) diff --git a/arch/m68k/Kconfig b/arch/m68k/Kconfig index 361d54019bb0..2914b036d76e 100644 --- a/arch/m68k/Kconfig +++ b/arch/m68k/Kconfig @@ -3,7 +3,6 @@ config M68K default y select HAVE_IDE select HAVE_AOUT if MMU - select GENERIC_ATOMIC64 if MMU select HAVE_GENERIC_HARDIRQS select GENERIC_IRQ_SHOW select ARCH_HAVE_NMI_SAFE_CMPXCHG if RMW_INSNS diff --git a/arch/m68k/Kconfig.cpu b/arch/m68k/Kconfig.cpu index e632b2d12106..9af9e68c303b 100644 --- a/arch/m68k/Kconfig.cpu +++ b/arch/m68k/Kconfig.cpu @@ -33,6 +33,7 @@ config COLDFIRE config M68020 bool "68020 support" depends on MMU + select GENERIC_ATOMIC64 help If you anticipate running this kernel on a computer with a MC68020 processor, say Y. Otherwise, say N. Note that the 68020 requires a @@ -42,6 +43,7 @@ config M68020 config M68030 bool "68030 support" depends on MMU && !MMU_SUN3 + select GENERIC_ATOMIC64 help If you anticipate running this kernel on a computer with a MC68030 processor, say Y. Otherwise, say N. Note that a MC68EC030 will not @@ -50,6 +52,7 @@ config M68030 config M68040 bool "68040 support" depends on MMU && !MMU_SUN3 + select GENERIC_ATOMIC64 help If you anticipate running this kernel on a computer with a MC68LC040 or MC68040 processor, say Y. Otherwise, say N. Note that an @@ -59,6 +62,7 @@ config M68040 config M68060 bool "68060 support" depends on MMU && !MMU_SUN3 + select GENERIC_ATOMIC64 help If you anticipate running this kernel on a computer with a MC68060 processor, say Y. Otherwise, say N. From 361a541dc2373e57cfa7a63e95fbe448ff5675d4 Mon Sep 17 00:00:00 2001 From: Greg Ungerer Date: Wed, 19 Oct 2011 21:37:08 +1000 Subject: [PATCH 08/56] m68knommu: move definition of mach_gettod to where it is used The mach_gettod function pointer is only called from the time_no.c code. So move its actual definition to there too. It is currently in setup_no.c for no particularly good reason. Signed-off-by: Greg Ungerer --- arch/m68k/kernel/setup_no.c | 1 - arch/m68k/kernel/time_no.c | 3 +++ 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/arch/m68k/kernel/setup_no.c b/arch/m68k/kernel/setup_no.c index 2ed8c0fb1517..ca3df0dc7e88 100644 --- a/arch/m68k/kernel/setup_no.c +++ b/arch/m68k/kernel/setup_no.c @@ -47,7 +47,6 @@ EXPORT_SYMBOL(memory_end); char __initdata command_line[COMMAND_LINE_SIZE]; /* machine dependent timer functions */ -void (*mach_gettod)(int*, int*, int*, int*, int*, int*); int (*mach_set_clock_mmss)(unsigned long); /* machine dependent reboot functions */ diff --git a/arch/m68k/kernel/time_no.c b/arch/m68k/kernel/time_no.c index 6623909f70e6..3ef0f7768dcd 100644 --- a/arch/m68k/kernel/time_no.c +++ b/arch/m68k/kernel/time_no.c @@ -26,6 +26,9 @@ #define TICK_SIZE (tick_nsec / 1000) +/* machine dependent timer functions */ +void (*mach_gettod)(int*, int*, int*, int*, int*, int*); + static inline int set_rtc_mmss(unsigned long nowtime) { if (mach_set_clock_mmss) From e87c09a899d38d1b6858e010c22a1200fb77965d Mon Sep 17 00:00:00 2001 From: Greg Ungerer Date: Thu, 13 Oct 2011 16:59:55 +1000 Subject: [PATCH 09/56] m68k: print memory layout info in boot log Output a table of the kernel memory regions at boot time. This is taken directly from the ARM architecture code that does this. The table looks like this: Virtual kernel memory layout: vector : 0x00000000 - 0x00000400 ( 0 KiB) kmap : 0xd0000000 - 0xe0000000 ( 256 MiB) vmalloc : 0xc0000000 - 0xcfffffff ( 255 MiB) lowmem : 0x00000000 - 0x02000000 ( 32 MiB) .init : 0x00128000 - 0x00134000 ( 48 KiB) .text : 0x00020000 - 0x00118d54 ( 996 KiB) .data : 0x00118d60 - 0x00126000 ( 53 KiB) .bss : 0x00134000 - 0x001413e0 ( 53 KiB) This has been very useful while debugging the ColdFire virtual memory support code. But in general I think it is nice to know extacly where the kernel has layed everything out on boot. Signed-off-by: Greg Ungerer --- arch/m68k/include/asm/traps.h | 1 + arch/m68k/kernel/vmlinux-std.lds | 2 ++ arch/m68k/kernel/vmlinux-sun3.lds | 2 ++ arch/m68k/mm/init_mm.c | 34 +++++++++++++++++++++++++++++++ 4 files changed, 39 insertions(+) diff --git a/arch/m68k/include/asm/traps.h b/arch/m68k/include/asm/traps.h index 151068f64f44..4aff3358fbaf 100644 --- a/arch/m68k/include/asm/traps.h +++ b/arch/m68k/include/asm/traps.h @@ -18,6 +18,7 @@ typedef void (*e_vector)(void); extern e_vector vectors[]; +extern e_vector *_ramvec; asmlinkage void auto_inthandler(void); asmlinkage void user_inthandler(void); diff --git a/arch/m68k/kernel/vmlinux-std.lds b/arch/m68k/kernel/vmlinux-std.lds index d0993594f558..63407c836826 100644 --- a/arch/m68k/kernel/vmlinux-std.lds +++ b/arch/m68k/kernel/vmlinux-std.lds @@ -31,7 +31,9 @@ SECTIONS RW_DATA_SECTION(16, PAGE_SIZE, THREAD_SIZE) + _sbss = .; BSS_SECTION(0, 0, 0) + _ebss = .; _edata = .; /* End of data section */ diff --git a/arch/m68k/kernel/vmlinux-sun3.lds b/arch/m68k/kernel/vmlinux-sun3.lds index 8080469ee6c1..ad0f46d64c0b 100644 --- a/arch/m68k/kernel/vmlinux-sun3.lds +++ b/arch/m68k/kernel/vmlinux-sun3.lds @@ -44,7 +44,9 @@ __init_begin = .; . = ALIGN(PAGE_SIZE); __init_end = .; + _sbss = .; BSS_SECTION(0, 0, 0) + _ebss = .; _end = . ; diff --git a/arch/m68k/mm/init_mm.c b/arch/m68k/mm/init_mm.c index bbe525434ccb..85c5f0eee9ff 100644 --- a/arch/m68k/mm/init_mm.c +++ b/arch/m68k/mm/init_mm.c @@ -24,6 +24,7 @@ #include #include #include +#include #include #include #ifdef CONFIG_ATARI @@ -75,6 +76,38 @@ extern void init_pointer_table(unsigned long ptable); extern pmd_t *zero_pgtable; +#if defined(CONFIG_MMU) && !defined(CONFIG_COLDFIRE) +#define VECTORS &vectors[0] +#else +#define VECTORS _ramvec +#endif + +void __init print_memmap(void) +{ +#define UL(x) ((unsigned long) (x)) +#define MLK(b, t) UL(b), UL(t), (UL(t) - UL(b)) >> 10 +#define MLM(b, t) UL(b), UL(t), (UL(t) - UL(b)) >> 20 +#define MLK_ROUNDUP(b, t) b, t, DIV_ROUND_UP(((t) - (b)), 1024) + + pr_notice("Virtual kernel memory layout:\n" + " vector : 0x%08lx - 0x%08lx (%4ld KiB)\n" + " kmap : 0x%08lx - 0x%08lx (%4ld MiB)\n" + " vmalloc : 0x%08lx - 0x%08lx (%4ld MiB)\n" + " lowmem : 0x%08lx - 0x%08lx (%4ld MiB)\n" + " .init : 0x%p" " - 0x%p" " (%4d KiB)\n" + " .text : 0x%p" " - 0x%p" " (%4d KiB)\n" + " .data : 0x%p" " - 0x%p" " (%4d KiB)\n" + " .bss : 0x%p" " - 0x%p" " (%4d KiB)\n", + MLK(VECTORS, VECTORS + 256), + MLM(KMAP_START, KMAP_END), + MLM(VMALLOC_START, VMALLOC_END), + MLM(PAGE_OFFSET, (unsigned long)high_memory), + MLK_ROUNDUP(__init_begin, __init_end), + MLK_ROUNDUP(_stext, _etext), + MLK_ROUNDUP(_sdata, _edata), + MLK_ROUNDUP(_sbss, _ebss)); +} + void __init mem_init(void) { pg_data_t *pgdat; @@ -125,6 +158,7 @@ void __init mem_init(void) codepages << (PAGE_SHIFT-10), datapages << (PAGE_SHIFT-10), initpages << (PAGE_SHIFT-10)); + print_memmap(); } #ifdef CONFIG_BLK_DEV_INITRD From d1db9120cd7df0872385fd29a25257f23cb70527 Mon Sep 17 00:00:00 2001 From: Greg Ungerer Date: Wed, 19 Oct 2011 11:46:03 +1000 Subject: [PATCH 10/56] m68k: support configure time command line for MMU m68k The non-MMU builds of m68k allow a fixed kernel boot command line to be configured at configure time. Allow this MMU builds as well. Signed-off-by: Greg Ungerer --- arch/m68k/Kconfig.debug | 16 ++++++++-------- arch/m68k/kernel/setup_mm.c | 4 ++++ 2 files changed, 12 insertions(+), 8 deletions(-) diff --git a/arch/m68k/Kconfig.debug b/arch/m68k/Kconfig.debug index 2bdb1b01115c..af4fd5f8f8d5 100644 --- a/arch/m68k/Kconfig.debug +++ b/arch/m68k/Kconfig.debug @@ -2,6 +2,14 @@ menu "Kernel hacking" source "lib/Kconfig.debug" +config BOOTPARAM + bool 'Compiled-in Kernel Boot Parameter' + +config BOOTPARAM_STRING + string 'Kernel Boot Parameter' + default 'console=ttyS0,19200' + depends on BOOTPARAM + if !MMU config FULLDEBUG @@ -15,14 +23,6 @@ config HIGHPROFILE help Use a fast secondary clock to produce profiling information. -config BOOTPARAM - bool 'Compiled-in Kernel Boot Parameter' - -config BOOTPARAM_STRING - string 'Kernel Boot Parameter' - default 'console=ttyS0,19200' - depends on BOOTPARAM - config NO_KERNEL_MSG bool "Suppress Kernel BUG Messages" help diff --git a/arch/m68k/kernel/setup_mm.c b/arch/m68k/kernel/setup_mm.c index c3b45061dd08..55f8f5049f68 100644 --- a/arch/m68k/kernel/setup_mm.c +++ b/arch/m68k/kernel/setup_mm.c @@ -258,6 +258,10 @@ void __init setup_arch(char **cmdline_p) init_mm.end_data = (unsigned long)_edata; init_mm.brk = (unsigned long)_end; +#if defined(CONFIG_BOOTPARAM) + strncpy(m68k_command_line, CONFIG_BOOTPARAM_STRING, CL_SIZE); + m68k_command_line[CL_SIZE - 1] = 0; +#endif /* CONFIG_BOOTPARAM */ *cmdline_p = m68k_command_line; memcpy(boot_command_line, *cmdline_p, CL_SIZE); From 46729d0eb301f689272c64a9417e7b40038f42a6 Mon Sep 17 00:00:00 2001 From: Greg Ungerer Date: Mon, 31 Oct 2011 14:26:52 +1000 Subject: [PATCH 11/56] m68knommu: no need to set register marker on traps Commit 61619b12078dc8b85a3d4cbfa16f650daa341bd1 ("m68k: merge mmu and non-mmu include/asm/entry.h files") made the trap entry code basically the same for mmu and non-mmu builds. This means we no longer need code to mark the stack frame as "system-call" type or other in the non-mmu trap handling entry points. This is done in the SAVE_ALL_INT macro now. Signed-off-by: Greg Ungerer --- arch/m68k/kernel/entry_no.S | 6 ------ 1 file changed, 6 deletions(-) diff --git a/arch/m68k/kernel/entry_no.S b/arch/m68k/kernel/entry_no.S index 1b4289061a64..ac86a9ffc1d7 100644 --- a/arch/m68k/kernel/entry_no.S +++ b/arch/m68k/kernel/entry_no.S @@ -44,8 +44,6 @@ ENTRY(buserr) SAVE_ALL_INT - moveq #-1,%d0 - movel %d0,%sp@(PT_OFF_ORIG_D0) movel %sp,%sp@- /* stack frame pointer argument */ jsr buserr_c addql #4,%sp @@ -53,8 +51,6 @@ ENTRY(buserr) ENTRY(trap) SAVE_ALL_INT - moveq #-1,%d0 - movel %d0,%sp@(PT_OFF_ORIG_D0) movel %sp,%sp@- /* stack frame pointer argument */ jsr trap_c addql #4,%sp @@ -65,8 +61,6 @@ ENTRY(trap) .globl dbginterrupt ENTRY(dbginterrupt) SAVE_ALL_INT - moveq #-1,%d0 - movel %d0,%sp@(PT_OFF_ORIG_D0) movel %sp,%sp@- /* stack frame pointer argument */ jsr dbginterrupt_c addql #4,%sp From 479badc364b52774d77264aaf81f4d4b375a4a97 Mon Sep 17 00:00:00 2001 From: Greg Ungerer Date: Wed, 2 Nov 2011 15:44:42 +1000 Subject: [PATCH 12/56] m68k: make fp register stores consistent for m68k and ColdFire There is no reason we can't make the saved fp registers the same for all m68k types and ColdFire. There is a little wasted space, but the code consistency and cleanliness is a big win. sigcontext.h is an exported header, but currently there is no in-mainline users of the !__uClinux__ and __mcoldfire__ case that this change effects. Even better this change actually makes this structure consistent with the out-of-mainline ColdFire/MMU code. Signed-off-by: Greg Ungerer Acked-by: Geert Uytterhoeven --- arch/m68k/include/asm/sigcontext.h | 4 ---- arch/m68k/include/asm/ucontext.h | 4 ---- 2 files changed, 8 deletions(-) diff --git a/arch/m68k/include/asm/sigcontext.h b/arch/m68k/include/asm/sigcontext.h index a29dd74a17cb..523db2a51cf3 100644 --- a/arch/m68k/include/asm/sigcontext.h +++ b/arch/m68k/include/asm/sigcontext.h @@ -15,11 +15,7 @@ struct sigcontext { unsigned long sc_pc; unsigned short sc_formatvec; #ifndef __uClinux__ -# ifdef __mcoldfire__ - unsigned long sc_fpregs[2][2]; /* room for two fp registers */ -# else unsigned long sc_fpregs[2*3]; /* room for two fp registers */ -# endif unsigned long sc_fpcntl[3]; unsigned char sc_fpstate[216]; #endif diff --git a/arch/m68k/include/asm/ucontext.h b/arch/m68k/include/asm/ucontext.h index 00dcc5176c57..e4e22669edc0 100644 --- a/arch/m68k/include/asm/ucontext.h +++ b/arch/m68k/include/asm/ucontext.h @@ -7,11 +7,7 @@ typedef greg_t gregset_t[NGREG]; typedef struct fpregset { int f_fpcntl[3]; -#ifdef __mcoldfire__ - int f_fpregs[8][2]; -#else int f_fpregs[8*3]; -#endif } fpregset_t; struct mcontext { From 7f73bafc4630a450ebe8b021efa14781ffd992b1 Mon Sep 17 00:00:00 2001 From: Greg Ungerer Date: Tue, 18 Oct 2011 15:49:19 +1000 Subject: [PATCH 13/56] m68k: simpler m68k and ColdFire CPU's can use generic csum code We have two implementations of the IP checksuming code for the m68k arch. One uses the more advanced instructions available in 68020 and above processors, the other uses the simpler instructions available on the original 68000 processors and the modern ColdFire processors. This simpler code is pretty much the same as the generic lib implementation of the IP csum functions. So lets just switch over to using that. That means we can completely remove the checksum_no.c file, and only have the local fast code used for the more complex 68k CPU family members. Signed-off-by: Greg Ungerer --- arch/m68k/Kconfig | 3 + arch/m68k/Kconfig.cpu | 2 + arch/m68k/include/asm/checksum.h | 31 +--- arch/m68k/lib/Makefile | 8 +- arch/m68k/lib/{checksum_mm.c => checksum.c} | 0 arch/m68k/lib/checksum_no.c | 156 -------------------- 6 files changed, 16 insertions(+), 184 deletions(-) rename arch/m68k/lib/{checksum_mm.c => checksum.c} (100%) delete mode 100644 arch/m68k/lib/checksum_no.c diff --git a/arch/m68k/Kconfig b/arch/m68k/Kconfig index 2914b036d76e..2fe2d633fe08 100644 --- a/arch/m68k/Kconfig +++ b/arch/m68k/Kconfig @@ -40,6 +40,9 @@ config GENERIC_CALIBRATE_DELAY config GENERIC_IOMAP def_bool MMU +config GENERIC_CSUM + bool + config TIME_LOW_RES bool default y diff --git a/arch/m68k/Kconfig.cpu b/arch/m68k/Kconfig.cpu index 9af9e68c303b..17d37ed57f3c 100644 --- a/arch/m68k/Kconfig.cpu +++ b/arch/m68k/Kconfig.cpu @@ -3,6 +3,7 @@ comment "Processor Type" config M68000 bool select CPU_HAS_NO_BITFIELDS + select GENERIC_CSUM help The Freescale (was Motorola) 68000 CPU is the first generation of the well known M68K family of processors. The CPU core as well as @@ -23,6 +24,7 @@ config COLDFIRE select GENERIC_GPIO select ARCH_REQUIRE_GPIOLIB select CPU_HAS_NO_BITFIELDS + select GENERIC_CSUM help The Freescale ColdFire family of processors is a modern derivitive of the 68000 processor family. They are mainly targeted at embedded diff --git a/arch/m68k/include/asm/checksum.h b/arch/m68k/include/asm/checksum.h index ec514485c8b6..2f88d867c711 100644 --- a/arch/m68k/include/asm/checksum.h +++ b/arch/m68k/include/asm/checksum.h @@ -3,6 +3,10 @@ #include +#ifdef CONFIG_GENERIC_CSUM +#include +#else + /* * computes the checksum of a memory block at buff, length len, * and adds in "sum" (32-bit) @@ -34,30 +38,6 @@ extern __wsum csum_partial_copy_nocheck(const void *src, void *dst, int len, __wsum sum); - -#ifdef CONFIG_COLDFIRE - -/* - * The ColdFire cores don't support all the 68k instructions used - * in the optimized checksum code below. So it reverts back to using - * more standard C coded checksums. The fast checksum code is - * significantly larger than the optimized version, so it is not - * inlined here. - */ -__sum16 ip_fast_csum(const void *iph, unsigned int ihl); - -static inline __sum16 csum_fold(__wsum sum) -{ - unsigned int tmp = (__force u32)sum; - - tmp = (tmp & 0xffff) + (tmp >> 16); - tmp = (tmp & 0xffff) + (tmp >> 16); - - return (__force __sum16)~tmp; -} - -#else - /* * This is a version of ip_fast_csum() optimized for IP headers, * which always checksum on 4 octet boundaries. @@ -97,8 +77,6 @@ static inline __sum16 csum_fold(__wsum sum) return (__force __sum16)~sum; } -#endif /* CONFIG_COLDFIRE */ - static inline __wsum csum_tcpudp_nofold(__be32 saddr, __be32 daddr, unsigned short len, unsigned short proto, __wsum sum) @@ -167,4 +145,5 @@ csum_ipv6_magic(const struct in6_addr *saddr, const struct in6_addr *daddr, return csum_fold(sum); } +#endif /* CONFIG_GENERIC_CSUM */ #endif /* _M68K_CHECKSUM_H */ diff --git a/arch/m68k/lib/Makefile b/arch/m68k/lib/Makefile index 1a1bd9067e90..b3b40e4ed339 100644 --- a/arch/m68k/lib/Makefile +++ b/arch/m68k/lib/Makefile @@ -7,8 +7,12 @@ lib-y := ashldi3.o ashrdi3.o lshrdi3.o muldi3.o \ memcpy.o memset.o memmove.o ifdef CONFIG_MMU -lib-y += string.o uaccess.o checksum_mm.o +lib-y += string.o uaccess.o else -lib-y += mulsi3.o divsi3.o udivsi3.o modsi3.o umodsi3.o checksum_no.o +lib-y += mulsi3.o divsi3.o udivsi3.o modsi3.o umodsi3.o +endif + +ifndef CONFIG_GENERIC_CSUM +lib-y += checksum.o endif diff --git a/arch/m68k/lib/checksum_mm.c b/arch/m68k/lib/checksum.c similarity index 100% rename from arch/m68k/lib/checksum_mm.c rename to arch/m68k/lib/checksum.c diff --git a/arch/m68k/lib/checksum_no.c b/arch/m68k/lib/checksum_no.c deleted file mode 100644 index e4c6354da765..000000000000 --- a/arch/m68k/lib/checksum_no.c +++ /dev/null @@ -1,156 +0,0 @@ -/* - * INET An implementation of the TCP/IP protocol suite for the LINUX - * operating system. INET is implemented using the BSD Socket - * interface as the means of communication with the user level. - * - * IP/TCP/UDP checksumming routines - * - * Authors: Jorge Cwik, - * Arnt Gulbrandsen, - * Tom May, - * Andreas Schwab, - * Lots of code moved from tcp.c and ip.c; see those files - * for more names. - * - * 03/02/96 Jes Sorensen, Andreas Schwab, Roman Hodek: - * Fixed some nasty bugs, causing some horrible crashes. - * A: At some points, the sum (%0) was used as - * length-counter instead of the length counter - * (%1). Thanks to Roman Hodek for pointing this out. - * B: GCC seems to mess up if one uses too many - * data-registers to hold input values and one tries to - * specify d0 and d1 as scratch registers. Letting gcc choose these - * registers itself solves the problem. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ - -/* Revised by Kenneth Albanowski for m68knommu. Basic problem: unaligned access kills, so most - of the assembly has to go. */ - -#include -#include - -static inline unsigned short from32to16(unsigned long x) -{ - /* add up 16-bit and 16-bit for 16+c bit */ - x = (x & 0xffff) + (x >> 16); - /* add up carry.. */ - x = (x & 0xffff) + (x >> 16); - return x; -} - -static unsigned long do_csum(const unsigned char * buff, int len) -{ - int odd, count; - unsigned long result = 0; - - if (len <= 0) - goto out; - odd = 1 & (unsigned long) buff; - if (odd) { - result = *buff; - len--; - buff++; - } - count = len >> 1; /* nr of 16-bit words.. */ - if (count) { - if (2 & (unsigned long) buff) { - result += *(unsigned short *) buff; - count--; - len -= 2; - buff += 2; - } - count >>= 1; /* nr of 32-bit words.. */ - if (count) { - unsigned long carry = 0; - do { - unsigned long w = *(unsigned long *) buff; - count--; - buff += 4; - result += carry; - result += w; - carry = (w > result); - } while (count); - result += carry; - result = (result & 0xffff) + (result >> 16); - } - if (len & 2) { - result += *(unsigned short *) buff; - buff += 2; - } - } - if (len & 1) - result += (*buff << 8); - result = from32to16(result); - if (odd) - result = ((result >> 8) & 0xff) | ((result & 0xff) << 8); -out: - return result; -} - -#ifdef CONFIG_COLDFIRE -/* - * This is a version of ip_compute_csum() optimized for IP headers, - * which always checksum on 4 octet boundaries. - */ -__sum16 ip_fast_csum(const void *iph, unsigned int ihl) -{ - return (__force __sum16)~do_csum(iph,ihl*4); -} -EXPORT_SYMBOL(ip_fast_csum); -#endif - -/* - * computes the checksum of a memory block at buff, length len, - * and adds in "sum" (32-bit) - * - * returns a 32-bit number suitable for feeding into itself - * or csum_tcpudp_magic - * - * this function must be called with even lengths, except - * for the last fragment, which may be odd - * - * it's best to have buff aligned on a 32-bit boundary - */ -__wsum csum_partial(const void *buff, int len, __wsum sum) -{ - unsigned int result = do_csum(buff, len); - - /* add in old sum, and carry.. */ - result += (__force u32)sum; - if ((__force u32)sum > result) - result += 1; - return (__force __wsum)result; -} - -EXPORT_SYMBOL(csum_partial); - -/* - * copy from fs while checksumming, otherwise like csum_partial - */ - -__wsum -csum_partial_copy_from_user(const void __user *src, void *dst, - int len, __wsum sum, int *csum_err) -{ - if (csum_err) *csum_err = 0; - memcpy(dst, (__force const void *)src, len); - return csum_partial(dst, len, sum); -} -EXPORT_SYMBOL(csum_partial_copy_from_user); - -/* - * copy from ds while checksumming, otherwise like csum_partial - */ - -__wsum -csum_partial_copy_nocheck(const void *src, void *dst, int len, __wsum sum) -{ - memcpy(dst, src, len); - return csum_partial(dst, len, sum); -} -EXPORT_SYMBOL(csum_partial_copy_nocheck); From 84f3fb7a2aadeda3c0a34e61591a8eccf5e367b4 Mon Sep 17 00:00:00 2001 From: Greg Ungerer Date: Fri, 11 Nov 2011 15:13:08 +1000 Subject: [PATCH 14/56] m68k: handle presence of 64bit mul/div instructions cleanly The traditional 68000 processors and the newer reduced instruction set ColdFire processors do not support the 32*32->64 multiply or the 64/32->32 divide instructions. This is not a difference based on the presence of a hardware MMU or not. Create a new config symbol to mark that a CPU type doesn't support the longer multiply/divide instructions. Use this then as a basis for using the fast 64bit based divide (in div64.h) and for linking in the extra libgcc functions that may be required (mulsi3, divsi3, etc). Signed-off-by: Greg Ungerer Acked-by: Geert Uytterhoeven --- arch/m68k/Kconfig | 3 +++ arch/m68k/Kconfig.cpu | 2 ++ arch/m68k/include/asm/div64.h | 8 ++++---- arch/m68k/kernel/m68k_ksyms.c | 2 +- arch/m68k/lib/Makefile | 8 +++----- 5 files changed, 13 insertions(+), 10 deletions(-) diff --git a/arch/m68k/Kconfig b/arch/m68k/Kconfig index 2fe2d633fe08..32fd3642e71b 100644 --- a/arch/m68k/Kconfig +++ b/arch/m68k/Kconfig @@ -63,6 +63,9 @@ config ZONE_DMA config CPU_HAS_NO_BITFIELDS bool +config CPU_HAS_NO_MULDIV64 + bool + config HZ int default 1000 if CLEOPATRA diff --git a/arch/m68k/Kconfig.cpu b/arch/m68k/Kconfig.cpu index 17d37ed57f3c..017f4fc388d2 100644 --- a/arch/m68k/Kconfig.cpu +++ b/arch/m68k/Kconfig.cpu @@ -3,6 +3,7 @@ comment "Processor Type" config M68000 bool select CPU_HAS_NO_BITFIELDS + select CPU_HAS_NO_MULDIV64 select GENERIC_CSUM help The Freescale (was Motorola) 68000 CPU is the first generation of @@ -24,6 +25,7 @@ config COLDFIRE select GENERIC_GPIO select ARCH_REQUIRE_GPIOLIB select CPU_HAS_NO_BITFIELDS + select CPU_HAS_NO_MULDIV64 select GENERIC_CSUM help The Freescale ColdFire family of processors is a modern derivitive diff --git a/arch/m68k/include/asm/div64.h b/arch/m68k/include/asm/div64.h index edb66148a71d..444ea8a09e9f 100644 --- a/arch/m68k/include/asm/div64.h +++ b/arch/m68k/include/asm/div64.h @@ -1,7 +1,9 @@ #ifndef _M68K_DIV64_H #define _M68K_DIV64_H -#ifdef CONFIG_MMU +#ifdef CONFIG_CPU_HAS_NO_MULDIV64 +#include +#else #include @@ -27,8 +29,6 @@ __rem; \ }) -#else -#include -#endif /* CONFIG_MMU */ +#endif /* CONFIG_CPU_HAS_NO_MULDIV64 */ #endif /* _M68K_DIV64_H */ diff --git a/arch/m68k/kernel/m68k_ksyms.c b/arch/m68k/kernel/m68k_ksyms.c index 1b7a14d1a000..774c1bd59c36 100644 --- a/arch/m68k/kernel/m68k_ksyms.c +++ b/arch/m68k/kernel/m68k_ksyms.c @@ -14,7 +14,7 @@ EXPORT_SYMBOL(__ashrdi3); EXPORT_SYMBOL(__lshrdi3); EXPORT_SYMBOL(__muldi3); -#if defined(CONFIG_M68000) || defined(CONFIG_COLDFIRE) +#if defined(CONFIG_CPU_HAS_NO_MULDIV64) /* * Simpler 68k and ColdFire parts also need a few other gcc functions. */ diff --git a/arch/m68k/lib/Makefile b/arch/m68k/lib/Makefile index b3b40e4ed339..a9d782d34276 100644 --- a/arch/m68k/lib/Makefile +++ b/arch/m68k/lib/Makefile @@ -6,11 +6,9 @@ lib-y := ashldi3.o ashrdi3.o lshrdi3.o muldi3.o \ memcpy.o memset.o memmove.o -ifdef CONFIG_MMU -lib-y += string.o uaccess.o -else -lib-y += mulsi3.o divsi3.o udivsi3.o modsi3.o umodsi3.o -endif +lib-$(CONFIG_MMU) += string.o uaccess.o +lib-$(CONFIG_CPU_HAS_NO_MULDIV64) += mulsi3.o divsi3.o udivsi3.o +lib-$(CONFIG_CPU_HAS_NO_MULDIV64) += modsi3.o umodsi3.o ifndef CONFIG_GENERIC_CSUM lib-y += checksum.o From ec84118795fa687192de04e0dcb63178e4bf63e5 Mon Sep 17 00:00:00 2001 From: Greg Ungerer Date: Tue, 15 Nov 2011 15:26:28 +1000 Subject: [PATCH 15/56] m68knommu: disable cache early in startup for ColdFire Disbale the CPU cache really early in the ColdFire startup code. We set up some variables for RAM sizing and we want to make they stick in RAM. Signed-off-by: Alexander Stein Signed-off-by: Greg Ungerer --- arch/m68k/platform/coldfire/head.S | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/m68k/platform/coldfire/head.S b/arch/m68k/platform/coldfire/head.S index c33483824a2e..49666b4dd091 100644 --- a/arch/m68k/platform/coldfire/head.S +++ b/arch/m68k/platform/coldfire/head.S @@ -143,6 +143,9 @@ __HEAD _start: nop /* filler */ movew #0x2700, %sr /* no interrupts */ + movel #CACHE_INIT,%d0 /* disable cache */ + movec %d0,%CACR + nop #if defined(CONFIG_UBOOT) movel %sp,_init_sp /* save initial stack pointer */ #endif @@ -176,9 +179,6 @@ _start: * it is very similar. Define the exact settings in the headers * then the code here is the same for all. */ - movel #CACHE_INIT,%d0 /* invalidate whole cache */ - movec %d0,%CACR - nop movel #ACR0_MODE,%d0 /* set RAM region for caching */ movec %d0,%ACR0 movel #ACR1_MODE,%d0 /* anything else to cache? */ From 1f2aab01ba2f6c591dee93daf4b57fd9785f3b41 Mon Sep 17 00:00:00 2001 From: Greg Ungerer Date: Wed, 16 Nov 2011 15:09:02 +1000 Subject: [PATCH 16/56] m68knommu: fix broken ColdFire slice timer read_clk() code There is a race on reading the ColdFire slice timer current count and the total clock count so far. Interrupts are off, and we may have just missed getting a new timer wrap event interrupt. Check for this and adjust the cycle count and current read count accordingly. Also the slice timer counts down from the terminal count. So in read_clk() we need take the current clock count away from the terminal count. Reported-by: Alexander Stein Signed-off-by: Greg Ungerer --- arch/m68k/platform/coldfire/sltimers.c | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/arch/m68k/platform/coldfire/sltimers.c b/arch/m68k/platform/coldfire/sltimers.c index b7f822b552bb..54e1452f853a 100644 --- a/arch/m68k/platform/coldfire/sltimers.c +++ b/arch/m68k/platform/coldfire/sltimers.c @@ -98,16 +98,19 @@ static struct irqaction mcfslt_timer_irq = { static cycle_t mcfslt_read_clk(struct clocksource *cs) { unsigned long flags; - u32 cycles; - u16 scnt; + u32 cycles, scnt; local_irq_save(flags); scnt = __raw_readl(TA(MCFSLT_SCNT)); cycles = mcfslt_cnt; + if (__raw_readl(TA(MCFSLT_SSR)) & MCFSLT_SSR_TE) { + cycles += mcfslt_cycles_per_jiffy; + scnt = __raw_readl(TA(MCFSLT_SCNT)); + } local_irq_restore(flags); /* subtract because slice timers count down */ - return cycles - scnt; + return cycles + ((mcfslt_cycles_per_jiffy - 1) - scnt); } static struct clocksource mcfslt_clk = { From 45f9e2cdcd958691cc691ad1ca2b1e8b9f535967 Mon Sep 17 00:00:00 2001 From: Greg Ungerer Date: Fri, 25 Nov 2011 16:42:31 +1000 Subject: [PATCH 17/56] m68knommu: remove unused anchor.h include file The code that used the anchor.h include file has long been removed from the kernel. Remove it too. Signed-off-by: Greg Ungerer --- arch/m68k/include/asm/anchor.h | 112 --------------------------------- 1 file changed, 112 deletions(-) delete mode 100644 arch/m68k/include/asm/anchor.h diff --git a/arch/m68k/include/asm/anchor.h b/arch/m68k/include/asm/anchor.h deleted file mode 100644 index 871c0d5cfc3d..000000000000 --- a/arch/m68k/include/asm/anchor.h +++ /dev/null @@ -1,112 +0,0 @@ -/****************************************************************************/ - -/* - * anchor.h -- Anchor CO-MEM Lite PCI host bridge part. - * - * (C) Copyright 2000, Moreton Bay (www.moreton.com.au) - */ - -/****************************************************************************/ -#ifndef anchor_h -#define anchor_h -/****************************************************************************/ - -/* - * Define basic addressing info. - */ -#if defined(CONFIG_M5407C3) -#define COMEM_BASE 0xFFFF0000 /* Base of CO-MEM address space */ -#define COMEM_IRQ 25 /* IRQ of anchor part */ -#else -#define COMEM_BASE 0x80000000 /* Base of CO-MEM address space */ -#define COMEM_IRQ 25 /* IRQ of anchor part */ -#endif - -/****************************************************************************/ - -/* - * 4-byte registers of CO-MEM, so adjust register addresses for - * easy access. Handy macro for word access too. - */ -#define LREG(a) ((a) >> 2) -#define WREG(a) ((a) >> 1) - - -/* - * Define base addresses within CO-MEM Lite register address space. - */ -#define COMEM_I2O 0x0000 /* I2O registers */ -#define COMEM_OPREGS 0x0400 /* Operation registers */ -#define COMEM_PCIBUS 0x2000 /* Direct access to PCI bus */ -#define COMEM_SHMEM 0x4000 /* Shared memory region */ - -#define COMEM_SHMEMSIZE 0x4000 /* Size of shared memory */ - - -/* - * Define CO-MEM Registers. - */ -#define COMEM_I2OHISR 0x0030 /* I2O host interrupt status */ -#define COMEM_I2OHIMR 0x0034 /* I2O host interrupt mask */ -#define COMEM_I2OLISR 0x0038 /* I2O local interrupt status */ -#define COMEM_I2OLIMR 0x003c /* I2O local interrupt mask */ -#define COMEM_IBFPFIFO 0x0040 /* I2O inbound free/post FIFO */ -#define COMEM_OBPFFIFO 0x0044 /* I2O outbound post/free FIFO */ -#define COMEM_IBPFFIFO 0x0048 /* I2O inbound post/free FIFO */ -#define COMEM_OBFPFIFO 0x004c /* I2O outbound free/post FIFO */ - -#define COMEM_DAHBASE 0x0460 /* Direct access base address */ - -#define COMEM_NVCMD 0x04a0 /* I2C serial command */ -#define COMEM_NVREAD 0x04a4 /* I2C serial read */ -#define COMEM_NVSTAT 0x04a8 /* I2C status */ - -#define COMEM_DMALBASE 0x04b0 /* DMA local base address */ -#define COMEM_DMAHBASE 0x04b4 /* DMA host base address */ -#define COMEM_DMASIZE 0x04b8 /* DMA size */ -#define COMEM_DMACTL 0x04bc /* DMA control */ - -#define COMEM_HCTL 0x04e0 /* Host control */ -#define COMEM_HINT 0x04e4 /* Host interrupt control/status */ -#define COMEM_HLDATA 0x04e8 /* Host to local data mailbox */ -#define COMEM_LINT 0x04f4 /* Local interrupt contole status */ -#define COMEM_LHDATA 0x04f8 /* Local to host data mailbox */ - -#define COMEM_LBUSCFG 0x04fc /* Local bus configuration */ - - -/* - * Commands and flags for use with Direct Access Register. - */ -#define COMEM_DA_IACK 0x00000000 /* Interrupt acknowledge (read) */ -#define COMEM_DA_SPCL 0x00000010 /* Special cycle (write) */ -#define COMEM_DA_MEMRD 0x00000004 /* Memory read cycle */ -#define COMEM_DA_MEMWR 0x00000004 /* Memory write cycle */ -#define COMEM_DA_IORD 0x00000002 /* I/O read cycle */ -#define COMEM_DA_IOWR 0x00000002 /* I/O write cycle */ -#define COMEM_DA_CFGRD 0x00000006 /* Configuration read cycle */ -#define COMEM_DA_CFGWR 0x00000006 /* Configuration write cycle */ - -#define COMEM_DA_ADDR(a) ((a) & 0xffffe000) - -#define COMEM_DA_OFFSET(a) ((a) & 0x00001fff) - - -/* - * The PCI bus will be limited in what slots will actually be used. - * Define valid device numbers for different boards. - */ -#if defined(CONFIG_M5407C3) -#define COMEM_MINDEV 14 /* Minimum valid DEVICE */ -#define COMEM_MAXDEV 14 /* Maximum valid DEVICE */ -#define COMEM_BRIDGEDEV 15 /* Slot bridge is in */ -#else -#define COMEM_MINDEV 0 /* Minimum valid DEVICE */ -#define COMEM_MAXDEV 3 /* Maximum valid DEVICE */ -#endif - -#define COMEM_MAXPCI (COMEM_MAXDEV+1) /* Maximum PCI devices */ - - -/****************************************************************************/ -#endif /* anchor_h */ From 40c1b9cfeedf79b909c961e0e00a13497e80bc82 Mon Sep 17 00:00:00 2001 From: Greg Ungerer Date: Thu, 8 Dec 2011 15:39:05 +1000 Subject: [PATCH 18/56] m68k: consolidate the vmlinux.lds linker scripts The merge of m68knommu left the linker scripts a little disorganized. Some consistent naming and squashing two of scripts that just include others can simplify things a lot. So merge the two simple including scripts, and rename the nommu script to be consistent with the existing m68k linker scripts. Signed-off-by: Greg Ungerer --- .../kernel/{vmlinux.lds_no.S => vmlinux-nommu.lds} | 0 arch/m68k/kernel/vmlinux.lds.S | 13 +++++++++++-- arch/m68k/kernel/vmlinux.lds_mm.S | 10 ---------- 3 files changed, 11 insertions(+), 12 deletions(-) rename arch/m68k/kernel/{vmlinux.lds_no.S => vmlinux-nommu.lds} (100%) delete mode 100644 arch/m68k/kernel/vmlinux.lds_mm.S diff --git a/arch/m68k/kernel/vmlinux.lds_no.S b/arch/m68k/kernel/vmlinux-nommu.lds similarity index 100% rename from arch/m68k/kernel/vmlinux.lds_no.S rename to arch/m68k/kernel/vmlinux-nommu.lds diff --git a/arch/m68k/kernel/vmlinux.lds.S b/arch/m68k/kernel/vmlinux.lds.S index 030dabf0bc53..3d99a04f2394 100644 --- a/arch/m68k/kernel/vmlinux.lds.S +++ b/arch/m68k/kernel/vmlinux.lds.S @@ -1,5 +1,14 @@ #ifdef CONFIG_MMU -#include "vmlinux.lds_mm.S" +PHDRS +{ + text PT_LOAD FILEHDR PHDRS FLAGS (7); + data PT_LOAD FLAGS (7); +} +#ifdef CONFIG_SUN3 +#include "vmlinux-sun3.lds" #else -#include "vmlinux.lds_no.S" +#include "vmlinux-std.lds" +#endif +#else +#include "vmlinux-nommu.lds" #endif diff --git a/arch/m68k/kernel/vmlinux.lds_mm.S b/arch/m68k/kernel/vmlinux.lds_mm.S deleted file mode 100644 index 99ba315bd0a8..000000000000 --- a/arch/m68k/kernel/vmlinux.lds_mm.S +++ /dev/null @@ -1,10 +0,0 @@ -PHDRS -{ - text PT_LOAD FILEHDR PHDRS FLAGS (7); - data PT_LOAD FLAGS (7); -} -#ifdef CONFIG_SUN3 -#include "vmlinux-sun3.lds" -#else -#include "vmlinux-std.lds" -#endif From c0e0c89c089f4bd66dbbd1a44da90abe74fe3f02 Mon Sep 17 00:00:00 2001 From: Greg Ungerer Date: Thu, 22 Dec 2011 16:19:59 +1000 Subject: [PATCH 19/56] m68knommu: fix broken boot logo inclusion Compiling for the m68knommu/68328 Palm/Pilot target you get: AS arch/m68k/platform/68328/head-pilot.o arch/m68k/platform/68328/head-pilot.S:37:23: fatal error: bootlogo.rh: No such file or directory The build for this target used to do a conversion on a C coded boot logo and include this in the head assembler code. This got broken by changes to the local Makefile. Clean all this up by just including the C coded boot logo struct in the C code. With the appropriate alignment attribute there is no difference to the way it can be used. Signed-off-by: Greg Ungerer --- arch/m68k/platform/68328/Makefile | 6 +----- arch/m68k/platform/68328/bootlogo.h | 2 +- arch/m68k/platform/68328/bootlogo.pl | 10 ---------- arch/m68k/platform/68328/config.c | 3 +++ arch/m68k/platform/68328/head-pilot.S | 16 ++-------------- arch/m68k/platform/68328/head-rom.S | 9 ++------- 6 files changed, 9 insertions(+), 37 deletions(-) delete mode 100644 arch/m68k/platform/68328/bootlogo.pl diff --git a/arch/m68k/platform/68328/Makefile b/arch/m68k/platform/68328/Makefile index e4dfd8fde068..ee61bf84d4a0 100644 --- a/arch/m68k/platform/68328/Makefile +++ b/arch/m68k/platform/68328/Makefile @@ -14,12 +14,8 @@ obj-$(CONFIG_M68328) += config.o obj-$(CONFIG_ROM) += romvec.o extra-y := head.o -extra-$(CONFIG_M68328) += bootlogo.rh head.o - -$(obj)/bootlogo.rh: $(src)/bootlogo.h - perl $(src)/bootlogo.pl < $(src)/bootlogo.h > $(obj)/bootlogo.rh $(obj)/head.o: $(obj)/$(head-y) ln -sf $(head-y) $(obj)/head.o -clean-files := $(obj)/bootlogo.rh $(obj)/head.o $(head-y) +clean-files := $(obj)/head.o $(head-y) diff --git a/arch/m68k/platform/68328/bootlogo.h b/arch/m68k/platform/68328/bootlogo.h index 67bc2c17386e..b896c933fafc 100644 --- a/arch/m68k/platform/68328/bootlogo.h +++ b/arch/m68k/platform/68328/bootlogo.h @@ -1,6 +1,6 @@ #define bootlogo_width 160 #define bootlogo_height 160 -static unsigned char bootlogo_bits[] = { +unsigned char __attribute__ ((aligned(16))) bootlogo_bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x55, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x55, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, diff --git a/arch/m68k/platform/68328/bootlogo.pl b/arch/m68k/platform/68328/bootlogo.pl deleted file mode 100644 index b04ae3f50da5..000000000000 --- a/arch/m68k/platform/68328/bootlogo.pl +++ /dev/null @@ -1,10 +0,0 @@ - -$_ = join("", <>); - -s/(0x[0-9a-f]{2})/sprintf("0x%.2x",ord(pack("b8",unpack("B8",chr(hex($1))))))/gei; - -s/^ / .byte /gm; -s/[,};]+$//gm; -s/^static.*//gm; - -print $_; diff --git a/arch/m68k/platform/68328/config.c b/arch/m68k/platform/68328/config.c index a7bd21deb00f..d70bf2623db1 100644 --- a/arch/m68k/platform/68328/config.c +++ b/arch/m68k/platform/68328/config.c @@ -20,6 +20,9 @@ #include #include #include +#if defined(CONFIG_PILOT) || defined(CONFIG_INIT_LCD) +#include "bootlogo.h" +#endif /***************************************************************************/ diff --git a/arch/m68k/platform/68328/head-pilot.S b/arch/m68k/platform/68328/head-pilot.S index aecff532b343..255c28d1e755 100644 --- a/arch/m68k/platform/68328/head-pilot.S +++ b/arch/m68k/platform/68328/head-pilot.S @@ -24,19 +24,7 @@ .global _ramstart .global _ramend -.global penguin_bits - -#ifdef CONFIG_PILOT - -#define IMR 0xFFFFF304 - - .data - .align 16 - -penguin_bits: -#include "bootlogo.rh" - -#endif +.global bootlogo_bits /*****************************************************************************/ @@ -196,7 +184,7 @@ L3: DBG_PUTC('H') #ifdef CONFIG_PILOT - movel #penguin_bits, 0xFFFFFA00 + movel #bootlogo_bits, 0xFFFFFA00 moveb #10, 0xFFFFFA05 movew #160, 0xFFFFFA08 movew #160, 0xFFFFFA0A diff --git a/arch/m68k/platform/68328/head-rom.S b/arch/m68k/platform/68328/head-rom.S index 6ec77d3ea0b3..a5ff96d0295f 100644 --- a/arch/m68k/platform/68328/head-rom.S +++ b/arch/m68k/platform/68328/head-rom.S @@ -8,7 +8,7 @@ .global _ramend #ifdef CONFIG_INIT_LCD - .global splash_bits + .global bootlogo_bits #endif .data @@ -29,16 +29,11 @@ _ramend: #define RAMEND (CONFIG_RAMBASE + CONFIG_RAMSIZE) -#ifdef CONFIG_INIT_LCD -splash_bits: -#include "bootlogo.rh" -#endif - .text _start: _stext: movew #0x2700,%sr #ifdef CONFIG_INIT_LCD - movel #splash_bits, 0xfffffA00 /* LSSA */ + movel #bootlogo_bits, 0xfffffA00 /* LSSA */ moveb #0x28, 0xfffffA05 /* LVPW */ movew #0x280, 0xFFFFFa08 /* LXMAX */ movew #0x1df, 0xFFFFFa0a /* LYMAX */ From 2c85bd318996bb915b7181cecea602272752550c Mon Sep 17 00:00:00 2001 From: Greg Ungerer Date: Thu, 22 Dec 2011 17:15:31 +1000 Subject: [PATCH 20/56] m68knommu: remove no longer used rom_length from Palm/Pilot start up code Compiling for the m68knommu/68328 Palm/Pilot target you get: LD vmlinux arch/m68k/platform/68328/head.o: In function `L3': (.text+0x170): undefined reference to `rom_length' "rom_length" is not used any longer by any of the m68knommu code. So remove it from here too. Signed-off-by: Greg Ungerer --- arch/m68k/platform/68328/head-pilot.S | 3 --- 1 file changed, 3 deletions(-) diff --git a/arch/m68k/platform/68328/head-pilot.S b/arch/m68k/platform/68328/head-pilot.S index 255c28d1e755..2ebfd6420818 100644 --- a/arch/m68k/platform/68328/head-pilot.S +++ b/arch/m68k/platform/68328/head-pilot.S @@ -173,9 +173,6 @@ L3: moveq #79, %d7 movel %d0, _ramend - movel %a3, %d0 - movel %d0, rom_length - pea 0 pea env pea %sp@(4) From 59dbb3b168465e48e3a72b635ee0c184fa5c55aa Mon Sep 17 00:00:00 2001 From: Greg Ungerer Date: Fri, 14 Oct 2011 11:32:41 +1000 Subject: [PATCH 21/56] m68k: add machine and CPU definitions for ColdFire cores Create machine and CPU definitions to support the ColdFire CPU family members that have a virtual memory management unit. The ColdFire V4e core contains an MMU, and it is quite different to any other 68k family members. Signed-off-by: Greg Ungerer Acked-by: Geert Uytterhoeven Acked-by: Matt Waddel Acked-by: Kurt Mahan --- arch/m68k/include/asm/setup.h | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/arch/m68k/include/asm/setup.h b/arch/m68k/include/asm/setup.h index 4dfb3952b375..00c2c5397d37 100644 --- a/arch/m68k/include/asm/setup.h +++ b/arch/m68k/include/asm/setup.h @@ -40,6 +40,7 @@ #define MACH_HP300 9 #define MACH_Q40 10 #define MACH_SUN3X 11 +#define MACH_M54XX 12 #define COMMAND_LINE_SIZE 256 @@ -211,23 +212,27 @@ extern unsigned long m68k_machtype; #define CPUB_68030 1 #define CPUB_68040 2 #define CPUB_68060 3 +#define CPUB_COLDFIRE 4 #define CPU_68020 (1< Date: Fri, 14 Oct 2011 11:39:04 +1000 Subject: [PATCH 22/56] m68k: show ColdFire CPU/FPU/MMU type Update the show_cpuinfo() code to display info about ColdFire cores. Signed-off-by: Greg Ungerer Acked-by: Geert Uytterhoeven Acked-by: Matt Waddel Acked-by: Kurt Mahan --- arch/m68k/kernel/setup_mm.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/m68k/kernel/setup_mm.c b/arch/m68k/kernel/setup_mm.c index 55f8f5049f68..52e17d1e6138 100644 --- a/arch/m68k/kernel/setup_mm.c +++ b/arch/m68k/kernel/setup_mm.c @@ -388,6 +388,7 @@ static int show_cpuinfo(struct seq_file *m, void *v) #define LOOP_CYCLES_68030 (8) #define LOOP_CYCLES_68040 (3) #define LOOP_CYCLES_68060 (1) +#define LOOP_CYCLES_COLDFIRE (2) if (CPU_IS_020) { cpu = "68020"; @@ -401,6 +402,9 @@ static int show_cpuinfo(struct seq_file *m, void *v) } else if (CPU_IS_060) { cpu = "68060"; clockfactor = LOOP_CYCLES_68060; + } else if (CPU_IS_COLDFIRE) { + cpu = "ColdFire"; + clockfactor = LOOP_CYCLES_COLDFIRE; } else { cpu = "680x0"; clockfactor = 0; @@ -419,6 +423,8 @@ static int show_cpuinfo(struct seq_file *m, void *v) fpu = "68060"; else if (m68k_fputype & FPU_SUNFPA) fpu = "Sun FPA"; + else if (m68k_fputype & FPU_COLDFIRE) + fpu = "ColdFire"; else fpu = "none"; #endif @@ -435,6 +441,8 @@ static int show_cpuinfo(struct seq_file *m, void *v) mmu = "Sun-3"; else if (m68k_mmutype & MMU_APOLLO) mmu = "Apollo"; + else if (m68k_mmutype & MMU_COLDFIRE) + mmu = "ColdFire"; else mmu = "unknown"; From 8cee26f82a0c830740db0267f828045cc39b90b9 Mon Sep 17 00:00:00 2001 From: Greg Ungerer Date: Fri, 14 Oct 2011 12:01:22 +1000 Subject: [PATCH 23/56] m68k: definitions for the ColdFire V4e MMU hardware Basic register level definitions to support the internal MMU of the V4e ColdFire cores. Signed-off-by: Greg Ungerer Acked-by: Geert Uytterhoeven Acked-by: Matt Waddel Acked-by: Kurt Mahan --- arch/m68k/include/asm/mcfmmu.h | 110 +++++++++++++++++++++++++++++++++ 1 file changed, 110 insertions(+) create mode 100644 arch/m68k/include/asm/mcfmmu.h diff --git a/arch/m68k/include/asm/mcfmmu.h b/arch/m68k/include/asm/mcfmmu.h new file mode 100644 index 000000000000..8fdcfedd5d15 --- /dev/null +++ b/arch/m68k/include/asm/mcfmmu.h @@ -0,0 +1,110 @@ +/* + * mcfmmu.h -- definitions for the ColdFire v4e MMU + * + * (C) Copyright 2011, Greg Ungerer + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file COPYING in the main directory of this archive + * for more details. + */ + +#ifndef MCFMMU_H +#define MCFMMU_H + +/* + * The MMU support registers are mapped into the address space using + * the processor MMUBASE register. We used a fixed address for mapping, + * there doesn't seem any need to make this configurable yet. + */ +#define MMUBASE 0xfe000000 + +/* + * The support registers of the MMU. Names are the sames as those + * used in the Freescale v4e documentation. + */ +#define MMUCR (MMUBASE + 0x00) /* Control register */ +#define MMUOR (MMUBASE + 0x04) /* Operation register */ +#define MMUSR (MMUBASE + 0x08) /* Status register */ +#define MMUAR (MMUBASE + 0x10) /* TLB Address register */ +#define MMUTR (MMUBASE + 0x14) /* TLB Tag register */ +#define MMUDR (MMUBASE + 0x18) /* TLB Data register */ + +/* + * MMU Control register bit flags + */ +#define MMUCR_EN 0x00000001 /* Virtual mode enable */ +#define MMUCR_ASM 0x00000002 /* Address space mode */ + +/* + * MMU Operation register. + */ +#define MMUOR_UAA 0x00000001 /* Update allocatiom address */ +#define MMUOR_ACC 0x00000002 /* TLB access */ +#define MMUOR_RD 0x00000004 /* TLB access read */ +#define MMUOR_WR 0x00000000 /* TLB access write */ +#define MMUOR_ADR 0x00000008 /* TLB address select */ +#define MMUOR_ITLB 0x00000010 /* ITLB operation */ +#define MMUOR_CAS 0x00000020 /* Clear non-locked ASID TLBs */ +#define MMUOR_CNL 0x00000040 /* Clear non-locked TLBs */ +#define MMUOR_CA 0x00000080 /* Clear all TLBs */ +#define MMUOR_STLB 0x00000100 /* Search TLBs */ +#define MMUOR_AAN 16 /* TLB allocation address */ +#define MMUOR_AAMASK 0xffff0000 /* AA mask */ + +/* + * MMU Status register. + */ +#define MMUSR_HIT 0x00000002 /* Search TLB hit */ +#define MMUSR_WF 0x00000008 /* Write access fault */ +#define MMUSR_RF 0x00000010 /* Read access fault */ +#define MMUSR_SPF 0x00000020 /* Supervisor protect fault */ + +/* + * MMU Read/Write Tag register. + */ +#define MMUTR_V 0x00000001 /* Valid */ +#define MMUTR_SG 0x00000002 /* Shared global */ +#define MMUTR_IDN 2 /* Address Space ID */ +#define MMUTR_IDMASK 0x000003fc /* ASID mask */ +#define MMUTR_VAN 10 /* Virtual Address */ +#define MMUTR_VAMASK 0xfffffc00 /* VA mask */ + +/* + * MMU Read/Write Data register. + */ +#define MMUDR_LK 0x00000002 /* Lock entry */ +#define MMUDR_X 0x00000004 /* Execute access enable */ +#define MMUDR_W 0x00000008 /* Write access enable */ +#define MMUDR_R 0x00000010 /* Read access enable */ +#define MMUDR_SP 0x00000020 /* Supervisor access enable */ +#define MMUDR_CM_CWT 0x00000000 /* Cachable write thru */ +#define MMUDR_CM_CCB 0x00000040 /* Cachable copy back */ +#define MMUDR_CM_NCP 0x00000080 /* Non-cachable precise */ +#define MMUDR_CM_NCI 0x000000c0 /* Non-cachable imprecise */ +#define MMUDR_SZ_1MB 0x00000000 /* 1MB page size */ +#define MMUDR_SZ_4KB 0x00000100 /* 4kB page size */ +#define MMUDR_SZ_8KB 0x00000200 /* 8kB page size */ +#define MMUDR_SZ_1KB 0x00000300 /* 1kB page size */ +#define MMUDR_PAN 10 /* Physical address */ +#define MMUDR_PAMASK 0xfffffc00 /* PA mask */ + +#ifndef __ASSEMBLY__ + +/* + * Simple access functions for the MMU registers. Nothing fancy + * currently required, just simple 32bit access. + */ +static inline u32 mmu_read(u32 a) +{ + return *((volatile u32 *) a); +} + +static inline void mmu_write(u32 a, u32 v) +{ + *((volatile u32 *) a) = v; + __asm__ __volatile__ ("nop"); +} + +#endif + +#endif /* MCFMMU_H */ From 78ccdffc937319f4f7ffc13684c114100c727c21 Mon Sep 17 00:00:00 2001 From: Greg Ungerer Date: Fri, 14 Oct 2011 14:22:22 +1000 Subject: [PATCH 24/56] m68k: make interrupt definitions conditional on correct CPU types The interrupt handling support defines and code is not so much conditional on an MMU being present (CONFIG_MMU), as it is on which type of CPU we are building for. So make the code conditional on the CPU types instead. The current irq.h is mostly specific to the interrupt code for the 680x0 CPUs, so it should only be used for them. Signed-off-by: Greg Ungerer Acked-by: Geert Uytterhoeven Acked-by: Matt Waddel Acked-by: Kurt Mahan --- arch/m68k/include/asm/irq.h | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/arch/m68k/include/asm/irq.h b/arch/m68k/include/asm/irq.h index 6198df5ff245..0e89fa05de0e 100644 --- a/arch/m68k/include/asm/irq.h +++ b/arch/m68k/include/asm/irq.h @@ -25,7 +25,8 @@ #define NR_IRQS 0 #endif -#ifdef CONFIG_MMU +#if defined(CONFIG_M68020) || defined(CONFIG_M68030) || \ + defined(CONFIG_M68040) || defined(CONFIG_M68060) /* * Interrupt source definitions @@ -80,7 +81,7 @@ extern unsigned int irq_canonicalize(unsigned int irq); #else #define irq_canonicalize(irq) (irq) -#endif /* CONFIG_MMU */ +#endif /* !(CONFIG_M68020 || CONFIG_M68030 || CONFIG_M68040 || CONFIG_M68060) */ asmlinkage void do_IRQ(int irq, struct pt_regs *regs); extern atomic_t irq_err_count; From 2c9b82adb5ea65745d5d73d97bb0e1cc16cba4a0 Mon Sep 17 00:00:00 2001 From: Greg Ungerer Date: Fri, 14 Oct 2011 14:36:41 +1000 Subject: [PATCH 25/56] m68k: add TASK definitions for ColdFires running with MMU Add appropriate TASK_SIZE and TASK_UNMAPPED_BASE definitions for running on ColdFire V4e cores with MMU enabled. Signed-off-by: Greg Ungerer Acked-by: Geert Uytterhoeven Acked-by: Matt Waddel Acked-by: Kurt Mahan --- arch/m68k/include/asm/processor.h | 16 ++++++++++------ 1 file changed, 10 insertions(+), 6 deletions(-) diff --git a/arch/m68k/include/asm/processor.h b/arch/m68k/include/asm/processor.h index 7ec06096a6fb..46460fa15d5c 100644 --- a/arch/m68k/include/asm/processor.h +++ b/arch/m68k/include/asm/processor.h @@ -48,10 +48,12 @@ static inline void wrusp(unsigned long usp) * so don't change it unless you know what you are doing. */ #ifdef CONFIG_MMU -#ifndef CONFIG_SUN3 -#define TASK_SIZE (0xF0000000UL) -#else +#if defined(CONFIG_COLDFIRE) +#define TASK_SIZE (0xC0000000UL) +#elif defined(CONFIG_SUN3) #define TASK_SIZE (0x0E000000UL) +#else +#define TASK_SIZE (0xF0000000UL) #endif #else #define TASK_SIZE (0xFFFFFFFFUL) @@ -66,10 +68,12 @@ static inline void wrusp(unsigned long usp) * space during mmap's. */ #ifdef CONFIG_MMU -#ifndef CONFIG_SUN3 -#define TASK_UNMAPPED_BASE 0xC0000000UL -#else +#if defined(CONFIG_COLDFIRE) +#define TASK_UNMAPPED_BASE 0x60000000UL +#elif defined(CONFIG_SUN3) #define TASK_UNMAPPED_BASE 0x0A000000UL +#else +#define TASK_UNMAPPED_BASE 0xC0000000UL #endif #define TASK_UNMAPPED_ALIGN(addr, off) PAGE_ALIGN(addr) #else From e08d703cc2ab6e47dbd10a74eb029f7dfa93d71d Mon Sep 17 00:00:00 2001 From: Greg Ungerer Date: Fri, 14 Oct 2011 14:43:30 +1000 Subject: [PATCH 26/56] m68k: modify user space access functions to support ColdFire CPUs Modify the user space access functions to support the ColdFire V4e cores running with MMU enabled. The ColdFire processors do not support the "moves" instruction used by the traditional 680x0 processors for moving data into and out of another address space. They only support the notion of a single address space, and you use the usual "move" instruction to access that. Create a new config symbol (CONFIG_CPU_HAS_ADDRESS_SPACES) to mark the CPU types that support separate address spaces, and thus also support the sfc/dfc registers and the "moves" instruction that go along with that. The code is almost identical for user space access, so lets just use a define to choose either the "move" or "moves" in the assembler code. Signed-off-by: Greg Ungerer Acked-by: Matt Waddel Acked-by: Kurt Mahan Acked-by: Geert Uytterhoeven --- arch/m68k/Kconfig | 3 +++ arch/m68k/Kconfig.cpu | 4 +++ arch/m68k/include/asm/segment.h | 4 +-- arch/m68k/include/asm/uaccess_mm.h | 42 +++++++++++++++++++++--------- arch/m68k/lib/uaccess.c | 22 ++++++++-------- 5 files changed, 49 insertions(+), 26 deletions(-) diff --git a/arch/m68k/Kconfig b/arch/m68k/Kconfig index 32fd3642e71b..5f860cf67afc 100644 --- a/arch/m68k/Kconfig +++ b/arch/m68k/Kconfig @@ -66,6 +66,9 @@ config CPU_HAS_NO_BITFIELDS config CPU_HAS_NO_MULDIV64 bool +config CPU_HAS_ADDRESS_SPACES + bool + config HZ int default 1000 if CLEOPATRA diff --git a/arch/m68k/Kconfig.cpu b/arch/m68k/Kconfig.cpu index 017f4fc388d2..5ae1d63ef5e9 100644 --- a/arch/m68k/Kconfig.cpu +++ b/arch/m68k/Kconfig.cpu @@ -38,6 +38,7 @@ config M68020 bool "68020 support" depends on MMU select GENERIC_ATOMIC64 + select CPU_HAS_ADDRESS_SPACES help If you anticipate running this kernel on a computer with a MC68020 processor, say Y. Otherwise, say N. Note that the 68020 requires a @@ -48,6 +49,7 @@ config M68030 bool "68030 support" depends on MMU && !MMU_SUN3 select GENERIC_ATOMIC64 + select CPU_HAS_ADDRESS_SPACES help If you anticipate running this kernel on a computer with a MC68030 processor, say Y. Otherwise, say N. Note that a MC68EC030 will not @@ -57,6 +59,7 @@ config M68040 bool "68040 support" depends on MMU && !MMU_SUN3 select GENERIC_ATOMIC64 + select CPU_HAS_ADDRESS_SPACES help If you anticipate running this kernel on a computer with a MC68LC040 or MC68040 processor, say Y. Otherwise, say N. Note that an @@ -67,6 +70,7 @@ config M68060 bool "68060 support" depends on MMU && !MMU_SUN3 select GENERIC_ATOMIC64 + select CPU_HAS_ADDRESS_SPACES help If you anticipate running this kernel on a computer with a MC68060 processor, say Y. Otherwise, say N. diff --git a/arch/m68k/include/asm/segment.h b/arch/m68k/include/asm/segment.h index ee959219fdfe..1a142e9ceaad 100644 --- a/arch/m68k/include/asm/segment.h +++ b/arch/m68k/include/asm/segment.h @@ -31,7 +31,7 @@ typedef struct { static inline mm_segment_t get_fs(void) { -#ifdef CONFIG_MMU +#ifdef CONFIG_CPU_HAS_ADDRESS_SPACES mm_segment_t _v; __asm__ ("movec %/dfc,%0":"=r" (_v.seg):); @@ -49,7 +49,7 @@ static inline mm_segment_t get_ds(void) static inline void set_fs(mm_segment_t val) { -#ifdef CONFIG_MMU +#ifdef CONFIG_CPU_HAS_ADDRESS_SPACES __asm__ __volatile__ ("movec %0,%/sfc\n\t" "movec %0,%/dfc\n\t" : /* no outputs */ : "r" (val.seg) : "memory"); diff --git a/arch/m68k/include/asm/uaccess_mm.h b/arch/m68k/include/asm/uaccess_mm.h index 7107f3fbdbb6..9c80cd515b20 100644 --- a/arch/m68k/include/asm/uaccess_mm.h +++ b/arch/m68k/include/asm/uaccess_mm.h @@ -20,6 +20,22 @@ static inline int access_ok(int type, const void __user *addr, return 1; } +/* + * Not all varients of the 68k family support the notion of address spaces. + * The traditional 680x0 parts do, and they use the sfc/dfc registers and + * the "moves" instruction to access user space from kernel space. Other + * family members like ColdFire don't support this, and only have a single + * address space, and use the usual "move" instruction for user space access. + * + * Outside of this difference the user space access functions are the same. + * So lets keep the code simple and just define in what we need to use. + */ +#ifdef CONFIG_CPU_HAS_ADDRESS_SPACES +#define MOVES "moves" +#else +#define MOVES "move" +#endif + /* * The exception table consists of pairs of addresses: the first is the * address of an instruction that is allowed to fault, and the second is @@ -43,7 +59,7 @@ extern int __get_user_bad(void); #define __put_user_asm(res, x, ptr, bwl, reg, err) \ asm volatile ("\n" \ - "1: moves."#bwl" %2,%1\n" \ + "1: "MOVES"."#bwl" %2,%1\n" \ "2:\n" \ " .section .fixup,\"ax\"\n" \ " .even\n" \ @@ -83,8 +99,8 @@ asm volatile ("\n" \ { \ const void __user *__pu_ptr = (ptr); \ asm volatile ("\n" \ - "1: moves.l %2,(%1)+\n" \ - "2: moves.l %R2,(%1)\n" \ + "1: "MOVES".l %2,(%1)+\n" \ + "2: "MOVES".l %R2,(%1)\n" \ "3:\n" \ " .section .fixup,\"ax\"\n" \ " .even\n" \ @@ -115,12 +131,12 @@ asm volatile ("\n" \ #define __get_user_asm(res, x, ptr, type, bwl, reg, err) ({ \ type __gu_val; \ asm volatile ("\n" \ - "1: moves."#bwl" %2,%1\n" \ + "1: "MOVES"."#bwl" %2,%1\n" \ "2:\n" \ " .section .fixup,\"ax\"\n" \ " .even\n" \ "10: move.l %3,%0\n" \ - " sub."#bwl" %1,%1\n" \ + " sub.l %1,%1\n" \ " jra 2b\n" \ " .previous\n" \ "\n" \ @@ -152,8 +168,8 @@ asm volatile ("\n" \ const void *__gu_ptr = (ptr); \ u64 __gu_val; \ asm volatile ("\n" \ - "1: moves.l (%2)+,%1\n" \ - "2: moves.l (%2),%R1\n" \ + "1: "MOVES".l (%2)+,%1\n" \ + "2: "MOVES".l (%2),%R1\n" \ "3:\n" \ " .section .fixup,\"ax\"\n" \ " .even\n" \ @@ -188,12 +204,12 @@ unsigned long __generic_copy_to_user(void __user *to, const void *from, unsigned #define __constant_copy_from_user_asm(res, to, from, tmp, n, s1, s2, s3)\ asm volatile ("\n" \ - "1: moves."#s1" (%2)+,%3\n" \ + "1: "MOVES"."#s1" (%2)+,%3\n" \ " move."#s1" %3,(%1)+\n" \ - "2: moves."#s2" (%2)+,%3\n" \ + "2: "MOVES"."#s2" (%2)+,%3\n" \ " move."#s2" %3,(%1)+\n" \ " .ifnc \""#s3"\",\"\"\n" \ - "3: moves."#s3" (%2)+,%3\n" \ + "3: "MOVES"."#s3" (%2)+,%3\n" \ " move."#s3" %3,(%1)+\n" \ " .endif\n" \ "4:\n" \ @@ -269,13 +285,13 @@ __constant_copy_from_user(void *to, const void __user *from, unsigned long n) #define __constant_copy_to_user_asm(res, to, from, tmp, n, s1, s2, s3) \ asm volatile ("\n" \ " move."#s1" (%2)+,%3\n" \ - "11: moves."#s1" %3,(%1)+\n" \ + "11: "MOVES"."#s1" %3,(%1)+\n" \ "12: move."#s2" (%2)+,%3\n" \ - "21: moves."#s2" %3,(%1)+\n" \ + "21: "MOVES"."#s2" %3,(%1)+\n" \ "22:\n" \ " .ifnc \""#s3"\",\"\"\n" \ " move."#s3" (%2)+,%3\n" \ - "31: moves."#s3" %3,(%1)+\n" \ + "31: "MOVES"."#s3" %3,(%1)+\n" \ "32:\n" \ " .endif\n" \ "4:\n" \ diff --git a/arch/m68k/lib/uaccess.c b/arch/m68k/lib/uaccess.c index 13854ed8cd9a..5664386338da 100644 --- a/arch/m68k/lib/uaccess.c +++ b/arch/m68k/lib/uaccess.c @@ -15,17 +15,17 @@ unsigned long __generic_copy_from_user(void *to, const void __user *from, asm volatile ("\n" " tst.l %0\n" " jeq 2f\n" - "1: moves.l (%1)+,%3\n" + "1: "MOVES".l (%1)+,%3\n" " move.l %3,(%2)+\n" " subq.l #1,%0\n" " jne 1b\n" "2: btst #1,%5\n" " jeq 4f\n" - "3: moves.w (%1)+,%3\n" + "3: "MOVES".w (%1)+,%3\n" " move.w %3,(%2)+\n" "4: btst #0,%5\n" " jeq 6f\n" - "5: moves.b (%1)+,%3\n" + "5: "MOVES".b (%1)+,%3\n" " move.b %3,(%2)+\n" "6:\n" " .section .fixup,\"ax\"\n" @@ -68,17 +68,17 @@ unsigned long __generic_copy_to_user(void __user *to, const void *from, " tst.l %0\n" " jeq 4f\n" "1: move.l (%1)+,%3\n" - "2: moves.l %3,(%2)+\n" + "2: "MOVES".l %3,(%2)+\n" "3: subq.l #1,%0\n" " jne 1b\n" "4: btst #1,%5\n" " jeq 6f\n" " move.w (%1)+,%3\n" - "5: moves.w %3,(%2)+\n" + "5: "MOVES".w %3,(%2)+\n" "6: btst #0,%5\n" " jeq 8f\n" " move.b (%1)+,%3\n" - "7: moves.b %3,(%2)+\n" + "7: "MOVES".b %3,(%2)+\n" "8:\n" " .section .fixup,\"ax\"\n" " .even\n" @@ -115,7 +115,7 @@ long strncpy_from_user(char *dst, const char __user *src, long count) return count; asm volatile ("\n" - "1: moves.b (%2)+,%4\n" + "1: "MOVES".b (%2)+,%4\n" " move.b %4,(%1)+\n" " jeq 2f\n" " subq.l #1,%3\n" @@ -152,7 +152,7 @@ long strnlen_user(const char __user *src, long n) asm volatile ("\n" "1: subq.l #1,%1\n" " jmi 3f\n" - "2: moves.b (%0)+,%2\n" + "2: "MOVES".b (%0)+,%2\n" " tst.b %2\n" " jne 1b\n" " jra 4f\n" @@ -188,15 +188,15 @@ unsigned long __clear_user(void __user *to, unsigned long n) asm volatile ("\n" " tst.l %0\n" " jeq 3f\n" - "1: moves.l %2,(%1)+\n" + "1: "MOVES".l %2,(%1)+\n" "2: subq.l #1,%0\n" " jne 1b\n" "3: btst #1,%4\n" " jeq 5f\n" - "4: moves.w %2,(%1)+\n" + "4: "MOVES".w %2,(%1)+\n" "5: btst #0,%4\n" " jeq 7f\n" - "6: moves.b %2,(%1)\n" + "6: "MOVES".b %2,(%1)\n" "7:\n" " .section .fixup,\"ax\"\n" " .even\n" From feb1ee759522eb67e7733fe5b59bd17420f4d2d8 Mon Sep 17 00:00:00 2001 From: Greg Ungerer Date: Mon, 17 Oct 2011 17:31:26 +1000 Subject: [PATCH 27/56] m68k: use addr_limit checking for m68k CPUs that do no support address spaces The ColdFire CPU family, and the original 68000, do not support separate address spaces like the other 680x0 CPU types. Modify the set_fs()/get_fs() functions and macros to use a thread_info addr_limit for address space checking. This is pretty much what all other architectures that do not support separate setable address spaces do. Signed-off-by: Alexander Stein Signed-off-by: Greg Ungerer Acked-by: Matt Waddel Acked-by: Kurt Mahan --- arch/m68k/include/asm/segment.h | 30 +++++++++++++++-------------- arch/m68k/include/asm/thread_info.h | 3 +++ 2 files changed, 19 insertions(+), 14 deletions(-) diff --git a/arch/m68k/include/asm/segment.h b/arch/m68k/include/asm/segment.h index 1a142e9ceaad..0fa80e97ed2d 100644 --- a/arch/m68k/include/asm/segment.h +++ b/arch/m68k/include/asm/segment.h @@ -22,23 +22,26 @@ typedef struct { } mm_segment_t; #define MAKE_MM_SEG(s) ((mm_segment_t) { (s) }) -#define USER_DS MAKE_MM_SEG(__USER_DS) -#define KERNEL_DS MAKE_MM_SEG(__KERNEL_DS) +#ifdef CONFIG_CPU_HAS_ADDRESS_SPACES /* * Get/set the SFC/DFC registers for MOVES instructions */ +#define USER_DS MAKE_MM_SEG(__USER_DS) +#define KERNEL_DS MAKE_MM_SEG(__KERNEL_DS) static inline mm_segment_t get_fs(void) { -#ifdef CONFIG_CPU_HAS_ADDRESS_SPACES mm_segment_t _v; __asm__ ("movec %/dfc,%0":"=r" (_v.seg):); - return _v; -#else - return USER_DS; -#endif +} + +static inline void set_fs(mm_segment_t val) +{ + __asm__ __volatile__ ("movec %0,%/sfc\n\t" + "movec %0,%/dfc\n\t" + : /* no outputs */ : "r" (val.seg) : "memory"); } static inline mm_segment_t get_ds(void) @@ -47,14 +50,13 @@ static inline mm_segment_t get_ds(void) return KERNEL_DS; } -static inline void set_fs(mm_segment_t val) -{ -#ifdef CONFIG_CPU_HAS_ADDRESS_SPACES - __asm__ __volatile__ ("movec %0,%/sfc\n\t" - "movec %0,%/dfc\n\t" - : /* no outputs */ : "r" (val.seg) : "memory"); +#else +#define USER_DS MAKE_MM_SEG(TASK_SIZE) +#define KERNEL_DS MAKE_MM_SEG(0xFFFFFFFF) +#define get_ds() (KERNEL_DS) +#define get_fs() (current_thread_info()->addr_limit) +#define set_fs(x) (current_thread_info()->addr_limit = (x)) #endif -} #define segment_eq(a,b) ((a).seg == (b).seg) diff --git a/arch/m68k/include/asm/thread_info.h b/arch/m68k/include/asm/thread_info.h index 01cef3ceff46..29fa6da4f17c 100644 --- a/arch/m68k/include/asm/thread_info.h +++ b/arch/m68k/include/asm/thread_info.h @@ -3,6 +3,7 @@ #include #include +#include /* * On machines with 4k pages we default to an 8k thread size, though we @@ -26,6 +27,7 @@ struct thread_info { struct task_struct *task; /* main task structure */ unsigned long flags; struct exec_domain *exec_domain; /* execution domain */ + mm_segment_t addr_limit; /* thread address space */ int preempt_count; /* 0 => preemptable, <0 => BUG */ __u32 cpu; /* should always be 0 on m68k */ unsigned long tp_value; /* thread pointer */ @@ -39,6 +41,7 @@ struct thread_info { { \ .task = &tsk, \ .exec_domain = &default_exec_domain, \ + .addr_limit = KERNEL_DS, \ .preempt_count = INIT_PREEMPT_COUNT, \ .restart_block = { \ .fn = do_no_restart_syscall, \ From 0079fe7502b45c2dbec6d04541e637484191c393 Mon Sep 17 00:00:00 2001 From: Greg Ungerer Date: Fri, 14 Oct 2011 15:35:37 +1000 Subject: [PATCH 28/56] m68k: init the MMU hardware for the 54xx ColdFire The 54xx ColdFire CPU family has an internal MMU. Up to now though we have only supported running on them with the MMU disabled. Add code to the 54xx ColdFire init sequence to initialize the bootmem used by the usual MMU m68k code for paging init. Signed-off-by: Greg Ungerer Acked-by: Geert Uytterhoeven Acked-by: Matt Waddel Acked-by: Kurt Mahan --- arch/m68k/platform/coldfire/head.S | 47 +++++++++++++++++++++++++++++- 1 file changed, 46 insertions(+), 1 deletion(-) diff --git a/arch/m68k/platform/coldfire/head.S b/arch/m68k/platform/coldfire/head.S index 49666b4dd091..38f04a3f6207 100644 --- a/arch/m68k/platform/coldfire/head.S +++ b/arch/m68k/platform/coldfire/head.S @@ -3,7 +3,7 @@ /* * head.S -- common startup code for ColdFire CPUs. * - * (C) Copyright 1999-2010, Greg Ungerer . + * (C) Copyright 1999-2011, Greg Ungerer . */ /*****************************************************************************/ @@ -13,6 +13,7 @@ #include #include #include +#include #include /*****************************************************************************/ @@ -135,6 +136,14 @@ _init_sp: __HEAD +#ifdef CONFIG_MMU +_start0: + jmp _start +.global kernel_pg_dir +.equ kernel_pg_dir,_start0 +.equ .,_start0+0x1000 +#endif + /* * This is the codes first entry point. This is where it all * begins... @@ -193,6 +202,26 @@ _start: movec %d0,%CACR nop +#ifdef CONFIG_MMU + /* + * Identity mapping for the kernel region. + */ + movel #(MMUBASE+1),%d0 /* enable MMUBAR registers */ + movec %d0,%MMUBAR + movel #MMUOR_CA,%d0 /* clear TLB entries */ + movel %d0,MMUOR + movel #0,%d0 /* set ASID to 0 */ + movec %d0,%asid + + movel #MMUCR_EN,%d0 /* Enable the identity map */ + movel %d0,MMUCR + nop /* sync i-pipeline */ + + movel #_vstart,%a0 /* jump to "virtual" space */ + jmp %a0@ +_vstart: +#endif /* CONFIG_MMU */ + #ifdef CONFIG_ROMFS_FS /* * Move ROM filesystem above bss :-) @@ -238,6 +267,22 @@ _clear_bss: lea init_thread_union,%a0 lea THREAD_SIZE(%a0),%sp +#ifdef CONFIG_MMU +.global m68k_cputype +.global m68k_mmutype +.global m68k_fputype +.global m68k_machtype + movel #CPU_COLDFIRE,%d0 + movel %d0,m68k_cputype /* Mark us as a ColdFire */ + movel #MMU_COLDFIRE,%d0 + movel %d0,m68k_mmutype + movel #FPU_COLDFIRE,%d0 + movel %d0,m68k_fputype + movel #MACH_M54XX,%d0 + movel %d0,m68k_machtype /* Mark us as a 54xx machine */ + lea init_task,%a2 /* Set "current" init task */ +#endif + /* * Assember start up done, start code proper. */ From 88be3515934004d271398129ba7145635e95127e Mon Sep 17 00:00:00 2001 From: Greg Ungerer Date: Fri, 14 Oct 2011 15:06:22 +1000 Subject: [PATCH 29/56] m68k: add ColdFire 54xx CPU MMU memory init code Add code to the 54xx ColdFire CPU init to setup memory ready for the m68k paged memory start up. Some of the RAM variables that were specific to the non-mmu code paths now need to be used during this setup, so when CONFIG_MMU is enabled. Move these out of page_no.h and into page.h. Signed-off-by: Greg Ungerer Acked-by: Matt Waddel Acked-by: Kurt Mahan Acked-by: Geert Uytterhoeven --- arch/m68k/include/asm/page.h | 4 +++ arch/m68k/include/asm/page_no.h | 3 -- arch/m68k/platform/54xx/config.c | 47 ++++++++++++++++++++++++++++++++ 3 files changed, 51 insertions(+), 3 deletions(-) diff --git a/arch/m68k/include/asm/page.h b/arch/m68k/include/asm/page.h index dfebb7c1e379..ba6c91d5f3a9 100644 --- a/arch/m68k/include/asm/page.h +++ b/arch/m68k/include/asm/page.h @@ -36,6 +36,10 @@ typedef struct page *pgtable_t; #define __pgd(x) ((pgd_t) { (x) } ) #define __pgprot(x) ((pgprot_t) { (x) } ) +extern unsigned long _rambase; +extern unsigned long _ramstart; +extern unsigned long _ramend; + #endif /* !__ASSEMBLY__ */ #ifdef CONFIG_MMU diff --git a/arch/m68k/include/asm/page_no.h b/arch/m68k/include/asm/page_no.h index a8d1c60eb9ce..90595721185f 100644 --- a/arch/m68k/include/asm/page_no.h +++ b/arch/m68k/include/asm/page_no.h @@ -5,9 +5,6 @@ extern unsigned long memory_start; extern unsigned long memory_end; -extern unsigned long _rambase; -extern unsigned long _ramstart; -extern unsigned long _ramend; #define get_user_page(vaddr) __get_free_page(GFP_KERNEL) #define free_user_page(page, addr) free_page(addr) diff --git a/arch/m68k/platform/54xx/config.c b/arch/m68k/platform/54xx/config.c index 78130984db95..ee043540bfa2 100644 --- a/arch/m68k/platform/54xx/config.c +++ b/arch/m68k/platform/54xx/config.c @@ -13,11 +13,17 @@ #include #include #include +#include +#include +#include #include #include #include #include #include +#ifdef CONFIG_MMU +#include +#endif /***************************************************************************/ @@ -95,8 +101,49 @@ static void mcf54xx_reset(void) /***************************************************************************/ +#ifdef CONFIG_MMU + +unsigned long num_pages; + +static void __init mcf54xx_bootmem_alloc(void) +{ + unsigned long start_pfn; + unsigned long memstart; + + /* _rambase and _ramend will be naturally page aligned */ + m68k_memory[0].addr = _rambase; + m68k_memory[0].size = _ramend - _rambase; + + /* compute total pages in system */ + num_pages = (_ramend - _rambase) >> PAGE_SHIFT; + + /* page numbers */ + memstart = PAGE_ALIGN(_ramstart); + min_low_pfn = _rambase >> PAGE_SHIFT; + start_pfn = memstart >> PAGE_SHIFT; + max_low_pfn = _ramend >> PAGE_SHIFT; + high_memory = (void *)_ramend; + + m68k_virt_to_node_shift = fls(_ramend - _rambase - 1) - 6; + module_fixup(NULL, __start_fixup, __stop_fixup); + + /* setup bootmem data */ + m68k_setup_node(0); + memstart += init_bootmem_node(NODE_DATA(0), start_pfn, + min_low_pfn, max_low_pfn); + free_bootmem_node(NODE_DATA(0), memstart, _ramend - memstart); +} + +#endif /* CONFIG_MMU */ + +/***************************************************************************/ + void __init config_BSP(char *commandp, int size) { +#ifdef CONFIG_MMU + mcf54xx_bootmem_alloc(); + mmu_context_init(); +#endif mach_reset = mcf54xx_reset; m54xx_uarts_init(); } From bbc6f1ba509cf9cda42ce63bbd40afe577ab028e Mon Sep 17 00:00:00 2001 From: Greg Ungerer Date: Fri, 14 Oct 2011 15:41:56 +1000 Subject: [PATCH 30/56] m68k: set register a2 to current if MMU enabled on ColdFire Virtual memory m68k systems build with register a2 dedicated to being the current proc pointer (non-MMU don't do this). Add code to the ColdFire interrupt and exception processing to set this on entry, and at context switch time. We use the same GET_CURRENT() macro that MMU enabled code uses - modifying it so that the assembler is ColdFire clean. Signed-off-by: Greg Ungerer Acked-by: Matt Waddel Acked-by: Kurt Mahan Acked-by: Geert Uytterhoeven --- arch/m68k/include/asm/entry.h | 10 +++++++++- arch/m68k/kernel/entry_no.S | 3 +++ arch/m68k/platform/coldfire/entry.S | 6 +++++- 3 files changed, 17 insertions(+), 2 deletions(-) diff --git a/arch/m68k/include/asm/entry.h b/arch/m68k/include/asm/entry.h index c3c5a8643e15..622138dc7288 100644 --- a/arch/m68k/include/asm/entry.h +++ b/arch/m68k/include/asm/entry.h @@ -222,16 +222,24 @@ * Non-MMU systems do not reserve %a2 in this way, and this definition is * not used for them. */ +#ifdef CONFIG_MMU + #define curptr a2 #define GET_CURRENT(tmp) get_current tmp .macro get_current reg=%d0 movel %sp,\reg - andw #-THREAD_SIZE,\reg + andl #-THREAD_SIZE,\reg movel \reg,%curptr movel %curptr@,%curptr .endm +#else + +#define GET_CURRENT(tmp) + +#endif /* CONFIG_MMU */ + #else /* C source */ #define STR(X) STR1(X) diff --git a/arch/m68k/kernel/entry_no.S b/arch/m68k/kernel/entry_no.S index ac86a9ffc1d7..d80cba45589f 100644 --- a/arch/m68k/kernel/entry_no.S +++ b/arch/m68k/kernel/entry_no.S @@ -44,6 +44,7 @@ ENTRY(buserr) SAVE_ALL_INT + GET_CURRENT(%d0) movel %sp,%sp@- /* stack frame pointer argument */ jsr buserr_c addql #4,%sp @@ -51,6 +52,7 @@ ENTRY(buserr) ENTRY(trap) SAVE_ALL_INT + GET_CURRENT(%d0) movel %sp,%sp@- /* stack frame pointer argument */ jsr trap_c addql #4,%sp @@ -61,6 +63,7 @@ ENTRY(trap) .globl dbginterrupt ENTRY(dbginterrupt) SAVE_ALL_INT + GET_CURRENT(%d0) movel %sp,%sp@- /* stack frame pointer argument */ jsr dbginterrupt_c addql #4,%sp diff --git a/arch/m68k/platform/coldfire/entry.S b/arch/m68k/platform/coldfire/entry.S index f567a163bc40..863889fc31c9 100644 --- a/arch/m68k/platform/coldfire/entry.S +++ b/arch/m68k/platform/coldfire/entry.S @@ -62,6 +62,7 @@ enosys: ENTRY(system_call) SAVE_ALL_SYS move #0x2000,%sr /* enable intrs again */ + GET_CURRENT(%d2) cmpl #NR_syscalls,%d0 jcc enosys @@ -165,6 +166,7 @@ Lsignal_return: */ ENTRY(inthandler) SAVE_ALL_INT + GET_CURRENT(%d2) movew %sp@(PT_OFF_FORMATVEC),%d0 /* put exception # in d0 */ andl #0x03fc,%d0 /* mask out vector only */ @@ -190,7 +192,9 @@ ENTRY(resume) movel %sp,%a0@(TASK_THREAD+THREAD_KSP) /* save kernel stack pointer */ RDUSP /* movel %usp,%a3 */ movel %a3,%a0@(TASK_THREAD+THREAD_USP) /* save thread user stack */ - +#ifdef CONFIG_MMU + movel %a1,%a2 /* set new current */ +#endif movel %a1@(TASK_THREAD+THREAD_USP),%a3 /* restore thread user stack */ WRUSP /* movel %a3,%usp */ movel %a1@(TASK_THREAD+THREAD_KSP),%sp /* restore new kernel stack */ From 91521c2ea6e3d5a790df40988101ad099ddbf7c8 Mon Sep 17 00:00:00 2001 From: Greg Ungerer Date: Fri, 14 Oct 2011 16:11:38 +1000 Subject: [PATCH 31/56] m68k: page table support definitions and code for ColdFire MMU The ColdFire V4e MMU is nothing like any of the other m68k MMU's. So we need to create a set of definitions and support routines for the kernels paging functions. This is largely taken from Freescales BSP code for this (though it was a 2.6.25 kernel). I have cleaned it up alot from the original. Signed-off-by: Greg Ungerer Acked-by: Geert Uytterhoeven Acked-by: Matt Waddel Acked-by: Kurt Mahan --- arch/m68k/include/asm/mcf_pgtable.h | 425 ++++++++++++++++++++++++++++ 1 file changed, 425 insertions(+) create mode 100644 arch/m68k/include/asm/mcf_pgtable.h diff --git a/arch/m68k/include/asm/mcf_pgtable.h b/arch/m68k/include/asm/mcf_pgtable.h new file mode 100644 index 000000000000..756bde4fb4f8 --- /dev/null +++ b/arch/m68k/include/asm/mcf_pgtable.h @@ -0,0 +1,425 @@ +#ifndef _MCF_PGTABLE_H +#define _MCF_PGTABLE_H + +#include +#include + +/* + * MMUDR bits, in proper place. We write these directly into the MMUDR + * after masking from the pte. + */ +#define CF_PAGE_LOCKED MMUDR_LK /* 0x00000002 */ +#define CF_PAGE_EXEC MMUDR_X /* 0x00000004 */ +#define CF_PAGE_WRITABLE MMUDR_W /* 0x00000008 */ +#define CF_PAGE_READABLE MMUDR_R /* 0x00000010 */ +#define CF_PAGE_SYSTEM MMUDR_SP /* 0x00000020 */ +#define CF_PAGE_COPYBACK MMUDR_CM_CCB /* 0x00000040 */ +#define CF_PAGE_NOCACHE MMUDR_CM_NCP /* 0x00000080 */ + +#define CF_CACHEMASK (~MMUDR_CM_CCB) +#define CF_PAGE_MMUDR_MASK 0x000000fe + +#define _PAGE_NOCACHE030 CF_PAGE_NOCACHE + +/* + * MMUTR bits, need shifting down. + */ +#define CF_PAGE_MMUTR_MASK 0x00000c00 +#define CF_PAGE_MMUTR_SHIFT 10 + +#define CF_PAGE_VALID (MMUTR_V << CF_PAGE_MMUTR_SHIFT) +#define CF_PAGE_SHARED (MMUTR_SG << CF_PAGE_MMUTR_SHIFT) + +/* + * Fake bits, not implemented in CF, will get masked out before + * hitting hardware. + */ +#define CF_PAGE_DIRTY 0x00000001 +#define CF_PAGE_FILE 0x00000200 +#define CF_PAGE_ACCESSED 0x00001000 + +#define _PAGE_CACHE040 0x020 /* 68040 cache mode, cachable, copyback */ +#define _PAGE_NOCACHE_S 0x040 /* 68040 no-cache mode, serialized */ +#define _PAGE_NOCACHE 0x060 /* 68040 cache mode, non-serialized */ +#define _PAGE_CACHE040W 0x000 /* 68040 cache mode, cachable, write-through */ +#define _DESCTYPE_MASK 0x003 +#define _CACHEMASK040 (~0x060) +#define _PAGE_GLOBAL040 0x400 /* 68040 global bit, used for kva descs */ + +/* + * Externally used page protection values. + */ +#define _PAGE_PRESENT (CF_PAGE_VALID) +#define _PAGE_ACCESSED (CF_PAGE_ACCESSED) +#define _PAGE_DIRTY (CF_PAGE_DIRTY) +#define _PAGE_READWRITE (CF_PAGE_READABLE \ + | CF_PAGE_WRITABLE \ + | CF_PAGE_SYSTEM \ + | CF_PAGE_SHARED) + +/* + * Compound page protection values. + */ +#define PAGE_NONE __pgprot(CF_PAGE_VALID \ + | CF_PAGE_ACCESSED) + +#define PAGE_SHARED __pgprot(CF_PAGE_VALID \ + | CF_PAGE_ACCESSED \ + | CF_PAGE_SHARED) + +#define PAGE_INIT __pgprot(CF_PAGE_VALID \ + | CF_PAGE_READABLE \ + | CF_PAGE_WRITABLE \ + | CF_PAGE_EXEC \ + | CF_PAGE_SYSTEM) + +#define PAGE_KERNEL __pgprot(CF_PAGE_VALID \ + | CF_PAGE_ACCESSED \ + | CF_PAGE_READABLE \ + | CF_PAGE_WRITABLE \ + | CF_PAGE_EXEC \ + | CF_PAGE_SYSTEM) + +#define PAGE_COPY __pgprot(CF_PAGE_VALID \ + | CF_PAGE_ACCESSED \ + | CF_PAGE_READABLE \ + | CF_PAGE_DIRTY) + +/* + * Page protections for initialising protection_map. See mm/mmap.c + * for use. In general, the bit positions are xwr, and P-items are + * private, the S-items are shared. + */ +#define __P000 PAGE_NONE +#define __P001 __pgprot(CF_PAGE_VALID \ + | CF_PAGE_ACCESSED \ + | CF_PAGE_READABLE) +#define __P010 __pgprot(CF_PAGE_VALID \ + | CF_PAGE_ACCESSED \ + | CF_PAGE_WRITABLE) +#define __P011 __pgprot(CF_PAGE_VALID \ + | CF_PAGE_ACCESSED \ + | CF_PAGE_READABLE \ + | CF_PAGE_WRITABLE) +#define __P100 __pgprot(CF_PAGE_VALID \ + | CF_PAGE_ACCESSED \ + | CF_PAGE_EXEC) +#define __P101 __pgprot(CF_PAGE_VALID \ + | CF_PAGE_ACCESSED \ + | CF_PAGE_READABLE \ + | CF_PAGE_EXEC) +#define __P110 __pgprot(CF_PAGE_VALID \ + | CF_PAGE_ACCESSED \ + | CF_PAGE_WRITABLE \ + | CF_PAGE_EXEC) +#define __P111 __pgprot(CF_PAGE_VALID \ + | CF_PAGE_ACCESSED \ + | CF_PAGE_READABLE \ + | CF_PAGE_WRITABLE \ + | CF_PAGE_EXEC) + +#define __S000 PAGE_NONE +#define __S001 __pgprot(CF_PAGE_VALID \ + | CF_PAGE_ACCESSED \ + | CF_PAGE_READABLE) +#define __S010 PAGE_SHARED +#define __S011 __pgprot(CF_PAGE_VALID \ + | CF_PAGE_ACCESSED \ + | CF_PAGE_SHARED \ + | CF_PAGE_READABLE) +#define __S100 __pgprot(CF_PAGE_VALID \ + | CF_PAGE_ACCESSED \ + | CF_PAGE_EXEC) +#define __S101 __pgprot(CF_PAGE_VALID \ + | CF_PAGE_ACCESSED \ + | CF_PAGE_READABLE \ + | CF_PAGE_EXEC) +#define __S110 __pgprot(CF_PAGE_VALID \ + | CF_PAGE_ACCESSED \ + | CF_PAGE_SHARED \ + | CF_PAGE_EXEC) +#define __S111 __pgprot(CF_PAGE_VALID \ + | CF_PAGE_ACCESSED \ + | CF_PAGE_SHARED \ + | CF_PAGE_READABLE \ + | CF_PAGE_EXEC) + +#define PTE_MASK PAGE_MASK +#define CF_PAGE_CHG_MASK (PTE_MASK | CF_PAGE_ACCESSED | CF_PAGE_DIRTY) + +#ifndef __ASSEMBLY__ + +/* + * Conversion functions: convert a page and protection to a page entry, + * and a page entry and page directory to the page they refer to. + */ +#define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot)) + +static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) +{ + pte_val(pte) = (pte_val(pte) & CF_PAGE_CHG_MASK) | pgprot_val(newprot); + return pte; +} + +#define pmd_set(pmdp, ptep) do {} while (0) + +static inline void pgd_set(pgd_t *pgdp, pmd_t *pmdp) +{ + pgd_val(*pgdp) = virt_to_phys(pmdp); +} + +#define __pte_page(pte) ((unsigned long) (pte_val(pte) & PAGE_MASK)) +#define __pmd_page(pmd) ((unsigned long) (pmd_val(pmd))) + +static inline int pte_none(pte_t pte) +{ + return !pte_val(pte); +} + +static inline int pte_present(pte_t pte) +{ + return pte_val(pte) & CF_PAGE_VALID; +} + +static inline void pte_clear(struct mm_struct *mm, unsigned long addr, + pte_t *ptep) +{ + pte_val(*ptep) = 0; +} + +#define pte_pagenr(pte) ((__pte_page(pte) - PAGE_OFFSET) >> PAGE_SHIFT) +#define pte_page(pte) virt_to_page(__pte_page(pte)) + +static inline int pmd_none2(pmd_t *pmd) { return !pmd_val(*pmd); } +#define pmd_none(pmd) pmd_none2(&(pmd)) +static inline int pmd_bad2(pmd_t *pmd) { return 0; } +#define pmd_bad(pmd) pmd_bad2(&(pmd)) +#define pmd_present(pmd) (!pmd_none2(&(pmd))) +static inline void pmd_clear(pmd_t *pmdp) { pmd_val(*pmdp) = 0; } + +static inline int pgd_none(pgd_t pgd) { return 0; } +static inline int pgd_bad(pgd_t pgd) { return 0; } +static inline int pgd_present(pgd_t pgd) { return 1; } +static inline void pgd_clear(pgd_t *pgdp) {} + +#define pte_ERROR(e) \ + printk(KERN_ERR "%s:%d: bad pte %08lx.\n", \ + __FILE__, __LINE__, pte_val(e)) +#define pmd_ERROR(e) \ + printk(KERN_ERR "%s:%d: bad pmd %08lx.\n", \ + __FILE__, __LINE__, pmd_val(e)) +#define pgd_ERROR(e) \ + printk(KERN_ERR "%s:%d: bad pgd %08lx.\n", \ + __FILE__, __LINE__, pgd_val(e)) + +/* + * The following only work if pte_present() is true. + * Undefined behaviour if not... + * [we have the full set here even if they don't change from m68k] + */ +static inline int pte_read(pte_t pte) +{ + return pte_val(pte) & CF_PAGE_READABLE; +} + +static inline int pte_write(pte_t pte) +{ + return pte_val(pte) & CF_PAGE_WRITABLE; +} + +static inline int pte_exec(pte_t pte) +{ + return pte_val(pte) & CF_PAGE_EXEC; +} + +static inline int pte_dirty(pte_t pte) +{ + return pte_val(pte) & CF_PAGE_DIRTY; +} + +static inline int pte_young(pte_t pte) +{ + return pte_val(pte) & CF_PAGE_ACCESSED; +} + +static inline int pte_file(pte_t pte) +{ + return pte_val(pte) & CF_PAGE_FILE; +} + +static inline int pte_special(pte_t pte) +{ + return 0; +} + +static inline pte_t pte_wrprotect(pte_t pte) +{ + pte_val(pte) &= ~CF_PAGE_WRITABLE; + return pte; +} + +static inline pte_t pte_rdprotect(pte_t pte) +{ + pte_val(pte) &= ~CF_PAGE_READABLE; + return pte; +} + +static inline pte_t pte_exprotect(pte_t pte) +{ + pte_val(pte) &= ~CF_PAGE_EXEC; + return pte; +} + +static inline pte_t pte_mkclean(pte_t pte) +{ + pte_val(pte) &= ~CF_PAGE_DIRTY; + return pte; +} + +static inline pte_t pte_mkold(pte_t pte) +{ + pte_val(pte) &= ~CF_PAGE_ACCESSED; + return pte; +} + +static inline pte_t pte_mkwrite(pte_t pte) +{ + pte_val(pte) |= CF_PAGE_WRITABLE; + return pte; +} + +static inline pte_t pte_mkread(pte_t pte) +{ + pte_val(pte) |= CF_PAGE_READABLE; + return pte; +} + +static inline pte_t pte_mkexec(pte_t pte) +{ + pte_val(pte) |= CF_PAGE_EXEC; + return pte; +} + +static inline pte_t pte_mkdirty(pte_t pte) +{ + pte_val(pte) |= CF_PAGE_DIRTY; + return pte; +} + +static inline pte_t pte_mkyoung(pte_t pte) +{ + pte_val(pte) |= CF_PAGE_ACCESSED; + return pte; +} + +static inline pte_t pte_mknocache(pte_t pte) +{ + pte_val(pte) |= 0x80 | (pte_val(pte) & ~0x40); + return pte; +} + +static inline pte_t pte_mkcache(pte_t pte) +{ + pte_val(pte) &= ~CF_PAGE_NOCACHE; + return pte; +} + +static inline pte_t pte_mkspecial(pte_t pte) +{ + return pte; +} + +#define swapper_pg_dir kernel_pg_dir +extern pgd_t kernel_pg_dir[PTRS_PER_PGD]; + +/* + * Find an entry in a pagetable directory. + */ +#define pgd_index(address) ((address) >> PGDIR_SHIFT) +#define pgd_offset(mm, address) ((mm)->pgd + pgd_index(address)) + +/* + * Find an entry in a kernel pagetable directory. + */ +#define pgd_offset_k(address) pgd_offset(&init_mm, address) + +/* + * Find an entry in the second-level pagetable. + */ +static inline pmd_t *pmd_offset(pgd_t *pgd, unsigned long address) +{ + return (pmd_t *) pgd; +} + +/* + * Find an entry in the third-level pagetable. + */ +#define __pte_offset(address) ((address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1)) +#define pte_offset_kernel(dir, address) \ + ((pte_t *) __pmd_page(*(dir)) + __pte_offset(address)) + +/* + * Disable caching for page at given kernel virtual address. + */ +static inline void nocache_page(void *vaddr) +{ + pgd_t *dir; + pmd_t *pmdp; + pte_t *ptep; + unsigned long addr = (unsigned long) vaddr; + + dir = pgd_offset_k(addr); + pmdp = pmd_offset(dir, addr); + ptep = pte_offset_kernel(pmdp, addr); + *ptep = pte_mknocache(*ptep); +} + +/* + * Enable caching for page at given kernel virtual address. + */ +static inline void cache_page(void *vaddr) +{ + pgd_t *dir; + pmd_t *pmdp; + pte_t *ptep; + unsigned long addr = (unsigned long) vaddr; + + dir = pgd_offset_k(addr); + pmdp = pmd_offset(dir, addr); + ptep = pte_offset_kernel(pmdp, addr); + *ptep = pte_mkcache(*ptep); +} + +#define PTE_FILE_MAX_BITS 21 +#define PTE_FILE_SHIFT 11 + +static inline unsigned long pte_to_pgoff(pte_t pte) +{ + return pte_val(pte) >> PTE_FILE_SHIFT; +} + +static inline pte_t pgoff_to_pte(unsigned pgoff) +{ + return __pte((pgoff << PTE_FILE_SHIFT) + CF_PAGE_FILE); +} + +/* + * Encode and de-code a swap entry (must be !pte_none(e) && !pte_present(e)) + */ +#define __swp_type(x) ((x).val & 0xFF) +#define __swp_offset(x) ((x).val >> PTE_FILE_SHIFT) +#define __swp_entry(typ, off) ((swp_entry_t) { (typ) | \ + (off << PTE_FILE_SHIFT) }) +#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) }) +#define __swp_entry_to_pte(x) (__pte((x).val)) + +#define pmd_page(pmd) (pfn_to_page(pmd_val(pmd) >> PAGE_SHIFT)) + +#define pte_offset_map(pmdp, addr) ((pte_t *)__pmd_page(*pmdp) + \ + __pte_offset(addr)) +#define pte_unmap(pte) ((void) 0) +#define pfn_pte(pfn, prot) __pte(((pfn) << PAGE_SHIFT) | pgprot_val(prot)) +#define pte_pfn(pte) (pte_val(pte) >> PAGE_SHIFT) + +#endif /* !__ASSEMBLY__ */ +#endif /* _MCF_PGTABLE_H */ From 813db7fc1550687d3e42e793a67b2322df5114a4 Mon Sep 17 00:00:00 2001 From: Greg Ungerer Date: Fri, 14 Oct 2011 16:21:31 +1000 Subject: [PATCH 32/56] m68k: add page table size definitions for ColdFire V4e MMU Define the page table size and attributes for the ColdFire V4e MMU. Also setup the vmalloc and kmap regions we will use. Signed-off-by: Greg Ungerer Acked-by: Geert Uytterhoeven Acked-by: Matt Waddel Acked-by: Kurt Mahan --- arch/m68k/include/asm/pgtable_mm.h | 30 ++++++++++++++++++++++++------ 1 file changed, 24 insertions(+), 6 deletions(-) diff --git a/arch/m68k/include/asm/pgtable_mm.h b/arch/m68k/include/asm/pgtable_mm.h index 87174c904d2b..dc35e0e106e4 100644 --- a/arch/m68k/include/asm/pgtable_mm.h +++ b/arch/m68k/include/asm/pgtable_mm.h @@ -40,6 +40,8 @@ /* PGDIR_SHIFT determines what a third-level page table entry can map */ #ifdef CONFIG_SUN3 #define PGDIR_SHIFT 17 +#elif defined(CONFIG_COLDFIRE) +#define PGDIR_SHIFT 22 #else #define PGDIR_SHIFT 25 #endif @@ -54,6 +56,10 @@ #define PTRS_PER_PTE 16 #define PTRS_PER_PMD 1 #define PTRS_PER_PGD 2048 +#elif defined(CONFIG_COLDFIRE) +#define PTRS_PER_PTE 512 +#define PTRS_PER_PMD 1 +#define PTRS_PER_PGD 1024 #else #define PTRS_PER_PTE 1024 #define PTRS_PER_PMD 8 @@ -66,12 +72,22 @@ #ifdef CONFIG_SUN3 #define KMAP_START 0x0DC00000 #define KMAP_END 0x0E000000 +#elif defined(CONFIG_COLDFIRE) +#define KMAP_START 0xe0000000 +#define KMAP_END 0xf0000000 #else #define KMAP_START 0xd0000000 #define KMAP_END 0xf0000000 #endif -#ifndef CONFIG_SUN3 +#ifdef CONFIG_SUN3 +extern unsigned long m68k_vmalloc_end; +#define VMALLOC_START 0x0f800000 +#define VMALLOC_END m68k_vmalloc_end +#elif defined(CONFIG_COLDFIRE) +#define VMALLOC_START 0xd0000000 +#define VMALLOC_END 0xe0000000 +#else /* Just any arbitrary offset to the start of the vmalloc VM area: the * current 8MB value just means that there will be a 8MB "hole" after the * physical memory until the kernel virtual memory starts. That means that @@ -82,11 +98,7 @@ #define VMALLOC_OFFSET (8*1024*1024) #define VMALLOC_START (((unsigned long) high_memory + VMALLOC_OFFSET) & ~(VMALLOC_OFFSET-1)) #define VMALLOC_END KMAP_START -#else -extern unsigned long m68k_vmalloc_end; -#define VMALLOC_START 0x0f800000 -#define VMALLOC_END m68k_vmalloc_end -#endif /* CONFIG_SUN3 */ +#endif /* zero page used for uninitialized stuff */ extern void *empty_zero_page; @@ -130,6 +142,8 @@ static inline void update_mmu_cache(struct vm_area_struct *vma, #ifdef CONFIG_SUN3 #include +#elif defined(CONFIG_COLDFIRE) +#include #else #include #endif @@ -138,6 +152,9 @@ static inline void update_mmu_cache(struct vm_area_struct *vma, /* * Macro to mark a page protection value as "uncacheable". */ +#ifdef CONFIG_COLDFIRE +# define pgprot_noncached(prot) (__pgprot(pgprot_val(prot) | CF_PAGE_NOCACHE)) +#else #ifdef SUN3_PAGE_NOCACHE # define __SUN3_PAGE_NOCACHE SUN3_PAGE_NOCACHE #else @@ -152,6 +169,7 @@ static inline void update_mmu_cache(struct vm_area_struct *vma, ? (__pgprot((pgprot_val(prot) & _CACHEMASK040) | _PAGE_NOCACHE_S)) \ : (prot))) +#endif /* CONFIG_COLDFIRE */ #include #endif /* !__ASSEMBLY__ */ From 78d705e3be4bfbd2e75157d284096d600ea6eda5 Mon Sep 17 00:00:00 2001 From: Greg Ungerer Date: Fri, 14 Oct 2011 16:43:15 +1000 Subject: [PATCH 33/56] m68k: add ColdFire paging exception handling code Add code to traps.c to handle MMU exceptions for the ColdFire. Most of this code is from the 2.6.25 kernel BSP code released by Freescale. Signed-off-by: Greg Ungerer Acked-by: Geert Uytterhoeven Acked-by: Matt Waddel Acked-by: Kurt Mahan --- arch/m68k/kernel/traps.c | 104 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 104 insertions(+) diff --git a/arch/m68k/kernel/traps.c b/arch/m68k/kernel/traps.c index 89362f2bb56a..a76452ca964e 100644 --- a/arch/m68k/kernel/traps.c +++ b/arch/m68k/kernel/traps.c @@ -706,6 +706,88 @@ static inline void bus_error030 (struct frame *fp) #endif /* CPU_M68020_OR_M68030 */ #endif /* !CONFIG_SUN3 */ +#if defined(CONFIG_COLDFIRE) && defined(CONFIG_MMU) +#include + +/* + * The following table converts the FS encoding of a ColdFire + * exception stack frame into the error_code value needed by + * do_fault. +*/ +static const unsigned char fs_err_code[] = { + 0, /* 0000 */ + 0, /* 0001 */ + 0, /* 0010 */ + 0, /* 0011 */ + 1, /* 0100 */ + 0, /* 0101 */ + 0, /* 0110 */ + 0, /* 0111 */ + 2, /* 1000 */ + 3, /* 1001 */ + 2, /* 1010 */ + 0, /* 1011 */ + 1, /* 1100 */ + 1, /* 1101 */ + 0, /* 1110 */ + 0 /* 1111 */ +}; + +static inline void access_errorcf(unsigned int fs, struct frame *fp) +{ + unsigned long mmusr, addr; + unsigned int err_code; + int need_page_fault; + + mmusr = mmu_read(MMUSR); + addr = mmu_read(MMUAR); + + /* + * error_code: + * bit 0 == 0 means no page found, 1 means protection fault + * bit 1 == 0 means read, 1 means write + */ + switch (fs) { + case 5: /* 0101 TLB opword X miss */ + need_page_fault = cf_tlb_miss(&fp->ptregs, 0, 0, 0); + addr = fp->ptregs.pc; + break; + case 6: /* 0110 TLB extension word X miss */ + need_page_fault = cf_tlb_miss(&fp->ptregs, 0, 0, 1); + addr = fp->ptregs.pc + sizeof(long); + break; + case 10: /* 1010 TLB W miss */ + need_page_fault = cf_tlb_miss(&fp->ptregs, 1, 1, 0); + break; + case 14: /* 1110 TLB R miss */ + need_page_fault = cf_tlb_miss(&fp->ptregs, 0, 1, 0); + break; + default: + /* 0000 Normal */ + /* 0001 Reserved */ + /* 0010 Interrupt during debug service routine */ + /* 0011 Reserved */ + /* 0100 X Protection */ + /* 0111 IFP in emulator mode */ + /* 1000 W Protection*/ + /* 1001 Write error*/ + /* 1011 Reserved*/ + /* 1100 R Protection*/ + /* 1101 R Protection*/ + /* 1111 OEP in emulator mode*/ + need_page_fault = 1; + break; + } + + if (need_page_fault) { + err_code = fs_err_code[fs]; + if ((fs == 13) && (mmusr & MMUSR_WF)) /* rd-mod-wr access */ + err_code |= 2; /* bit1 - write, bit0 - protection */ + do_page_fault(&fp->ptregs, addr, err_code); + } +} +#endif /* CONFIG_COLDFIRE CONFIG_MMU */ + asmlinkage void buserr_c(struct frame *fp) { /* Only set esp0 if coming from user mode */ @@ -716,6 +798,28 @@ asmlinkage void buserr_c(struct frame *fp) printk ("*** Bus Error *** Format is %x\n", fp->ptregs.format); #endif +#if defined(CONFIG_COLDFIRE) && defined(CONFIG_MMU) + if (CPU_IS_COLDFIRE) { + unsigned int fs; + fs = (fp->ptregs.vector & 0x3) | + ((fp->ptregs.vector & 0xc00) >> 8); + switch (fs) { + case 0x5: + case 0x6: + case 0x7: + case 0x9: + case 0xa: + case 0xd: + case 0xe: + case 0xf: + access_errorcf(fs, fp); + return; + default: + break; + } + } +#endif /* CONFIG_COLDFIRE && CONFIG_MMU */ + switch (fp->ptregs.format) { #if defined (CONFIG_M68060) case 4: /* 68060 access error */ From ae2eca724af2802739efe02b3fc56daa8b674eb9 Mon Sep 17 00:00:00 2001 From: Greg Ungerer Date: Mon, 17 Oct 2011 14:38:09 +1000 Subject: [PATCH 34/56] m68k: add cache support for V4e ColdFire cores running with MMU enabled Add code to deal with instruction, data and branch caches of the V4e ColdFire cores when they are running with the MMU enabled. This code is loosely based on Freescales changes for the caches of the V4e ColdFire in the 2.6.25 kernel BSP. That code was originally by Kurt Mahan (now ). Signed-off-by: Greg Ungerer Acked-by: Geert Uytterhoeven Acked-by: Matt Waddel Acked-by: Kurt Mahan --- arch/m68k/include/asm/cacheflush_mm.h | 88 +++++++++++++++++++++++++-- arch/m68k/mm/cache.c | 24 +++++++- 2 files changed, 104 insertions(+), 8 deletions(-) diff --git a/arch/m68k/include/asm/cacheflush_mm.h b/arch/m68k/include/asm/cacheflush_mm.h index 73de7c89d8e0..8104bd874649 100644 --- a/arch/m68k/include/asm/cacheflush_mm.h +++ b/arch/m68k/include/asm/cacheflush_mm.h @@ -2,23 +2,89 @@ #define _M68K_CACHEFLUSH_H #include +#ifdef CONFIG_COLDFIRE +#include +#endif /* cache code */ #define FLUSH_I_AND_D (0x00000808) #define FLUSH_I (0x00000008) +#ifndef ICACHE_MAX_ADDR +#define ICACHE_MAX_ADDR 0 +#define ICACHE_SET_MASK 0 +#define DCACHE_MAX_ADDR 0 +#define DCACHE_SETMASK 0 +#endif + +static inline void flush_cf_icache(unsigned long start, unsigned long end) +{ + unsigned long set; + + for (set = start; set <= end; set += (0x10 - 3)) { + __asm__ __volatile__ ( + "cpushl %%ic,(%0)\n\t" + "addq%.l #1,%0\n\t" + "cpushl %%ic,(%0)\n\t" + "addq%.l #1,%0\n\t" + "cpushl %%ic,(%0)\n\t" + "addq%.l #1,%0\n\t" + "cpushl %%ic,(%0)" + : "=a" (set) + : "a" (set)); + } +} + +static inline void flush_cf_dcache(unsigned long start, unsigned long end) +{ + unsigned long set; + + for (set = start; set <= end; set += (0x10 - 3)) { + __asm__ __volatile__ ( + "cpushl %%dc,(%0)\n\t" + "addq%.l #1,%0\n\t" + "cpushl %%dc,(%0)\n\t" + "addq%.l #1,%0\n\t" + "cpushl %%dc,(%0)\n\t" + "addq%.l #1,%0\n\t" + "cpushl %%dc,(%0)" + : "=a" (set) + : "a" (set)); + } +} + +static inline void flush_cf_bcache(unsigned long start, unsigned long end) +{ + unsigned long set; + + for (set = start; set <= end; set += (0x10 - 3)) { + __asm__ __volatile__ ( + "cpushl %%bc,(%0)\n\t" + "addq%.l #1,%0\n\t" + "cpushl %%bc,(%0)\n\t" + "addq%.l #1,%0\n\t" + "cpushl %%bc,(%0)\n\t" + "addq%.l #1,%0\n\t" + "cpushl %%bc,(%0)" + : "=a" (set) + : "a" (set)); + } +} + /* * Cache handling functions */ static inline void flush_icache(void) { - if (CPU_IS_040_OR_060) + if (CPU_IS_COLDFIRE) { + flush_cf_icache(0, ICACHE_MAX_ADDR); + } else if (CPU_IS_040_OR_060) { asm volatile ( "nop\n" " .chip 68040\n" " cpusha %bc\n" " .chip 68k"); - else { + } else { unsigned long tmp; asm volatile ( "movec %%cacr,%0\n" " or.w %1,%0\n" @@ -51,12 +117,14 @@ extern void cache_push_v(unsigned long vaddr, int len); process changes. */ #define __flush_cache_all() \ ({ \ - if (CPU_IS_040_OR_060) \ + if (CPU_IS_COLDFIRE) { \ + flush_cf_dcache(0, DCACHE_MAX_ADDR); \ + } else if (CPU_IS_040_OR_060) { \ __asm__ __volatile__("nop\n\t" \ ".chip 68040\n\t" \ "cpusha %dc\n\t" \ ".chip 68k"); \ - else { \ + } else { \ unsigned long _tmp; \ __asm__ __volatile__("movec %%cacr,%0\n\t" \ "orw %1,%0\n\t" \ @@ -112,7 +180,17 @@ static inline void flush_cache_page(struct vm_area_struct *vma, unsigned long vm /* RZ: use cpush %bc instead of cpush %dc, cinv %ic */ static inline void __flush_page_to_ram(void *vaddr) { - if (CPU_IS_040_OR_060) { + if (CPU_IS_COLDFIRE) { + unsigned long addr, start, end; + addr = ((unsigned long) vaddr) & ~(PAGE_SIZE - 1); + start = addr & ICACHE_SET_MASK; + end = (addr + PAGE_SIZE - 1) & ICACHE_SET_MASK; + if (start > end) { + flush_cf_bcache(0, end); + end = ICACHE_MAX_ADDR; + } + flush_cf_bcache(start, end); + } else if (CPU_IS_040_OR_060) { __asm__ __volatile__("nop\n\t" ".chip 68040\n\t" "cpushp %%bc,(%0)\n\t" diff --git a/arch/m68k/mm/cache.c b/arch/m68k/mm/cache.c index 5437fff5fe07..95d0bf66e2e2 100644 --- a/arch/m68k/mm/cache.c +++ b/arch/m68k/mm/cache.c @@ -74,8 +74,16 @@ static unsigned long virt_to_phys_slow(unsigned long vaddr) /* RZ: use cpush %bc instead of cpush %dc, cinv %ic */ void flush_icache_range(unsigned long address, unsigned long endaddr) { - - if (CPU_IS_040_OR_060) { + if (CPU_IS_COLDFIRE) { + unsigned long start, end; + start = address & ICACHE_SET_MASK; + end = endaddr & ICACHE_SET_MASK; + if (start > end) { + flush_cf_icache(0, end); + end = ICACHE_MAX_ADDR; + } + flush_cf_icache(start, end); + } else if (CPU_IS_040_OR_060) { address &= PAGE_MASK; do { @@ -100,7 +108,17 @@ EXPORT_SYMBOL(flush_icache_range); void flush_icache_user_range(struct vm_area_struct *vma, struct page *page, unsigned long addr, int len) { - if (CPU_IS_040_OR_060) { + if (CPU_IS_COLDFIRE) { + unsigned long start, end; + start = addr & ICACHE_SET_MASK; + end = (addr + len) & ICACHE_SET_MASK; + if (start > end) { + flush_cf_icache(0, end); + end = ICACHE_MAX_ADDR; + } + flush_cf_icache(start, end); + + } else if (CPU_IS_040_OR_060) { asm volatile ("nop\n\t" ".chip 68040\n\t" "cpushp %%bc,(%0)\n\t" From 0b0b808b50fd135c6bb22f773d216c3bcacb20d7 Mon Sep 17 00:00:00 2001 From: Greg Ungerer Date: Mon, 17 Oct 2011 14:56:45 +1000 Subject: [PATCH 35/56] m68k: modify ColdFire 54xx cache support for MMU enabled Modify the cache setup for the ColdFire 54xx parts when running with the MMU enabled. We want to map the peripheral register space (MBAR region) as non cacheable. And create an identity mapping for all of RAM for the kernel. Signed-off-by: Greg Ungerer Acked-by: Geert Uytterhoeven Acked-by: Matt Waddel Acked-by: Kurt Mahan --- arch/m68k/include/asm/m54xxacr.h | 32 +++++++++++++++++++++++++++++++- 1 file changed, 31 insertions(+), 1 deletion(-) diff --git a/arch/m68k/include/asm/m54xxacr.h b/arch/m68k/include/asm/m54xxacr.h index 16a1835f9b2a..47906aafbf67 100644 --- a/arch/m68k/include/asm/m54xxacr.h +++ b/arch/m68k/include/asm/m54xxacr.h @@ -39,8 +39,12 @@ #define ACR_CM_OFF_PRE 0x00000040 /* No cache, precise */ #define ACR_CM_OFF_IMP 0x00000060 /* No cache, imprecise */ #define ACR_CM 0x00000060 /* Cache mode mask */ +#define ACR_SP 0x00000008 /* Supervisor protect */ #define ACR_WPROTECT 0x00000004 /* Write protect */ +#define ACR_BA(x) ((x) & 0xff000000) +#define ACR_ADMSK(x) ((((x) - 1) & 0xff000000) >> 8) + #if defined(CONFIG_M5407) #define ICACHE_SIZE 0x4000 /* instruction - 16k */ @@ -56,6 +60,11 @@ #define CACHE_LINE_SIZE 0x0010 /* 16 bytes */ #define CACHE_WAYS 4 /* 4 ways */ +#define ICACHE_SET_MASK ((ICACHE_SIZE / 64 - 1) << CACHE_WAYS) +#define DCACHE_SET_MASK ((DCACHE_SIZE / 64 - 1) << CACHE_WAYS) +#define ICACHE_MAX_ADDR ICACHE_SET_MASK +#define DCACHE_MAX_ADDR DCACHE_SET_MASK + /* * Version 4 cores have a true harvard style separate instruction * and data cache. Enable data and instruction caches, also enable write @@ -73,6 +82,27 @@ #else #define CACHE_MODE (CACR_DEC+CACR_DESB+CACR_DDCM_P+CACR_BEC+CACR_IEC+CACR_EUSP) #endif +#define CACHE_INIT (CACR_DCINVA+CACR_BCINVA+CACR_ICINVA) + +#if defined(CONFIG_MMU) +/* + * If running with the MMU enabled then we need to map the internal + * register region as non-cacheable. And then we map all our RAM as + * cacheable and supervisor access only. + */ +#define ACR0_MODE (ACR_BA(CONFIG_MBAR)+ACR_ADMSK(0x1000000)+ \ + ACR_ENABLE+ACR_SUPER+ACR_CM_OFF_PRE+ACR_SP) +#define ACR1_MODE (ACR_BA(CONFIG_RAMBASE)+ACR_ADMSK(CONFIG_RAMSIZE)+ \ + ACR_ENABLE+ACR_SUPER+ACR_SP) +#define ACR2_MODE 0 +#define ACR3_MODE (ACR_BA(CONFIG_RAMBASE)+ACR_ADMSK(CONFIG_RAMSIZE)+ \ + ACR_ENABLE+ACR_SUPER+ACR_SP) + +#else + +/* + * For the non-MMU enabled case we map all of RAM as cacheable. + */ #if defined(CONFIG_CACHE_COPYBACK) #define DATA_CACHE_MODE (ACR_ENABLE+ACR_ANY+ACR_CM_CP) #else @@ -80,7 +110,6 @@ #endif #define INSN_CACHE_MODE (ACR_ENABLE+ACR_ANY) -#define CACHE_INIT (CACR_DCINVA+CACR_BCINVA+CACR_ICINVA) #define CACHE_INVALIDATE (CACHE_MODE+CACR_DCINVA+CACR_BCINVA+CACR_ICINVA) #define CACHE_INVALIDATEI (CACHE_MODE+CACR_BCINVA+CACR_ICINVA) #define CACHE_INVALIDATED (CACHE_MODE+CACR_DCINVA) @@ -94,4 +123,5 @@ #define CACHE_PUSH #endif +#endif /* CONFIG_MMU */ #endif /* m54xxacr_h */ From b852de4e7f7d6f4373901e3a880f6f29a65e7937 Mon Sep 17 00:00:00 2001 From: Greg Ungerer Date: Mon, 17 Oct 2011 15:09:44 +1000 Subject: [PATCH 36/56] m68k: add TLB flush support for the ColdFire V4e MMU hardware The ColdFire V4e MMU is unlike any of the other m68k MMU hardware. It needs its own TLB flush support code. Signed-off-by: Greg Ungerer Acked-by: Geert Uytterhoeven Acked-by: Matt Waddel Acked-by: Kurt Mahan --- arch/m68k/include/asm/tlbflush.h | 23 +++++++++++++++++------ 1 file changed, 17 insertions(+), 6 deletions(-) diff --git a/arch/m68k/include/asm/tlbflush.h b/arch/m68k/include/asm/tlbflush.h index a6b4ed4fc90f..965ea35c9a40 100644 --- a/arch/m68k/include/asm/tlbflush.h +++ b/arch/m68k/include/asm/tlbflush.h @@ -5,10 +5,13 @@ #ifndef CONFIG_SUN3 #include +#include static inline void flush_tlb_kernel_page(void *addr) { - if (CPU_IS_040_OR_060) { + if (CPU_IS_COLDFIRE) { + mmu_write(MMUOR, MMUOR_CNL); + } else if (CPU_IS_040_OR_060) { mm_segment_t old_fs = get_fs(); set_fs(KERNEL_DS); __asm__ __volatile__(".chip 68040\n\t" @@ -25,12 +28,15 @@ static inline void flush_tlb_kernel_page(void *addr) */ static inline void __flush_tlb(void) { - if (CPU_IS_040_OR_060) + if (CPU_IS_COLDFIRE) { + mmu_write(MMUOR, MMUOR_CNL); + } else if (CPU_IS_040_OR_060) { __asm__ __volatile__(".chip 68040\n\t" "pflushan\n\t" ".chip 68k"); - else if (CPU_IS_020_OR_030) + } else if (CPU_IS_020_OR_030) { __asm__ __volatile__("pflush #0,#4"); + } } static inline void __flush_tlb040_one(unsigned long addr) @@ -43,7 +49,9 @@ static inline void __flush_tlb040_one(unsigned long addr) static inline void __flush_tlb_one(unsigned long addr) { - if (CPU_IS_040_OR_060) + if (CPU_IS_COLDFIRE) + mmu_write(MMUOR, MMUOR_CNL); + else if (CPU_IS_040_OR_060) __flush_tlb040_one(addr); else if (CPU_IS_020_OR_030) __asm__ __volatile__("pflush #0,#4,(%0)" : : "a" (addr)); @@ -56,12 +64,15 @@ static inline void __flush_tlb_one(unsigned long addr) */ static inline void flush_tlb_all(void) { - if (CPU_IS_040_OR_060) + if (CPU_IS_COLDFIRE) { + mmu_write(MMUOR, MMUOR_CNL); + } else if (CPU_IS_040_OR_060) { __asm__ __volatile__(".chip 68040\n\t" "pflusha\n\t" ".chip 68k"); - else if (CPU_IS_020_OR_030) + } else if (CPU_IS_020_OR_030) { __asm__ __volatile__("pflusha"); + } } static inline void flush_tlb_mm(struct mm_struct *mm) From bfe4375a1a184c2145ef235e782660400b005882 Mon Sep 17 00:00:00 2001 From: Greg Ungerer Date: Tue, 15 Nov 2011 14:12:01 +1000 Subject: [PATCH 37/56] m68k: define PAGE_OFFSET_RAW for ColdFire CPU with MMU enabled The ColdFire CPU configurations need PAGE_OFFSET_RAW set to the base of their RAM. It doesn't matter if they are running with the MMU enabled or disabled, it is always set to the base of RAM. We can keep the choices simple here and key of CONFIG_RAMBASE. If it is defined we are on a plaftorm (ColdFire or other non-MMU systems) which have a configurable RAM base, just use it. Reported-by: Alexander Stein Signed-off-by: Greg Ungerer Acked-by: Matt Waddel Acked-by: Kurt Mahan Acked-by: Geert Uytterhoeven --- arch/m68k/include/asm/page_offset.h | 10 ++++------ 1 file changed, 4 insertions(+), 6 deletions(-) diff --git a/arch/m68k/include/asm/page_offset.h b/arch/m68k/include/asm/page_offset.h index 1780152d81da..82626a8f1d0a 100644 --- a/arch/m68k/include/asm/page_offset.h +++ b/arch/m68k/include/asm/page_offset.h @@ -1,11 +1,9 @@ /* This handles the memory map.. */ -#ifdef CONFIG_MMU -#ifndef CONFIG_SUN3 -#define PAGE_OFFSET_RAW 0x00000000 -#else +#if defined(CONFIG_RAMBASE) +#define PAGE_OFFSET_RAW CONFIG_RAMBASE +#elif defined(CONFIG_SUN3) #define PAGE_OFFSET_RAW 0x0E000000 -#endif #else -#define PAGE_OFFSET_RAW CONFIG_RAMBASE +#define PAGE_OFFSET_RAW 0x00000000 #endif From 9e95f7cdf5c3741ed00a298c0201d624833b4102 Mon Sep 17 00:00:00 2001 From: Greg Ungerer Date: Mon, 17 Oct 2011 17:26:11 +1000 Subject: [PATCH 38/56] m68k: set ColdFire MMU page size We use the ColdFire V4e MMU page size of 8KiB. Define PAGE_SHIFT appropriately. Signed-off-by: Greg Ungerer Acked-by: Geert Uytterhoeven Acked-by: Matt Waddel Acked-by: Kurt Mahan --- arch/m68k/include/asm/page.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/m68k/include/asm/page.h b/arch/m68k/include/asm/page.h index ba6c91d5f3a9..98baa82a8615 100644 --- a/arch/m68k/include/asm/page.h +++ b/arch/m68k/include/asm/page.h @@ -6,10 +6,10 @@ #include /* PAGE_SHIFT determines the page size */ -#ifndef CONFIG_SUN3 -#define PAGE_SHIFT (12) +#if defined(CONFIG_SUN3) || defined(CONFIG_COLDFIRE) +#define PAGE_SHIFT 13 #else -#define PAGE_SHIFT (13) +#define PAGE_SHIFT 12 #endif #define PAGE_SIZE (_AC(1, UL) << PAGE_SHIFT) #define PAGE_MASK (~(PAGE_SIZE-1)) From 33d4bcca603c9174c0ee0e312fd3c6da03ff9e15 Mon Sep 17 00:00:00 2001 From: Greg Ungerer Date: Fri, 28 Oct 2011 16:59:50 +1000 Subject: [PATCH 39/56] m68k: MMU enabled ColdFire needs 8k ELF alignment Like the SUN3 hardware MMU the ColdFire MMU uses 8k pages. So we want our ELF page size alingment to also be 8k. Modify the ELF alignment setting. Signed-off-by: Greg Ungerer Acked-by: Geert Uytterhoeven Acked-by: Matt Waddel Acked-by: Kurt Mahan --- arch/m68k/include/asm/elf.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/m68k/include/asm/elf.h b/arch/m68k/include/asm/elf.h index 01c193d91412..e9b7cda59744 100644 --- a/arch/m68k/include/asm/elf.h +++ b/arch/m68k/include/asm/elf.h @@ -59,10 +59,10 @@ typedef struct user_m68kfp_struct elf_fpregset_t; is actually used on ASV. */ #define ELF_PLAT_INIT(_r, load_addr) _r->a1 = 0 -#ifndef CONFIG_SUN3 -#define ELF_EXEC_PAGESIZE 4096 -#else +#if defined(CONFIG_SUN3) || defined(CONFIG_COLDFIRE) #define ELF_EXEC_PAGESIZE 8192 +#else +#define ELF_EXEC_PAGESIZE 4096 #endif /* This is the location that an ET_DYN program is loaded if exec'ed. Typical From 83b73d6cb8301df32d9887c16c83490c4fd1f55f Mon Sep 17 00:00:00 2001 From: Greg Ungerer Date: Tue, 18 Oct 2011 15:07:29 +1000 Subject: [PATCH 40/56] m68k: ColdFire V4e MMU context support code Add code to manage the context's of the ColdFire V4e MMU. This code is mostly taken from the Freescale 2.6.35 kernel BSP for MMU enabled ColdFire. Signed-off-by: Greg Ungerer Acked-by: Geert Uytterhoeven Acked-by: Matt Waddel Acked-by: Kurt Mahan --- arch/m68k/include/asm/atomic.h | 10 ++ arch/m68k/include/asm/mmu_context.h | 250 ++++++++++++++++++++++------ 2 files changed, 211 insertions(+), 49 deletions(-) diff --git a/arch/m68k/include/asm/atomic.h b/arch/m68k/include/asm/atomic.h index 65c6be6c8180..4eba796c00d4 100644 --- a/arch/m68k/include/asm/atomic.h +++ b/arch/m68k/include/asm/atomic.h @@ -55,6 +55,16 @@ static inline int atomic_dec_and_test(atomic_t *v) return c != 0; } +static inline int atomic_dec_and_test_lt(atomic_t *v) +{ + char c; + __asm__ __volatile__( + "subql #1,%1; slt %0" + : "=d" (c), "=m" (*v) + : "m" (*v)); + return c != 0; +} + static inline int atomic_inc_and_test(atomic_t *v) { char c; diff --git a/arch/m68k/include/asm/mmu_context.h b/arch/m68k/include/asm/mmu_context.h index 7d4341e55a99..dc3be991d634 100644 --- a/arch/m68k/include/asm/mmu_context.h +++ b/arch/m68k/include/asm/mmu_context.h @@ -8,7 +8,206 @@ static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk) } #ifdef CONFIG_MMU -#ifndef CONFIG_SUN3 + +#if defined(CONFIG_COLDFIRE) + +#include +#include +#include +#include + +#define NO_CONTEXT 256 +#define LAST_CONTEXT 255 +#define FIRST_CONTEXT 1 + +extern unsigned long context_map[]; +extern mm_context_t next_mmu_context; + +extern atomic_t nr_free_contexts; +extern struct mm_struct *context_mm[LAST_CONTEXT+1]; +extern void steal_context(void); + +static inline void get_mmu_context(struct mm_struct *mm) +{ + mm_context_t ctx; + + if (mm->context != NO_CONTEXT) + return; + while (atomic_dec_and_test_lt(&nr_free_contexts)) { + atomic_inc(&nr_free_contexts); + steal_context(); + } + ctx = next_mmu_context; + while (test_and_set_bit(ctx, context_map)) { + ctx = find_next_zero_bit(context_map, LAST_CONTEXT+1, ctx); + if (ctx > LAST_CONTEXT) + ctx = 0; + } + next_mmu_context = (ctx + 1) & LAST_CONTEXT; + mm->context = ctx; + context_mm[ctx] = mm; +} + +/* + * Set up the context for a new address space. + */ +#define init_new_context(tsk, mm) (((mm)->context = NO_CONTEXT), 0) + +/* + * We're finished using the context for an address space. + */ +static inline void destroy_context(struct mm_struct *mm) +{ + if (mm->context != NO_CONTEXT) { + clear_bit(mm->context, context_map); + mm->context = NO_CONTEXT; + atomic_inc(&nr_free_contexts); + } +} + +static inline void set_context(mm_context_t context, pgd_t *pgd) +{ + __asm__ __volatile__ ("movec %0,%%asid" : : "d" (context)); +} + +static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next, + struct task_struct *tsk) +{ + get_mmu_context(tsk->mm); + set_context(tsk->mm->context, next->pgd); +} + +/* + * After we have set current->mm to a new value, this activates + * the context for the new mm so we see the new mappings. + */ +static inline void activate_mm(struct mm_struct *active_mm, + struct mm_struct *mm) +{ + get_mmu_context(mm); + set_context(mm->context, mm->pgd); +} + +#define deactivate_mm(tsk, mm) do { } while (0) + +extern void mmu_context_init(void); +#define prepare_arch_switch(next) load_ksp_mmu(next) + +static inline void load_ksp_mmu(struct task_struct *task) +{ + unsigned long flags; + struct mm_struct *mm; + int asid; + pgd_t *pgd; + pmd_t *pmd; + pte_t *pte; + unsigned long mmuar; + + local_irq_save(flags); + mmuar = task->thread.ksp; + + /* Search for a valid TLB entry, if one is found, don't remap */ + mmu_write(MMUAR, mmuar); + mmu_write(MMUOR, MMUOR_STLB | MMUOR_ADR); + if (mmu_read(MMUSR) & MMUSR_HIT) + goto end; + + if (mmuar >= PAGE_OFFSET) { + mm = &init_mm; + } else { + pr_info("load_ksp_mmu: non-kernel mm found: 0x%p\n", task->mm); + mm = task->mm; + } + + if (!mm) + goto bug; + + pgd = pgd_offset(mm, mmuar); + if (pgd_none(*pgd)) + goto bug; + + pmd = pmd_offset(pgd, mmuar); + if (pmd_none(*pmd)) + goto bug; + + pte = (mmuar >= PAGE_OFFSET) ? pte_offset_kernel(pmd, mmuar) + : pte_offset_map(pmd, mmuar); + if (pte_none(*pte) || !pte_present(*pte)) + goto bug; + + set_pte(pte, pte_mkyoung(*pte)); + asid = mm->context & 0xff; + if (!pte_dirty(*pte) && mmuar <= PAGE_OFFSET) + set_pte(pte, pte_wrprotect(*pte)); + + mmu_write(MMUTR, (mmuar & PAGE_MASK) | (asid << MMUTR_IDN) | + (((int)(pte->pte) & (int)CF_PAGE_MMUTR_MASK) + >> CF_PAGE_MMUTR_SHIFT) | MMUTR_V); + + mmu_write(MMUDR, (pte_val(*pte) & PAGE_MASK) | + ((pte->pte) & CF_PAGE_MMUDR_MASK) | MMUDR_SZ_8KB | MMUDR_X); + + mmu_write(MMUOR, MMUOR_ACC | MMUOR_UAA); + + goto end; + +bug: + pr_info("ksp load failed: mm=0x%p ksp=0x08%lx\n", mm, mmuar); +end: + local_irq_restore(flags); +} + +#elif defined(CONFIG_SUN3) +#include +#include + +extern unsigned long get_free_context(struct mm_struct *mm); +extern void clear_context(unsigned long context); + +/* set the context for a new task to unmapped */ +static inline int init_new_context(struct task_struct *tsk, + struct mm_struct *mm) +{ + mm->context = SUN3_INVALID_CONTEXT; + return 0; +} + +/* find the context given to this process, and if it hasn't already + got one, go get one for it. */ +static inline void get_mmu_context(struct mm_struct *mm) +{ + if (mm->context == SUN3_INVALID_CONTEXT) + mm->context = get_free_context(mm); +} + +/* flush context if allocated... */ +static inline void destroy_context(struct mm_struct *mm) +{ + if (mm->context != SUN3_INVALID_CONTEXT) + clear_context(mm->context); +} + +static inline void activate_context(struct mm_struct *mm) +{ + get_mmu_context(mm); + sun3_put_context(mm->context); +} + +static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next, + struct task_struct *tsk) +{ + activate_context(tsk->mm); +} + +#define deactivate_mm(tsk, mm) do { } while (0) + +static inline void activate_mm(struct mm_struct *prev_mm, + struct mm_struct *next_mm) +{ + activate_context(next_mm); +} + +#else #include #include @@ -103,55 +302,8 @@ static inline void activate_mm(struct mm_struct *prev_mm, switch_mm_0460(next_mm); } -#else /* CONFIG_SUN3 */ -#include -#include - -extern unsigned long get_free_context(struct mm_struct *mm); -extern void clear_context(unsigned long context); - -/* set the context for a new task to unmapped */ -static inline int init_new_context(struct task_struct *tsk, struct mm_struct *mm) -{ - mm->context = SUN3_INVALID_CONTEXT; - return 0; -} - -/* find the context given to this process, and if it hasn't already - got one, go get one for it. */ -static inline void get_mmu_context(struct mm_struct *mm) -{ - if(mm->context == SUN3_INVALID_CONTEXT) - mm->context = get_free_context(mm); -} - -/* flush context if allocated... */ -static inline void destroy_context(struct mm_struct *mm) -{ - if(mm->context != SUN3_INVALID_CONTEXT) - clear_context(mm->context); -} - -static inline void activate_context(struct mm_struct *mm) -{ - get_mmu_context(mm); - sun3_put_context(mm->context); -} - -static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next, struct task_struct *tsk) -{ - activate_context(tsk->mm); -} - -#define deactivate_mm(tsk,mm) do { } while (0) - -static inline void activate_mm(struct mm_struct *prev_mm, - struct mm_struct *next_mm) -{ - activate_context(next_mm); -} - #endif + #else /* !CONFIG_MMU */ static inline int init_new_context(struct task_struct *tsk, struct mm_struct *mm) From 8b38f3c9233c44dcb5ac1c35d4de065e30faccb4 Mon Sep 17 00:00:00 2001 From: Greg Ungerer Date: Tue, 18 Oct 2011 15:41:26 +1000 Subject: [PATCH 41/56] m68k: use tracehook_report_syscall_entry/exit for ColdFire MMU ptrace path The existing ColdFire code (which is all non-mmu) for system call entry and exit uses the more modern tracehook_report_syscall_entry()/exit() into the ptrace code. Now that we are supporting ColdFire with MMU we need the same hooks for these. Signed-off-by: Greg Ungerer Acked-by: Geert Uytterhoeven Acked-by: Matt Waddel Acked-by: Kurt Mahan --- arch/m68k/kernel/ptrace_mm.c | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/arch/m68k/kernel/ptrace_mm.c b/arch/m68k/kernel/ptrace_mm.c index 0b252683cefb..7bc999b73529 100644 --- a/arch/m68k/kernel/ptrace_mm.c +++ b/arch/m68k/kernel/ptrace_mm.c @@ -18,6 +18,7 @@ #include #include #include +#include #include #include @@ -275,3 +276,20 @@ asmlinkage void syscall_trace(void) current->exit_code = 0; } } + +#ifdef CONFIG_COLDFIRE +asmlinkage int syscall_trace_enter(void) +{ + int ret = 0; + + if (test_thread_flag(TIF_SYSCALL_TRACE)) + ret = tracehook_report_syscall_entry(task_pt_regs(current)); + return ret; +} + +asmlinkage void syscall_trace_leave(void) +{ + if (test_thread_flag(TIF_SYSCALL_TRACE)) + tracehook_report_syscall_exit(task_pt_regs(current), 0); +} +#endif /* CONFIG_COLDFIRE */ From 60610192559d430dd24d9b508ae9d8d249709af9 Mon Sep 17 00:00:00 2001 From: Greg Ungerer Date: Tue, 18 Oct 2011 16:07:25 +1000 Subject: [PATCH 42/56] m68k: modify cache push and clear code for ColdFire with MMU enable The cache push and clear code only need to flush the branch cache on the write-through cache setup of the ColdFire V4e with MMU enabled. Signed-off-by: Greg Ungerer Acked-by: Geert Uytterhoeven Acked-by: Matt Waddel Acked-by: Kurt Mahan --- arch/m68k/mm/memory.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/arch/m68k/mm/memory.c b/arch/m68k/mm/memory.c index 34c77ce24fba..a5dbb74fe1de 100644 --- a/arch/m68k/mm/memory.c +++ b/arch/m68k/mm/memory.c @@ -203,7 +203,9 @@ static inline void pushcl040(unsigned long paddr) void cache_clear (unsigned long paddr, int len) { - if (CPU_IS_040_OR_060) { + if (CPU_IS_COLDFIRE) { + flush_cf_bcache(0, DCACHE_MAX_ADDR); + } else if (CPU_IS_040_OR_060) { int tmp; /* @@ -250,7 +252,9 @@ EXPORT_SYMBOL(cache_clear); void cache_push (unsigned long paddr, int len) { - if (CPU_IS_040_OR_060) { + if (CPU_IS_COLDFIRE) { + flush_cf_bcache(0, DCACHE_MAX_ADDR); + } else if (CPU_IS_040_OR_060) { int tmp = PAGE_SIZE; /* From d49316e84bbad307543c50be53555ca9a768f31d Mon Sep 17 00:00:00 2001 From: Greg Ungerer Date: Tue, 18 Oct 2011 16:16:43 +1000 Subject: [PATCH 43/56] m68k: use ColdFire MMU read/write bit flags when ioremapping The ColdFire MMU has separate read and write bits, unlike the Motorola m68k MMU which has a single read-only bit. Define a _PAGE_READWRITE value for the Motorola MMU, which is 0, so we can unconditionaly include that in the page table entry bits when setting up ioremapped pages. Signed-off-by: Greg Ungerer Acked-by: Matt Waddel Acked-by: Kurt Mahan Acked-by: Geert Uytterhoeven --- arch/m68k/include/asm/motorola_pgtable.h | 1 + arch/m68k/mm/kmap.c | 3 ++- 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/arch/m68k/include/asm/motorola_pgtable.h b/arch/m68k/include/asm/motorola_pgtable.h index 45bd3f589bf0..e0fdd4d08075 100644 --- a/arch/m68k/include/asm/motorola_pgtable.h +++ b/arch/m68k/include/asm/motorola_pgtable.h @@ -8,6 +8,7 @@ #define _PAGE_PRESENT 0x001 #define _PAGE_SHORT 0x002 #define _PAGE_RONLY 0x004 +#define _PAGE_READWRITE 0x000 #define _PAGE_ACCESSED 0x008 #define _PAGE_DIRTY 0x010 #define _PAGE_SUPER 0x080 /* 68040 supervisor only */ diff --git a/arch/m68k/mm/kmap.c b/arch/m68k/mm/kmap.c index 69345849454b..1cc2bed4c3dd 100644 --- a/arch/m68k/mm/kmap.c +++ b/arch/m68k/mm/kmap.c @@ -171,7 +171,8 @@ void __iomem *__ioremap(unsigned long physaddr, unsigned long size, int cachefla break; } } else { - physaddr |= (_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_DIRTY); + physaddr |= (_PAGE_PRESENT | _PAGE_ACCESSED | + _PAGE_DIRTY | _PAGE_READWRITE); switch (cacheflag) { case IOMAP_NOCACHE_SER: case IOMAP_NOCACHE_NONSER: From 066bf87b5c1b87f2eba7880b125f88e4f67e1c16 Mon Sep 17 00:00:00 2001 From: Greg Ungerer Date: Tue, 18 Oct 2011 16:24:19 +1000 Subject: [PATCH 44/56] m68k: ColdFire V4e MMU paging init code and miss handler The different ColdFire V4e MMU requires its own dedicated paging init code, and a TLB miss handler for its software driven TLB. Signed-off-by: Greg Ungerer Acked-by: Geert Uytterhoeven Acked-by: Matt Waddel Acked-by: Kurt Mahan --- arch/m68k/include/asm/mcfmmu.h | 2 + arch/m68k/mm/mcfmmu.c | 198 +++++++++++++++++++++++++++++++++ 2 files changed, 200 insertions(+) create mode 100644 arch/m68k/mm/mcfmmu.c diff --git a/arch/m68k/include/asm/mcfmmu.h b/arch/m68k/include/asm/mcfmmu.h index 8fdcfedd5d15..26cc3d5a63f8 100644 --- a/arch/m68k/include/asm/mcfmmu.h +++ b/arch/m68k/include/asm/mcfmmu.h @@ -105,6 +105,8 @@ static inline void mmu_write(u32 a, u32 v) __asm__ __volatile__ ("nop"); } +int cf_tlb_miss(struct pt_regs *regs, int write, int dtlb, int extension_word); + #endif #endif /* MCFMMU_H */ diff --git a/arch/m68k/mm/mcfmmu.c b/arch/m68k/mm/mcfmmu.c new file mode 100644 index 000000000000..babd5a97cdcb --- /dev/null +++ b/arch/m68k/mm/mcfmmu.c @@ -0,0 +1,198 @@ +/* + * Based upon linux/arch/m68k/mm/sun3mmu.c + * Based upon linux/arch/ppc/mm/mmu_context.c + * + * Implementations of mm routines specific to the Coldfire MMU. + * + * Copyright (c) 2008 Freescale Semiconductor, Inc. + */ + +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include + +#define KMAPAREA(x) ((x >= VMALLOC_START) && (x < KMAP_END)) + +mm_context_t next_mmu_context; +unsigned long context_map[LAST_CONTEXT / BITS_PER_LONG + 1]; +atomic_t nr_free_contexts; +struct mm_struct *context_mm[LAST_CONTEXT+1]; +extern unsigned long num_pages; + +void free_initmem(void) +{ +} + +/* + * ColdFire paging_init derived from sun3. + */ +void __init paging_init(void) +{ + pgd_t *pg_dir; + pte_t *pg_table; + unsigned long address, size; + unsigned long next_pgtable, bootmem_end; + unsigned long zones_size[MAX_NR_ZONES]; + enum zone_type zone; + int i; + + empty_zero_page = (void *) alloc_bootmem_pages(PAGE_SIZE); + memset((void *) empty_zero_page, 0, PAGE_SIZE); + + pg_dir = swapper_pg_dir; + memset(swapper_pg_dir, 0, sizeof(swapper_pg_dir)); + + size = num_pages * sizeof(pte_t); + size = (size + PAGE_SIZE) & ~(PAGE_SIZE-1); + next_pgtable = (unsigned long) alloc_bootmem_pages(size); + + bootmem_end = (next_pgtable + size + PAGE_SIZE) & PAGE_MASK; + pg_dir += PAGE_OFFSET >> PGDIR_SHIFT; + + address = PAGE_OFFSET; + while (address < (unsigned long)high_memory) { + pg_table = (pte_t *) next_pgtable; + next_pgtable += PTRS_PER_PTE * sizeof(pte_t); + pgd_val(*pg_dir) = (unsigned long) pg_table; + pg_dir++; + + /* now change pg_table to kernel virtual addresses */ + for (i = 0; i < PTRS_PER_PTE; ++i, ++pg_table) { + pte_t pte = pfn_pte(virt_to_pfn(address), PAGE_INIT); + if (address >= (unsigned long) high_memory) + pte_val(pte) = 0; + + set_pte(pg_table, pte); + address += PAGE_SIZE; + } + } + + current->mm = NULL; + + for (zone = 0; zone < MAX_NR_ZONES; zone++) + zones_size[zone] = 0x0; + zones_size[ZONE_DMA] = num_pages; + free_area_init(zones_size); +} + +int cf_tlb_miss(struct pt_regs *regs, int write, int dtlb, int extension_word) +{ + unsigned long flags, mmuar; + struct mm_struct *mm; + pgd_t *pgd; + pmd_t *pmd; + pte_t *pte; + int asid; + + local_irq_save(flags); + + mmuar = (dtlb) ? mmu_read(MMUAR) : + regs->pc + (extension_word * sizeof(long)); + + mm = (!user_mode(regs) && KMAPAREA(mmuar)) ? &init_mm : current->mm; + if (!mm) { + local_irq_restore(flags); + return -1; + } + + pgd = pgd_offset(mm, mmuar); + if (pgd_none(*pgd)) { + local_irq_restore(flags); + return -1; + } + + pmd = pmd_offset(pgd, mmuar); + if (pmd_none(*pmd)) { + local_irq_restore(flags); + return -1; + } + + pte = (KMAPAREA(mmuar)) ? pte_offset_kernel(pmd, mmuar) + : pte_offset_map(pmd, mmuar); + if (pte_none(*pte) || !pte_present(*pte)) { + local_irq_restore(flags); + return -1; + } + + if (write) { + if (!pte_write(*pte)) { + local_irq_restore(flags); + return -1; + } + set_pte(pte, pte_mkdirty(*pte)); + } + + set_pte(pte, pte_mkyoung(*pte)); + asid = mm->context & 0xff; + if (!pte_dirty(*pte) && !KMAPAREA(mmuar)) + set_pte(pte, pte_wrprotect(*pte)); + + mmu_write(MMUTR, (mmuar & PAGE_MASK) | (asid << MMUTR_IDN) | + (((int)(pte->pte) & (int)CF_PAGE_MMUTR_MASK) + >> CF_PAGE_MMUTR_SHIFT) | MMUTR_V); + + mmu_write(MMUDR, (pte_val(*pte) & PAGE_MASK) | + ((pte->pte) & CF_PAGE_MMUDR_MASK) | MMUDR_SZ_8KB | MMUDR_X); + + if (dtlb) + mmu_write(MMUOR, MMUOR_ACC | MMUOR_UAA); + else + mmu_write(MMUOR, MMUOR_ITLB | MMUOR_ACC | MMUOR_UAA); + + local_irq_restore(flags); + return 0; +} + +/* + * Initialize the context management stuff. + * The following was taken from arch/ppc/mmu_context.c + */ +void __init mmu_context_init(void) +{ + /* + * Some processors have too few contexts to reserve one for + * init_mm, and require using context 0 for a normal task. + * Other processors reserve the use of context zero for the kernel. + * This code assumes FIRST_CONTEXT < 32. + */ + context_map[0] = (1 << FIRST_CONTEXT) - 1; + next_mmu_context = FIRST_CONTEXT; + atomic_set(&nr_free_contexts, LAST_CONTEXT - FIRST_CONTEXT + 1); +} + +/* + * Steal a context from a task that has one at the moment. + * This is only used on 8xx and 4xx and we presently assume that + * they don't do SMP. If they do then thicfpgalloc.hs will have to check + * whether the MM we steal is in use. + * We also assume that this is only used on systems that don't + * use an MMU hash table - this is true for 8xx and 4xx. + * This isn't an LRU system, it just frees up each context in + * turn (sort-of pseudo-random replacement :). This would be the + * place to implement an LRU scheme if anyone was motivated to do it. + * -- paulus + */ +void steal_context(void) +{ + struct mm_struct *mm; + /* + * free up context `next_mmu_context' + * if we shouldn't free context 0, don't... + */ + if (next_mmu_context < FIRST_CONTEXT) + next_mmu_context = FIRST_CONTEXT; + mm = context_mm[next_mmu_context]; + flush_tlb_mm(mm); + destroy_context(mm); +} + From 0e6782c880e921106de645554939a5a714d8c865 Mon Sep 17 00:00:00 2001 From: Greg Ungerer Date: Tue, 18 Oct 2011 16:26:11 +1000 Subject: [PATCH 45/56] m68k: compile appropriate mm arch files for ColdFire MMU support Create a config symbol to enable when using a ColdFire MMU. We then use that to only compile the necessary arch mm files. Signed-off-by: Greg Ungerer Acked-by: Geert Uytterhoeven Acked-by: Matt Waddel Acked-by: Kurt Mahan --- arch/m68k/Kconfig | 5 ++++- arch/m68k/mm/Makefile | 8 +++++--- 2 files changed, 9 insertions(+), 4 deletions(-) diff --git a/arch/m68k/Kconfig b/arch/m68k/Kconfig index 5f860cf67afc..330eb88108e7 100644 --- a/arch/m68k/Kconfig +++ b/arch/m68k/Kconfig @@ -88,9 +88,12 @@ config MMU config MMU_MOTOROLA bool +config MMU_COLDFIRE + bool + config MMU_SUN3 bool - depends on MMU && !MMU_MOTOROLA + depends on MMU && !MMU_MOTOROLA && !MMU_COLDFIRE menu "Platform setup" diff --git a/arch/m68k/mm/Makefile b/arch/m68k/mm/Makefile index 09cadf1058d5..cfbf3205724a 100644 --- a/arch/m68k/mm/Makefile +++ b/arch/m68k/mm/Makefile @@ -4,6 +4,8 @@ obj-y := init.o -obj-$(CONFIG_MMU) += cache.o fault.o hwtest.o -obj-$(CONFIG_MMU_MOTOROLA) += kmap.o memory.o motorola.o -obj-$(CONFIG_MMU_SUN3) += sun3kmap.o sun3mmu.o +obj-$(CONFIG_MMU) += cache.o fault.o +obj-$(CONFIG_MMU_MOTOROLA) += kmap.o memory.o motorola.o hwtest.o +obj-$(CONFIG_MMU_SUN3) += sun3kmap.o sun3mmu.o hwtest.o +obj-$(CONFIG_MMU_COLDFIRE) += kmap.o memory.o mcfmmu.o + From 74d4799221d0f5c5997a8b9817fe1ec76de0a666 Mon Sep 17 00:00:00 2001 From: Greg Ungerer Date: Tue, 18 Oct 2011 16:52:41 +1000 Subject: [PATCH 46/56] m68k: create ColdFire MMU pgalloc code Add code to support the ColdFire V4e MMU pgalloc functions. Signed-off-by: Greg Ungerer Acked-by: Geert Uytterhoeven Acked-by: Matt Waddel Acked-by: Kurt Mahan --- arch/m68k/include/asm/mcf_pgalloc.h | 102 ++++++++++++++++++++++++++++ arch/m68k/include/asm/pgalloc.h | 4 +- 2 files changed, 105 insertions(+), 1 deletion(-) create mode 100644 arch/m68k/include/asm/mcf_pgalloc.h diff --git a/arch/m68k/include/asm/mcf_pgalloc.h b/arch/m68k/include/asm/mcf_pgalloc.h new file mode 100644 index 000000000000..313f3dd23cdc --- /dev/null +++ b/arch/m68k/include/asm/mcf_pgalloc.h @@ -0,0 +1,102 @@ +#ifndef M68K_MCF_PGALLOC_H +#define M68K_MCF_PGALLOC_H + +#include +#include + +extern inline void pte_free_kernel(struct mm_struct *mm, pte_t *pte) +{ + free_page((unsigned long) pte); +} + +extern const char bad_pmd_string[]; + +extern inline pte_t *pte_alloc_one_kernel(struct mm_struct *mm, + unsigned long address) +{ + unsigned long page = __get_free_page(GFP_DMA|__GFP_REPEAT); + + if (!page) + return NULL; + + memset((void *)page, 0, PAGE_SIZE); + return (pte_t *) (page); +} + +extern inline pmd_t *pmd_alloc_kernel(pgd_t *pgd, unsigned long address) +{ + return (pmd_t *) pgd; +} + +#define pmd_alloc_one_fast(mm, address) ({ BUG(); ((pmd_t *)1); }) +#define pmd_alloc_one(mm, address) ({ BUG(); ((pmd_t *)2); }) + +#define pte_alloc_one_fast(mm, addr) pte_alloc_one(mm, addr) + +#define pmd_populate(mm, pmd, page) (pmd_val(*pmd) = \ + (unsigned long)(page_address(page))) + +#define pmd_populate_kernel(mm, pmd, pte) (pmd_val(*pmd) = (unsigned long)(pte)) + +#define pmd_pgtable(pmd) pmd_page(pmd) + +static inline void __pte_free_tlb(struct mmu_gather *tlb, pgtable_t page, + unsigned long address) +{ + __free_page(page); +} + +#define __pmd_free_tlb(tlb, pmd, address) do { } while (0) + +static inline struct page *pte_alloc_one(struct mm_struct *mm, + unsigned long address) +{ + struct page *page = alloc_pages(GFP_DMA|__GFP_REPEAT, 0); + pte_t *pte; + + if (!page) + return NULL; + + pte = kmap(page); + if (pte) { + clear_page(pte); + __flush_page_to_ram(pte); + flush_tlb_kernel_page(pte); + nocache_page(pte); + } + kunmap(page); + + return page; +} + +extern inline void pte_free(struct mm_struct *mm, struct page *page) +{ + __free_page(page); +} + +/* + * In our implementation, each pgd entry contains 1 pmd that is never allocated + * or freed. pgd_present is always 1, so this should never be called. -NL + */ +#define pmd_free(mm, pmd) BUG() + +static inline void pgd_free(struct mm_struct *mm, pgd_t *pgd) +{ + free_page((unsigned long) pgd); +} + +static inline pgd_t *pgd_alloc(struct mm_struct *mm) +{ + pgd_t *new_pgd; + + new_pgd = (pgd_t *)__get_free_page(GFP_DMA | __GFP_NOWARN); + if (!new_pgd) + return NULL; + memcpy(new_pgd, swapper_pg_dir, PAGE_SIZE); + memset(new_pgd, 0, PAGE_OFFSET >> PGDIR_SHIFT); + return new_pgd; +} + +#define pgd_populate(mm, pmd, pte) BUG() + +#endif /* M68K_MCF_PGALLOC_H */ diff --git a/arch/m68k/include/asm/pgalloc.h b/arch/m68k/include/asm/pgalloc.h index c294aad8a900..37bee7e3223d 100644 --- a/arch/m68k/include/asm/pgalloc.h +++ b/arch/m68k/include/asm/pgalloc.h @@ -7,7 +7,9 @@ #ifdef CONFIG_MMU #include -#ifdef CONFIG_SUN3 +#if defined(CONFIG_COLDFIRE) +#include +#elif defined(CONFIG_SUN3) #include #else #include From ef6aa00dc8e6eece53ac140ecd6183d331cf3173 Mon Sep 17 00:00:00 2001 From: Greg Ungerer Date: Tue, 18 Oct 2011 16:55:35 +1000 Subject: [PATCH 47/56] m68k: use non-MMU entry.S code when compiling for ColdFire CPU No matter whether we are configured for non-MMU or MMU enabled if we are compiling for ColdFire CPU we always use the entry_no.S code. Signed-off-by: Greg Ungerer Acked-by: Geert Uytterhoeven Acked-by: Matt Waddel Acked-by: Kurt Mahan --- arch/m68k/kernel/entry.S | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/m68k/kernel/entry.S b/arch/m68k/kernel/entry.S index 081cf96f243b..b8daf64e347d 100644 --- a/arch/m68k/kernel/entry.S +++ b/arch/m68k/kernel/entry.S @@ -1,4 +1,4 @@ -#ifdef CONFIG_MMU +#if defined(CONFIG_MMU) && !defined(CONFIG_COLDFIRE) #include "entry_mm.S" #else #include "entry_no.S" From 3731454033432abd37e1a6701eb0f1d73a47d680 Mon Sep 17 00:00:00 2001 From: Greg Ungerer Date: Wed, 19 Oct 2011 11:50:34 +1000 Subject: [PATCH 48/56] m68k: add code to setup a ColdFire 54xx platform when MMU enabled We use the same setup code for ColdFire MMU enabled platforms as standard m68k. So add support for it to setup our 54xx ColdFire platforms. They do not support the same bootinfo parsing as other m68k platforms. Signed-off-by: Greg Ungerer Acked-by: Geert Uytterhoeven Acked-by: Matt Waddel Acked-by: Kurt Mahan --- arch/m68k/kernel/setup_mm.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/arch/m68k/kernel/setup_mm.c b/arch/m68k/kernel/setup_mm.c index 52e17d1e6138..b3938adeabea 100644 --- a/arch/m68k/kernel/setup_mm.c +++ b/arch/m68k/kernel/setup_mm.c @@ -221,7 +221,8 @@ void __init setup_arch(char **cmdline_p) #endif /* The bootinfo is located right after the kernel bss */ - m68k_parse_bootinfo((const struct bi_record *)_end); + if (!CPU_IS_COLDFIRE) + m68k_parse_bootinfo((const struct bi_record *)_end); if (CPU_IS_040) m68k_is040or060 = 4; @@ -326,6 +327,11 @@ void __init setup_arch(char **cmdline_p) case MACH_SUN3X: config_sun3x(); break; +#endif +#ifdef CONFIG_COLDFIRE + case MACH_M54XX: + config_BSP(NULL, 0); + break; #endif default: panic("No configuration setup"); From 4a13c6dc6443786b135c9e9b3f9dc87421cc1ae3 Mon Sep 17 00:00:00 2001 From: Greg Ungerer Date: Wed, 19 Oct 2011 13:24:24 +1000 Subject: [PATCH 49/56] m68k: ColdFire with MMU enabled uses same clocking code as non-MMU We want to use the same timer support code for ColdFire CPU's when running with MMU enabled or not. So use the same time_no.c code even when the MMU is enabled for ColdFire. This also means we do not want CONFIG_ARCH_USES_GETTIMEOFFSET set, since that code is only in time_mm.c. Signed-off-by: Greg Ungerer Acked-by: Matt Waddel Acked-by: Kurt Mahan Acked-by: Geert Uytterhoeven --- arch/m68k/Kconfig | 2 +- arch/m68k/kernel/time.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/m68k/Kconfig b/arch/m68k/Kconfig index 330eb88108e7..81fdaa72c540 100644 --- a/arch/m68k/Kconfig +++ b/arch/m68k/Kconfig @@ -48,7 +48,7 @@ config TIME_LOW_RES default y config ARCH_USES_GETTIMEOFFSET - def_bool MMU + def_bool MMU && !COLDFIRE config NO_IOPORT def_bool y diff --git a/arch/m68k/kernel/time.c b/arch/m68k/kernel/time.c index a5cf40c26de5..75ab79b3bdeb 100644 --- a/arch/m68k/kernel/time.c +++ b/arch/m68k/kernel/time.c @@ -1,4 +1,4 @@ -#ifdef CONFIG_MMU +#if defined(CONFIG_MMU) && !defined(CONFIG_COLDFIRE) #include "time_mm.c" #else #include "time_no.c" From ed865e31a8273be200db9ddcdb6b844e48777abd Mon Sep 17 00:00:00 2001 From: Greg Ungerer Date: Wed, 19 Oct 2011 13:50:35 +1000 Subject: [PATCH 50/56] m68k: use non-MMU linker script for ColdFire MMU builds Use the non-MMU linker script for ColdFire builds when we are building for MMU enabled. The image layout is correct for loading on existing ColdFire dev boards. The only addition required to the current non-MMU linker script is to add support for the fixup section. Signed-off-by: Greg Ungerer Acked-by: Geert Uytterhoeven Acked-by: Matt Waddel Acked-by: Kurt Mahan --- arch/m68k/kernel/vmlinux-nommu.lds | 8 ++++++++ arch/m68k/kernel/vmlinux.lds.S | 2 +- 2 files changed, 9 insertions(+), 1 deletion(-) diff --git a/arch/m68k/kernel/vmlinux-nommu.lds b/arch/m68k/kernel/vmlinux-nommu.lds index 4e2389340837..8e66ccb0935e 100644 --- a/arch/m68k/kernel/vmlinux-nommu.lds +++ b/arch/m68k/kernel/vmlinux-nommu.lds @@ -69,6 +69,7 @@ SECTIONS { SCHED_TEXT LOCK_TEXT *(.text..lock) + *(.fixup) . = ALIGN(16); /* Exception table */ __start___ex_table = .; @@ -161,6 +162,13 @@ SECTIONS { _edata = . ; } > DATA + .m68k_fixup : { + __start_fixup = .; + *(.m68k_fixup) + __stop_fixup = .; + } > DATA + NOTES > DATA + .init.text : { . = ALIGN(PAGE_SIZE); __init_begin = .; diff --git a/arch/m68k/kernel/vmlinux.lds.S b/arch/m68k/kernel/vmlinux.lds.S index 3d99a04f2394..69ec79638870 100644 --- a/arch/m68k/kernel/vmlinux.lds.S +++ b/arch/m68k/kernel/vmlinux.lds.S @@ -1,4 +1,4 @@ -#ifdef CONFIG_MMU +#if defined(CONFIG_MMU) && !defined(CONFIG_COLDFIRE) PHDRS { text PT_LOAD FILEHDR PHDRS FLAGS (7); From e9fcffa49376b37518baf71a47adc15e74b2434c Mon Sep 17 00:00:00 2001 From: Greg Ungerer Date: Wed, 19 Oct 2011 13:58:55 +1000 Subject: [PATCH 51/56] m68k: adjustments to stack frame for ColdFire with MMU enabled The exception return stack adjustment required by ColdFire when running with the MMU enabled is not completely identical to 680x0 processors. Specifically the format type 4 stack frame doesn't need any stack adjustment on exception return. And the ColdFire always must return with a frame type of 4, not 0. Signed-off-by: Greg Ungerer Acked-by: Geert Uytterhoeven Acked-by: Matt Waddel Acked-by: Kurt Mahan --- arch/m68k/kernel/signal_mm.c | 17 +++++++++++++++-- 1 file changed, 15 insertions(+), 2 deletions(-) diff --git a/arch/m68k/kernel/signal_mm.c b/arch/m68k/kernel/signal_mm.c index a0afc239304e..5f6b3d0fcd16 100644 --- a/arch/m68k/kernel/signal_mm.c +++ b/arch/m68k/kernel/signal_mm.c @@ -56,7 +56,11 @@ static const int frame_extra_sizes[16] = { [1] = -1, /* sizeof(((struct frame *)0)->un.fmt1), */ [2] = sizeof(((struct frame *)0)->un.fmt2), [3] = sizeof(((struct frame *)0)->un.fmt3), +#ifdef CONFIG_COLDFIRE + [4] = 0, +#else [4] = sizeof(((struct frame *)0)->un.fmt4), +#endif [5] = -1, /* sizeof(((struct frame *)0)->un.fmt5), */ [6] = -1, /* sizeof(((struct frame *)0)->un.fmt6), */ [7] = sizeof(((struct frame *)0)->un.fmt7), @@ -84,7 +88,11 @@ int handle_kernel_fault(struct pt_regs *regs) regs->stkadj = frame_extra_sizes[regs->format]; tregs = (struct pt_regs *)((long)regs + regs->stkadj); tregs->vector = regs->vector; +#ifdef CONFIG_COLDFIRE + tregs->format = 4; +#else tregs->format = 0; +#endif tregs->pc = fixup->fixup; tregs->sr = regs->sr; @@ -336,8 +344,12 @@ static int mangle_kernel_stack(struct pt_regs *regs, int formatvec, regs->format = formatvec >> 12; regs->vector = formatvec & 0xfff; #define frame_offset (sizeof(struct pt_regs)+sizeof(struct switch_stack)) - __asm__ __volatile__ - (" movel %0,%/a0\n\t" + __asm__ __volatile__ ( +#ifdef CONFIG_COLDFIRE + " movel %0,%/sp\n\t" + " bra ret_from_signal\n" +#else + " movel %0,%/a0\n\t" " subl %1,%/a0\n\t" /* make room on stack */ " movel %/a0,%/sp\n\t" /* set stack pointer */ /* move switch_stack and pt_regs */ @@ -350,6 +362,7 @@ static int mangle_kernel_stack(struct pt_regs *regs, int formatvec, "2: movel %4@+,%/a0@+\n\t" " dbra %1,2b\n\t" " bral ret_from_signal\n" +#endif : /* no outputs, it doesn't ever return */ : "a" (sw), "d" (fsize), "d" (frame_offset/4-1), "n" (frame_offset), "a" (buf + fsize/4) From 0a2796da1182a7dcfba41f796f45986237bc1688 Mon Sep 17 00:00:00 2001 From: Greg Ungerer Date: Wed, 19 Oct 2011 14:10:03 +1000 Subject: [PATCH 52/56] m68k: add ColdFire FPU support for the V4e ColdFire CPUs The V4e ColdFire CPU family also has an integrated FPU (as well as the MMU). So add code to support this hardware along side the existing m68k FPU code. The ColdFire FPU is of course different to all previous 68k FP units. It is close in operation to the 68060, but not completely compatible. The biggest issue to deal with is that the ColdFire FPU multi-move instructions are different. It does not support multi-moving the FP control registers, and the multi-move of the FP data registers uses a different instruction mnemonic. Signed-off-by: Greg Ungerer Acked-by: Matt Waddel Acked-by: Kurt Mahan --- arch/m68k/include/asm/fpu.h | 2 + arch/m68k/kernel/process_mm.c | 59 ++++++++--- arch/m68k/kernel/setup_mm.c | 2 +- arch/m68k/kernel/signal_mm.c | 187 ++++++++++++++++++++++++---------- 4 files changed, 184 insertions(+), 66 deletions(-) diff --git a/arch/m68k/include/asm/fpu.h b/arch/m68k/include/asm/fpu.h index ffb6b8cfc6d5..526db9da9e43 100644 --- a/arch/m68k/include/asm/fpu.h +++ b/arch/m68k/include/asm/fpu.h @@ -12,6 +12,8 @@ #define FPSTATESIZE (96) #elif defined(CONFIG_M68KFPU_EMU) #define FPSTATESIZE (28) +#elif defined(CONFIG_COLDFIRE) && defined(CONFIG_MMU) +#define FPSTATESIZE (16) #elif defined(CONFIG_M68060) #define FPSTATESIZE (12) #else diff --git a/arch/m68k/kernel/process_mm.c b/arch/m68k/kernel/process_mm.c index 58a3253f3eb9..125f34e00bf0 100644 --- a/arch/m68k/kernel/process_mm.c +++ b/arch/m68k/kernel/process_mm.c @@ -172,9 +172,7 @@ void flush_thread(void) current->thread.fs = __USER_DS; if (!FPU_IS_EMU) - asm volatile (".chip 68k/68881\n\t" - "frestore %0@\n\t" - ".chip 68k" : : "a" (&zero)); + asm volatile ("frestore %0@" : : "a" (&zero) : "memory"); } /* @@ -248,11 +246,28 @@ int copy_thread(unsigned long clone_flags, unsigned long usp, /* Copy the current fpu state */ asm volatile ("fsave %0" : : "m" (p->thread.fpstate[0]) : "memory"); - if (!CPU_IS_060 ? p->thread.fpstate[0] : p->thread.fpstate[2]) - asm volatile ("fmovemx %/fp0-%/fp7,%0\n\t" - "fmoveml %/fpiar/%/fpcr/%/fpsr,%1" - : : "m" (p->thread.fp[0]), "m" (p->thread.fpcntl[0]) - : "memory"); + if (!CPU_IS_060 ? p->thread.fpstate[0] : p->thread.fpstate[2]) { + if (CPU_IS_COLDFIRE) { + asm volatile ("fmovemd %/fp0-%/fp7,%0\n\t" + "fmovel %/fpiar,%1\n\t" + "fmovel %/fpcr,%2\n\t" + "fmovel %/fpsr,%3" + : + : "m" (p->thread.fp[0]), + "m" (p->thread.fpcntl[0]), + "m" (p->thread.fpcntl[1]), + "m" (p->thread.fpcntl[2]) + : "memory"); + } else { + asm volatile ("fmovemx %/fp0-%/fp7,%0\n\t" + "fmoveml %/fpiar/%/fpcr/%/fpsr,%1" + : + : "m" (p->thread.fp[0]), + "m" (p->thread.fpcntl[0]) + : "memory"); + } + } + /* Restore the state in case the fpu was busy */ asm volatile ("frestore %0" : : "m" (p->thread.fpstate[0])); } @@ -285,12 +300,28 @@ int dump_fpu (struct pt_regs *regs, struct user_m68kfp_struct *fpu) if (!CPU_IS_060 ? !fpustate[0] : !fpustate[2]) return 0; - asm volatile ("fmovem %/fpiar/%/fpcr/%/fpsr,%0" - :: "m" (fpu->fpcntl[0]) - : "memory"); - asm volatile ("fmovemx %/fp0-%/fp7,%0" - :: "m" (fpu->fpregs[0]) - : "memory"); + if (CPU_IS_COLDFIRE) { + asm volatile ("fmovel %/fpiar,%0\n\t" + "fmovel %/fpcr,%1\n\t" + "fmovel %/fpsr,%2\n\t" + "fmovemd %/fp0-%/fp7,%3" + : + : "m" (fpu->fpcntl[0]), + "m" (fpu->fpcntl[1]), + "m" (fpu->fpcntl[2]), + "m" (fpu->fpregs[0]) + : "memory"); + } else { + asm volatile ("fmovem %/fpiar/%/fpcr/%/fpsr,%0" + : + : "m" (fpu->fpcntl[0]) + : "memory"); + asm volatile ("fmovemx %/fp0-%/fp7,%0" + : + : "m" (fpu->fpregs[0]) + : "memory"); + } + return 1; } EXPORT_SYMBOL(dump_fpu); diff --git a/arch/m68k/kernel/setup_mm.c b/arch/m68k/kernel/setup_mm.c index b3938adeabea..d872ce4807c9 100644 --- a/arch/m68k/kernel/setup_mm.c +++ b/arch/m68k/kernel/setup_mm.c @@ -236,7 +236,7 @@ void __init setup_arch(char **cmdline_p) * with them, we should add a test to check_bugs() below] */ #ifndef CONFIG_M68KFPU_EMU_ONLY /* clear the fpu if we have one */ - if (m68k_fputype & (FPU_68881|FPU_68882|FPU_68040|FPU_68060)) { + if (m68k_fputype & (FPU_68881|FPU_68882|FPU_68040|FPU_68060|FPU_COLDFIRE)) { volatile int zero = 0; asm volatile ("frestore %0" : : "m" (zero)); } diff --git a/arch/m68k/kernel/signal_mm.c b/arch/m68k/kernel/signal_mm.c index 5f6b3d0fcd16..cb856f9da655 100644 --- a/arch/m68k/kernel/signal_mm.c +++ b/arch/m68k/kernel/signal_mm.c @@ -203,7 +203,8 @@ static inline int restore_fpu_state(struct sigcontext *sc) if (CPU_IS_060 ? sc->sc_fpstate[2] : sc->sc_fpstate[0]) { /* Verify the frame format. */ - if (!CPU_IS_060 && (sc->sc_fpstate[0] != fpu_version)) + if (!(CPU_IS_060 || CPU_IS_COLDFIRE) && + (sc->sc_fpstate[0] != fpu_version)) goto out; if (CPU_IS_020_OR_030) { if (m68k_fputype & FPU_68881 && @@ -222,19 +223,43 @@ static inline int restore_fpu_state(struct sigcontext *sc) sc->sc_fpstate[3] == 0x60 || sc->sc_fpstate[3] == 0xe0)) goto out; + } else if (CPU_IS_COLDFIRE) { + if (!(sc->sc_fpstate[0] == 0x00 || + sc->sc_fpstate[0] == 0x05 || + sc->sc_fpstate[0] == 0xe5)) + goto out; } else goto out; - __asm__ volatile (".chip 68k/68881\n\t" - "fmovemx %0,%%fp0-%%fp1\n\t" - "fmoveml %1,%%fpcr/%%fpsr/%%fpiar\n\t" - ".chip 68k" - : /* no outputs */ - : "m" (*sc->sc_fpregs), "m" (*sc->sc_fpcntl)); + if (CPU_IS_COLDFIRE) { + __asm__ volatile ("fmovemd %0,%%fp0-%%fp1\n\t" + "fmovel %1,%%fpcr\n\t" + "fmovel %2,%%fpsr\n\t" + "fmovel %3,%%fpiar" + : /* no outputs */ + : "m" (sc->sc_fpregs[0]), + "m" (sc->sc_fpcntl[0]), + "m" (sc->sc_fpcntl[1]), + "m" (sc->sc_fpcntl[2])); + } else { + __asm__ volatile (".chip 68k/68881\n\t" + "fmovemx %0,%%fp0-%%fp1\n\t" + "fmoveml %1,%%fpcr/%%fpsr/%%fpiar\n\t" + ".chip 68k" + : /* no outputs */ + : "m" (*sc->sc_fpregs), + "m" (*sc->sc_fpcntl)); + } + } + + if (CPU_IS_COLDFIRE) { + __asm__ volatile ("frestore %0" : : "m" (*sc->sc_fpstate)); + } else { + __asm__ volatile (".chip 68k/68881\n\t" + "frestore %0\n\t" + ".chip 68k" + : : "m" (*sc->sc_fpstate)); } - __asm__ volatile (".chip 68k/68881\n\t" - "frestore %0\n\t" - ".chip 68k" : : "m" (*sc->sc_fpstate)); err = 0; out: @@ -249,7 +274,7 @@ static inline int restore_fpu_state(struct sigcontext *sc) static inline int rt_restore_fpu_state(struct ucontext __user *uc) { unsigned char fpstate[FPCONTEXT_SIZE]; - int context_size = CPU_IS_060 ? 8 : 0; + int context_size = CPU_IS_060 ? 8 : (CPU_IS_COLDFIRE ? 12 : 0); fpregset_t fpregs; int err = 1; @@ -268,10 +293,11 @@ static inline int rt_restore_fpu_state(struct ucontext __user *uc) if (__get_user(*(long *)fpstate, (long __user *)&uc->uc_fpstate)) goto out; if (CPU_IS_060 ? fpstate[2] : fpstate[0]) { - if (!CPU_IS_060) + if (!(CPU_IS_060 || CPU_IS_COLDFIRE)) context_size = fpstate[1]; /* Verify the frame format. */ - if (!CPU_IS_060 && (fpstate[0] != fpu_version)) + if (!(CPU_IS_060 || CPU_IS_COLDFIRE) && + (fpstate[0] != fpu_version)) goto out; if (CPU_IS_020_OR_030) { if (m68k_fputype & FPU_68881 && @@ -290,26 +316,50 @@ static inline int rt_restore_fpu_state(struct ucontext __user *uc) fpstate[3] == 0x60 || fpstate[3] == 0xe0)) goto out; + } else if (CPU_IS_COLDFIRE) { + if (!(fpstate[3] == 0x00 || + fpstate[3] == 0x05 || + fpstate[3] == 0xe5)) + goto out; } else goto out; if (__copy_from_user(&fpregs, &uc->uc_mcontext.fpregs, sizeof(fpregs))) goto out; - __asm__ volatile (".chip 68k/68881\n\t" - "fmovemx %0,%%fp0-%%fp7\n\t" - "fmoveml %1,%%fpcr/%%fpsr/%%fpiar\n\t" - ".chip 68k" - : /* no outputs */ - : "m" (*fpregs.f_fpregs), - "m" (*fpregs.f_fpcntl)); + + if (CPU_IS_COLDFIRE) { + __asm__ volatile ("fmovemd %0,%%fp0-%%fp7\n\t" + "fmovel %1,%%fpcr\n\t" + "fmovel %2,%%fpsr\n\t" + "fmovel %3,%%fpiar" + : /* no outputs */ + : "m" (fpregs.f_fpregs[0]), + "m" (fpregs.f_fpcntl[0]), + "m" (fpregs.f_fpcntl[1]), + "m" (fpregs.f_fpcntl[2])); + } else { + __asm__ volatile (".chip 68k/68881\n\t" + "fmovemx %0,%%fp0-%%fp7\n\t" + "fmoveml %1,%%fpcr/%%fpsr/%%fpiar\n\t" + ".chip 68k" + : /* no outputs */ + : "m" (*fpregs.f_fpregs), + "m" (*fpregs.f_fpcntl)); + } } if (context_size && __copy_from_user(fpstate + 4, (long __user *)&uc->uc_fpstate + 1, context_size)) goto out; - __asm__ volatile (".chip 68k/68881\n\t" - "frestore %0\n\t" - ".chip 68k" : : "m" (*fpstate)); + + if (CPU_IS_COLDFIRE) { + __asm__ volatile ("frestore %0" : : "m" (*fpstate)); + } else { + __asm__ volatile (".chip 68k/68881\n\t" + "frestore %0\n\t" + ".chip 68k" + : : "m" (*fpstate)); + } err = 0; out: @@ -529,10 +579,15 @@ static inline void save_fpu_state(struct sigcontext *sc, struct pt_regs *regs) return; } - __asm__ volatile (".chip 68k/68881\n\t" - "fsave %0\n\t" - ".chip 68k" - : : "m" (*sc->sc_fpstate) : "memory"); + if (CPU_IS_COLDFIRE) { + __asm__ volatile ("fsave %0" + : : "m" (*sc->sc_fpstate) : "memory"); + } else { + __asm__ volatile (".chip 68k/68881\n\t" + "fsave %0\n\t" + ".chip 68k" + : : "m" (*sc->sc_fpstate) : "memory"); + } if (CPU_IS_060 ? sc->sc_fpstate[2] : sc->sc_fpstate[0]) { fpu_version = sc->sc_fpstate[0]; @@ -543,21 +598,35 @@ static inline void save_fpu_state(struct sigcontext *sc, struct pt_regs *regs) if (*(unsigned short *) sc->sc_fpstate == 0x1f38) sc->sc_fpstate[0x38] |= 1 << 3; } - __asm__ volatile (".chip 68k/68881\n\t" - "fmovemx %%fp0-%%fp1,%0\n\t" - "fmoveml %%fpcr/%%fpsr/%%fpiar,%1\n\t" - ".chip 68k" - : "=m" (*sc->sc_fpregs), - "=m" (*sc->sc_fpcntl) - : /* no inputs */ - : "memory"); + + if (CPU_IS_COLDFIRE) { + __asm__ volatile ("fmovemd %%fp0-%%fp1,%0\n\t" + "fmovel %%fpcr,%1\n\t" + "fmovel %%fpsr,%2\n\t" + "fmovel %%fpiar,%3" + : "=m" (sc->sc_fpregs[0]), + "=m" (sc->sc_fpcntl[0]), + "=m" (sc->sc_fpcntl[1]), + "=m" (sc->sc_fpcntl[2]) + : /* no inputs */ + : "memory"); + } else { + __asm__ volatile (".chip 68k/68881\n\t" + "fmovemx %%fp0-%%fp1,%0\n\t" + "fmoveml %%fpcr/%%fpsr/%%fpiar,%1\n\t" + ".chip 68k" + : "=m" (*sc->sc_fpregs), + "=m" (*sc->sc_fpcntl) + : /* no inputs */ + : "memory"); + } } } static inline int rt_save_fpu_state(struct ucontext __user *uc, struct pt_regs *regs) { unsigned char fpstate[FPCONTEXT_SIZE]; - int context_size = CPU_IS_060 ? 8 : 0; + int context_size = CPU_IS_060 ? 8 : (CPU_IS_COLDFIRE ? 12 : 0); int err = 0; if (FPU_IS_EMU) { @@ -570,15 +639,19 @@ static inline int rt_save_fpu_state(struct ucontext __user *uc, struct pt_regs * return err; } - __asm__ volatile (".chip 68k/68881\n\t" - "fsave %0\n\t" - ".chip 68k" - : : "m" (*fpstate) : "memory"); + if (CPU_IS_COLDFIRE) { + __asm__ volatile ("fsave %0" : : "m" (*fpstate) : "memory"); + } else { + __asm__ volatile (".chip 68k/68881\n\t" + "fsave %0\n\t" + ".chip 68k" + : : "m" (*fpstate) : "memory"); + } err |= __put_user(*(long *)fpstate, (long __user *)&uc->uc_fpstate); if (CPU_IS_060 ? fpstate[2] : fpstate[0]) { fpregset_t fpregs; - if (!CPU_IS_060) + if (!(CPU_IS_060 || CPU_IS_COLDFIRE)) context_size = fpstate[1]; fpu_version = fpstate[0]; if (CPU_IS_020_OR_030 && @@ -588,14 +661,27 @@ static inline int rt_save_fpu_state(struct ucontext __user *uc, struct pt_regs * if (*(unsigned short *) fpstate == 0x1f38) fpstate[0x38] |= 1 << 3; } - __asm__ volatile (".chip 68k/68881\n\t" - "fmovemx %%fp0-%%fp7,%0\n\t" - "fmoveml %%fpcr/%%fpsr/%%fpiar,%1\n\t" - ".chip 68k" - : "=m" (*fpregs.f_fpregs), - "=m" (*fpregs.f_fpcntl) - : /* no inputs */ - : "memory"); + if (CPU_IS_COLDFIRE) { + __asm__ volatile ("fmovemd %%fp0-%%fp7,%0\n\t" + "fmovel %%fpcr,%1\n\t" + "fmovel %%fpsr,%2\n\t" + "fmovel %%fpiar,%3" + : "=m" (fpregs.f_fpregs[0]), + "=m" (fpregs.f_fpcntl[0]), + "=m" (fpregs.f_fpcntl[1]), + "=m" (fpregs.f_fpcntl[2]) + : /* no inputs */ + : "memory"); + } else { + __asm__ volatile (".chip 68k/68881\n\t" + "fmovemx %%fp0-%%fp7,%0\n\t" + "fmoveml %%fpcr/%%fpsr/%%fpiar,%1\n\t" + ".chip 68k" + : "=m" (*fpregs.f_fpregs), + "=m" (*fpregs.f_fpcntl) + : /* no inputs */ + : "memory"); + } err |= copy_to_user(&uc->uc_mcontext.fpregs, &fpregs, sizeof(fpregs)); } @@ -692,8 +778,7 @@ static inline void push_cache (unsigned long vaddr) "cpushl %%bc,(%0)\n\t" ".chip 68k" : : "a" (temp)); - } - else { + } else if (!CPU_IS_COLDFIRE) { /* * 68030/68020 have no writeback cache; * still need to clear icache. From 3f0060b0e8db431cf2c76b9a94774f0efd9ab956 Mon Sep 17 00:00:00 2001 From: Greg Ungerer Date: Wed, 19 Oct 2011 16:15:08 +1000 Subject: [PATCH 53/56] m68k: do not use m68k startup or interrupt code for ColdFire CPUs The ColdFire CPUs have their own startup and interrupt code (in the platform/coldfire directory), and do not use the general m68k startup and interrupt code. In fact the use of the arch/m68k/kernel/head.o is not about CONFIG_MMU or not, it is really about the machine type we are compiling for. Modify the selection and use of head.o to be based on the machine type. Only select the local ints.o and vectors.o code if we are using the classic 68k CPU types (that use the conventional Morotola MMU or SUN3 MMU). Signed-off-by: Greg Ungerer Acked-by: Matt Waddel Acked-by: Kurt Mahan --- arch/m68k/kernel/Makefile | 14 +++++++++++--- 1 file changed, 11 insertions(+), 3 deletions(-) diff --git a/arch/m68k/kernel/Makefile b/arch/m68k/kernel/Makefile index ea0a39671438..40d29a788b05 100644 --- a/arch/m68k/kernel/Makefile +++ b/arch/m68k/kernel/Makefile @@ -2,16 +2,24 @@ # Makefile for the linux kernel. # -extra-$(CONFIG_MMU) := head.o +extra-$(CONFIG_AMIGA) := head.o +extra-$(CONFIG_ATARI) := head.o +extra-$(CONFIG_MAC) := head.o +extra-$(CONFIG_APOLLO) := head.o +extra-$(CONFIG_VME) := head.o +extra-$(CONFIG_HP300) := head.o +extra-$(CONFIG_Q40) := head.o +extra-$(CONFIG_SUN3X) := head.o extra-$(CONFIG_SUN3) := sun3-head.o extra-y += vmlinux.lds obj-y := entry.o init_task.o irq.o m68k_ksyms.o module.o process.o ptrace.o obj-y += setup.o signal.o sys_m68k.o syscalltable.o time.o traps.o -obj-$(CONFIG_MMU) += ints.o vectors.o +obj-$(CONFIG_MMU_MOTOROLA) += ints.o vectors.o +obj-$(CONFIG_MMU_SUN3) += ints.o vectors.o ifndef CONFIG_MMU_SUN3 -obj-y += dma.o +obj-y += dma.o endif From fbe3364ac4fa82caa585f98e4a525946d2cc21f4 Mon Sep 17 00:00:00 2001 From: Greg Ungerer Date: Wed, 19 Oct 2011 20:17:46 +1000 Subject: [PATCH 54/56] m68k: add ColdFire with MMU enabled support to the m68k mem init code The ColdFire has similar setup requirements to the SUN3 code, so we use that. Signed-off-by: Greg Ungerer Acked-by: Geert Uytterhoeven Acked-by: Matt Waddel Acked-by: Kurt Mahan --- arch/m68k/mm/init_mm.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/m68k/mm/init_mm.c b/arch/m68k/mm/init_mm.c index 85c5f0eee9ff..89f3b203814b 100644 --- a/arch/m68k/mm/init_mm.c +++ b/arch/m68k/mm/init_mm.c @@ -139,7 +139,7 @@ void __init mem_init(void) } } -#ifndef CONFIG_SUN3 +#if !defined(CONFIG_SUN3) && !defined(CONFIG_COLDFIRE) /* insert pointer tables allocated so far into the tablelist */ init_pointer_table((unsigned long)kernel_pg_dir); for (i = 0; i < PTRS_PER_PGD; i++) { From ad8f955daf77d303f0ee08d2acab30d3886cbd2b Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Mon, 26 Dec 2011 20:32:02 +0100 Subject: [PATCH 55/56] m68k/Kconfig: Separate classic m68k and coldfire early While you can build multiplatform kernels for machines with classic m68k processors, you cannot mix support for classic m68k and coldfire processors. To avoid such hybrid kernels, introduce CONFIG_M68KCLASSIC as an antipole for CONFIG_COLDFIRE, and make all specific processor support depend on one of them. All classic m68k machine support also needs to depend on this. The defaults (CONFIG_M68KCLASSIC if MMU, CONFIG_COLDFIRE if !MMU) are chosen such to make most of the existing configs build and work. Signed-off-by: Geert Uytterhoeven Signed-off-by: Greg Ungerer --- arch/m68k/Kconfig.cpu | 66 ++++++++++++++++++++++----------------- arch/m68k/Kconfig.machine | 4 +++ 2 files changed, 42 insertions(+), 28 deletions(-) diff --git a/arch/m68k/Kconfig.cpu b/arch/m68k/Kconfig.cpu index 5ae1d63ef5e9..f10a5d0f0774 100644 --- a/arch/m68k/Kconfig.cpu +++ b/arch/m68k/Kconfig.cpu @@ -1,5 +1,37 @@ comment "Processor Type" +choice + prompt "CPU family support" + default M68KCLASSIC if MMU + default COLDFIRE if !MMU + help + The Freescale (was Motorola) M68K family of processors implements + the full 68000 processor instruction set. + The Freescale ColdFire family of processors is a modern derivitive + of the 68000 processor family. They are mainly targeted at embedded + applications, and are all System-On-Chip (SOC) devices, as opposed + to stand alone CPUs. They implement a subset of the original 68000 + processor instruction set. + If you anticipate running this kernel on a computer with a classic + MC68xxx processor, select M68KCLASSIC. + If you anticipate running this kernel on a computer with a ColdFire + processor, select COLDFIRE. + +config M68KCLASSIC + bool "Classic M68K CPU family support" + +config COLDFIRE + bool "Coldfire CPU family support" + select GENERIC_GPIO + select ARCH_REQUIRE_GPIOLIB + select CPU_HAS_NO_BITFIELDS + select CPU_HAS_NO_MULDIV64 + select GENERIC_CSUM + +endchoice + +if M68KCLASSIC + config M68000 bool select CPU_HAS_NO_BITFIELDS @@ -20,20 +52,6 @@ config MCPU32 based on the 68020 processor. For the most part it is used in System-On-Chip parts, and does not contain a paging MMU. -config COLDFIRE - bool - select GENERIC_GPIO - select ARCH_REQUIRE_GPIOLIB - select CPU_HAS_NO_BITFIELDS - select CPU_HAS_NO_MULDIV64 - select GENERIC_CSUM - help - The Freescale ColdFire family of processors is a modern derivitive - of the 68000 processor family. They are mainly targeted at embedded - applications, and are all System-On-Chip (SOC) devices, as opposed - to stand alone CPUs. They implement a subset of the original 68000 - processor instruction set. - config M68020 bool "68020 support" depends on MMU @@ -103,10 +121,13 @@ config M68360 help Motorola 68360 processor support. +endif # M68KCLASSIC + +if COLDFIRE + config M5206 bool "MCF5206" depends on !MMU - select COLDFIRE select COLDFIRE_SW_A7 select HAVE_MBAR help @@ -115,7 +136,6 @@ config M5206 config M5206e bool "MCF5206e" depends on !MMU - select COLDFIRE select COLDFIRE_SW_A7 select HAVE_MBAR help @@ -124,7 +144,6 @@ config M5206e config M520x bool "MCF520x" depends on !MMU - select COLDFIRE select GENERIC_CLOCKEVENTS select HAVE_CACHE_SPLIT help @@ -133,7 +152,6 @@ config M520x config M523x bool "MCF523x" depends on !MMU - select COLDFIRE select GENERIC_CLOCKEVENTS select HAVE_CACHE_SPLIT select HAVE_IPSBAR @@ -143,7 +161,6 @@ config M523x config M5249 bool "MCF5249" depends on !MMU - select COLDFIRE select COLDFIRE_SW_A7 select HAVE_MBAR help @@ -155,7 +172,6 @@ config M527x config M5271 bool "MCF5271" depends on !MMU - select COLDFIRE select M527x select HAVE_CACHE_SPLIT select HAVE_IPSBAR @@ -166,7 +182,6 @@ config M5271 config M5272 bool "MCF5272" depends on !MMU - select COLDFIRE select COLDFIRE_SW_A7 select HAVE_MBAR help @@ -175,7 +190,6 @@ config M5272 config M5275 bool "MCF5275" depends on !MMU - select COLDFIRE select M527x select HAVE_CACHE_SPLIT select HAVE_IPSBAR @@ -186,7 +200,6 @@ config M5275 config M528x bool "MCF528x" depends on !MMU - select COLDFIRE select GENERIC_CLOCKEVENTS select HAVE_CACHE_SPLIT select HAVE_IPSBAR @@ -196,7 +209,6 @@ config M528x config M5307 bool "MCF5307" depends on !MMU - select COLDFIRE select COLDFIRE_SW_A7 select HAVE_CACHE_CB select HAVE_MBAR @@ -206,7 +218,6 @@ config M5307 config M532x bool "MCF532x" depends on !MMU - select COLDFIRE select HAVE_CACHE_CB help Freescale (Motorola) ColdFire 532x processor support. @@ -214,7 +225,6 @@ config M532x config M5407 bool "MCF5407" depends on !MMU - select COLDFIRE select COLDFIRE_SW_A7 select HAVE_CACHE_CB select HAVE_MBAR @@ -227,7 +237,6 @@ config M54xx config M547x bool "MCF547x" depends on !MMU - select COLDFIRE select M54xx select HAVE_CACHE_CB select HAVE_MBAR @@ -237,13 +246,14 @@ config M547x config M548x bool "MCF548x" depends on !MMU - select COLDFIRE select M54xx select HAVE_CACHE_CB select HAVE_MBAR help Freescale ColdFire 5480/5481/5482/5483/5484/5485 processor support. +endif # COLDFIRE + comment "Processor Specific Options" diff --git a/arch/m68k/Kconfig.machine b/arch/m68k/Kconfig.machine index ef4a26aff780..7cdf6b010381 100644 --- a/arch/m68k/Kconfig.machine +++ b/arch/m68k/Kconfig.machine @@ -1,5 +1,7 @@ comment "Machine Types" +if M68KCLASSIC + config AMIGA bool "Amiga support" depends on MMU @@ -130,6 +132,8 @@ config SUN3 If you don't want to compile a kernel exclusively for a Sun 3, say N. +endif # M68KCLASSIC + config PILOT bool From 1f7034b9616e6f14dc7b6aa280210421428f31af Mon Sep 17 00:00:00 2001 From: Greg Ungerer Date: Wed, 19 Oct 2011 14:13:18 +1000 Subject: [PATCH 56/56] m68k: allow ColdFire 547x and 548x CPUs to be built with MMU enabled The ColdFire 547x and 548x CPUs have internal MMU hardware. All code to support this is now in, so we can build kernels with it enabled. Signed-off-by: Greg Ungerer Acked-by: Geert Uytterhoeven Acked-by: Matt Waddel Acked-by: Kurt Mahan --- arch/m68k/Kconfig.cpu | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/m68k/Kconfig.cpu b/arch/m68k/Kconfig.cpu index f10a5d0f0774..8a9c767125a4 100644 --- a/arch/m68k/Kconfig.cpu +++ b/arch/m68k/Kconfig.cpu @@ -236,8 +236,8 @@ config M54xx config M547x bool "MCF547x" - depends on !MMU select M54xx + select MMU_COLDFIRE if MMU select HAVE_CACHE_CB select HAVE_MBAR help @@ -245,7 +245,7 @@ config M547x config M548x bool "MCF548x" - depends on !MMU + select MMU_COLDFIRE if MMU select M54xx select HAVE_CACHE_CB select HAVE_MBAR